C OMPARISON WITH R ELATED W ORKS

TABLE 13 is the comparison with related works, reference [21] makes use of SPIHT-based compression algorithm and reference [20] makes use of DPCM-based compression algorithm. Both SPIHT and DPCM have their own unique advantages. Due to the inherent properties of SPIHT, it can support both lossy and lossless compression. But this algorithm is the numerous memory cost and computational power. DPCM is easy to design and implementation. But we are concerned about its compression ratio. The H.264/AVC provides efficient lossy coding of video content. And QP values dominate the most video quality. Therefore we experiment the compression ratio on different QP values under the equivalent condition. Further the implementation results of references [20] and [21] are to be listed in TABLE 13 as well.

TABLE 13:

The comparison with related works

SIPS 05 [21] ISCAS 07 [20] Proposed Method

Method SPIHT-based DPCM-based DPCM-based

average CR of QP = 5 1.7889 N/A 1.9851

average CR of QP = 10 1.8939 N/A 2.0402

average CR of QP = 15 1.9880 N/A 2.1152

lossless CR 1.890 N/A 2.046

lossy CR

2 / 1.1dB 4 / 4.2dB

2 / 1.03dB N/A

Process 0.18um 0.18um 0.18um

Processing Resolution VGA QCIF 1080HD

Working Frequency 30MHz 14MHz 120MHz

Gate Counts 27K 28K 22.5K

Power Consumption 3.36mW N/A 3.3mW

5.4 Summary

Although SPIHT can support both lossless and lossy compression, we desire no quality degradation due to the embedded compression algorithm, especially high-quality video content is necessary. Our proposed method can not only achieve lossless compression but also operate high resolution video system. According to the experimental results mentioned above, our codec engine gate count is about 22.5K and power consumption is 3.3mW. Additionally, it can save 29% ~ 57%

of memory access. The overall power consumption is reduced to 14.3%~28.7% of original power consumption.

Chapter 6

Conclusion and Future Work

6.1 Conclusion

In this thesis, we propose an efficient lossless embedded compression codec engine to reduce the system bus access without quality degradation. It can save 29% ~ 57% of memory access. The overall power consumption is reduced to 14.3%~28.7% of original power consumption. Moreover, our proposed architecture can not only be operated on high resolution applications but also achieve less power consumption. Therefore, the proposed lossless embedded compression codec engine is more suitable to be integrated with H.264 /AVC HDTV decoder.

The proposed embedded compression algorithm makes use of the information given by the H.264/AVC decoder. Although this thesis shows an example that integrates the proposed method with H.264/AVC decoder, the proposed algorithm can also be integrated with any other video encoding standard. Moreover, the design conception of lossless EC embedded with memory controller can be further analyzed and modified to the other video system.

6.2 Future Work

While the memory controller methods had been discussed in Chapter 4.1, there are many challenges left to be solved. Besides the characteristics of data accessing, the properties of the SDRAMs have to be taken into account. When determining how the data should be stored in the memory, we can see that more page breaks, more active command and latency are needed with SDRAMs. Although controller can arrange the SDRAMs access command in some schedule to reduce the bubble in data bus, the schedule cannot meet various block size requirements. In

addition, more SDRAMs command lead to more power consumption. So the key point of memory access is to avoid breaking page frequently. Therefore how the SDRAM controller is designed to reduce additional page-active cycle in reading and writing access should be further explored.

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作 者 簡 歷

姓名 ：洪建州

戶籍地 ：台灣省台中市 出生日期：1980. 09. 25

學歷： 1995. 09 ~ 1998. 06 國立台中高工 電子科

1998. 09 ~ 2002. 06 國立台北科技大 電子工程學系

2006. 02 ~ 2008. 01 國立交通大學 IC 設計產業研發碩士班