Chapter 3 Device Applications of
3.3. MEMORY DEVICES
3.3.3 Carrier charging/discharging behaviors
The hysteresis openings of ID-VGS curves under opposite sweeping directions of the gate bias would take place as the QD layer serves as a floating gate and influences the nearby 2DEG channel [23-28]. The effect has a twofold cause: (1) the carrier density responsible in 2DEG and (2) the QDs filled with electrons may not be identical at the same VGS in the two opposite sweeping processes. The former is responsible for the current conduction while the latter may act as Coulomb scatters and impede the current flow in the nearby 2DEG. If electron exchanges between 2DEG and QDs were fast, such hysteresis phenomena would
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disappear. In the experiment, due to the long electron charging time of QDs, the higher drain current than the ideal one (no hindrance to electron exchanges) would be observed as VGS
gradually changes from negative to positive since there are more electrons in 2DEG but fewer ones in QDs than those at equilibrium (QDs slowly get charged). On the other hand, the lower drain current than the equilibrium one should be detected in the opposite sweeping process (QDs gradually turn discharged). The RT ID-VGS curves of two QD devices at VDS = 1 V under different sweeping directions of the gate bias are shown in Fig. 3.10. The significant clockwise hysteresis is observed in GaAsSb-capped QD device while such a phenomenon is undetected in standard GaAs-capped. The presence of hysteresis openings is the minimum requirement for the usage of these nanostructures to memory devices. The result suggests that applications of type-II InAs/GaAsSb heterostructures to memory devices are more promising than those based on the type-I counterparts.
Although the more significant hysteresis opening of GaAsSb-capped QD device than that of GaAs-capped has indicated the longer electron storage times of type-II GaAsSb-capped InAs QDs than type-I counterparts, the magnitudes of these timescales are still important to practical applications. In Fig. 3.11, we show the RT time-resolved drain currents of two QD devices as VGS jumps from 5 to 5 V at VDS = 1 V. While GaAs-capped QD device exhibits the less prominent but faster current recovery after the sudden reduction, the counterpart of GaAsSb-capped comes to the steady state in the much longer recovery time of about 0.5 sec. For both of the IPGTs in two QD devices, switching VGS from positive to negative results in accumulations of surface mobile electrons above the n-type AlGaAs barriers and dispels the electrons in 2DEGs of the corresponding channels. This operation accounts for step-like reductions in the drain currents of the two devices in responses to the bias switching. On the other hand, the distinct recovery times are closely related to the type-I/II nature of the nanostructures.
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Fig. 3.11: The RT time-resolved drain currents of GaAs-capped and GaAsSb-capped QD devices measured at VDS=1 V. The gate bias VGS changes from 5 to -5 V at t=0.5 s.
In Fig. 3.12(a) and (b), we show the schematic diagrams of GaAs-capped QDs and 2DEG just before and after the switch of VGS, respectively. Since the 2DEG responds to the bias switching (variation of the Fermi level) much faster than QDs do, the originally charged QDs release their excessive electrons at the relatively slower pace. These QDs may discharge through (1) tunneling injections of the electrons to the depleted 2DEG channel, which slightly increases ID, or (2) interband recombination with the minority holes in bound valence states of QDs. Both processes are not instantaneous and lead to the dilated current response of device A after the bias switching. The discharging process of GaAsSb-capped QDs in device B follows similar scenarios, as indicated in Fig. 3.12(c) and (d). However, the presence of the conduction barrier in the GaAsSb CL further diminishes the wavefunction overlaps between
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Fig. 3.12: The schematic band diagrams of GaAs-capped QD device (a) before and (b) after the bias switching. The counterparts of GaAsSb-capped are shown in (c) and (d), respectively. The notations EF,G and EF,S represent the Fermi levels near the gate terminal and substrate side, respectively.
QD and channel conduction states and therefore prolongs the tunneling duration. In addition, the type-II nature of the GaSbAs CL eliminates bound valence QD states and turns the interband recombination spatially indirect, which also slowdowns the discharging process.
Since both discharging mechanisms are suppressed, the current recovery time becomes significantly longer in GaAsSb-capped QD device than in GaAs-capped.
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Fig. 3.13: The RT time-resolved drain currents of GaAs-capped and GaAsSb-capped QD devices measured at VDS=1 V. The gate bias VGS changes from -15 to 5 V at t=0.5 s.
In addition to the electron discharging phenomena of InAs QDs, it is also important to look into the charging processes in the two devices. The RT time-resolved drain currents of two QD devices as VGS jumps from 15 to 5 V at VDS=1 V are shown in Fig. 3.13. It takes about 1 and 10 s for GaAs-capped and GaAsSb-capped QD devices, respectively, to reach their steady states of current relaxations after the initial current jumps. In this situation, the mobile surface electrons leave the tops of n-type AlGaAs barriers in responses to the bias switching, and the 2DEGs in the originally emptied IPGT channels of the two devices are replenished. The electron charging then takes place from the 2DEG to unoccupied conduction states of InAs QDs, which slightly reduces ID in both devices. The minority holes in QDs or
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the GaSbAs CL may be eliminated by the recombination with electrons in 2DEGs or the injected ones in QDs. Overall, the QD charging can be approximately thought of as the reversed processes of those shown in Fig. 3.12. Still, the GaAsSb-capped QD device exhibits the longer current relaxation time (or QD charging time) than GaAs-capped does due to the GaAsSb CL which plays the roles of conduction barriers and type-II hole separation layers.
On the other hand, the charging times of QDs are significantly longer than the discharging counterparts. The further slowdown of the charging processes may have two origins. First, the charging phenomena occur in the bias conditions corresponding to Fig. 3.12(a) and (c).
Compared to the discharging processes in Fig. 3.12(b) and (d), the steepened potential due to the positive bias VGS in the charging counterparts further reduces the wavefunction overlaps between the QD and channel conduction states. Hence, the tunneling injections from 2DEGs into QDs become even less efficient than the reversed ones in Fig. 3.12(b) and (d). Second, the charging process increases the local charge density in QDs, which in turn limits the successive injections of electrons into QDs, namely, the effect of Coulomb blockade [92].
These two additional mechanisms further impede carrier exchanges between QD and channel states in charging processes and may lead to the much slower current relaxations in Fig. 3.13 than the corresponding recoveries in Fig. 3.11.
In summary, the charging/discharging behaviors of InAs QDs are demonstrated using the architecture of wider-channel IPGTs at RT. The prompt response of drain currents to the gate bias for the reference device without QDs suggests that the migration speed of surface mobile electrons is sufficiently fast for memory applications. With the GaAsSb capping layer, the InAs QDs have shown the longer electron discharging/charging times than their type-I counterparts. The results have indicated the potential of GaAsSb-capped InAs QDs based on the simple IPGT architecture for memory applications.
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Chapter 4 Conclusions
Band structure engineering and device applications of self-assembled InAs QD with a GaAsSb CL have been presented based on our recent investigations. Here we summarize the conclusions as followings.
Four approaches have been adopted to tailor the band alignment of GaAsSb-capped InAs QDs and the corresponding physical features are presented in the first part of this dissertation. First, carrier dynamics of type-II GaAsSb-capped InAs QDs with different Sb composition have been investigated by TRPL measurements. Both the power dependence of PL peak shift and the long decay time constants confirm the type-II band alignment at the GaAsAs-InAs interface. Different recombination paths in such type-II QDs have been clarified by temperature dependent measurements. The long-range recombination with the holes trapped by localized states in the GaAsSb QW is significant at low temperatures. At higher temperatures, the recombination is dominated by the holes confined to the band bending region surrounding the QDs. Second, the emission properties of the InAs/GaAsSb type-II QDs after thermal annealing have been investigated. Apart from large blueshifts and a pronounced narrowing of the QD emission peak, alloy intermixing also lead to enhanced recombination rates and reduced localized states in the GaAsSb layer. The type-II QD structure has evolved into a type-I alignment after 900 °C annealing. We found that it is possible to manipulate between type-I and type-II recombinations in annealed QDs by using different excitation powers. The third approach is varying CL thickness of GaAsSb-capped InAs QDs. Theoretical calculations indicated that the PL redshift and the lengthening of PL lifetime arise not only from the modifications in the quantum confinement of hole states in
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the GaAsSb layer, but also from the Sb induced structural changes in the QDs. Controlling the GaAsSb CL thickness can be an alternative approach for tailoring the optical properties of GaAsSb-capped InAs QDs. The fourth approach is using the quaternary AlGaAsSb CL. The original type-II band alignment in GaAsSb-capped InAs QDs can be restored to type-I by adding Al into the CL. Furthermore, the AlGaAsSb CL also improves the PL thermal stability and the RT PL efficiency. We demonstrate that using a quaternary AlGaAsSb CL can take the advantages of GaAsSb CL on the InAs QDs while retaining their type-I QD characters.
We demonstrate that the four approaches can be used to tailor the band alignment and with great potential for specific applications.
In the second part of this dissertation, two device applications of GaAsSb-capped InAs QDs have been demonstrated. First, we investigate the effects of the GaAsSb CLs on the spectral responses of InAs/GaAs QDIPs. An extremely narrow spectral response of Δλ/λ=0.06 is observed for the device with 20% Sb composition. Larger InAs QDs with improved QD uniformity is obtained for GaAsSb-capped InAs QD structures, which result in energy level lowering and consequently, reduced energy difference in-between the states.
Therefore, compared with standard GaAs-capped QDIPs, GaAsSb-capped QDIPs are of longer detection wavelength and narrower spectral width. The unique characteristic can be advantageous for selective detection at specific wavelengths by using QDIPs. Second, the architecture of IPGTs is adopted to demonstrate the memory effect of GaAsSb-capped InAs QD. Prior to the investigation of memory device, we studied IPGTs with an n-GaAs sheet resistance and 20-μm channel widths. Well current modulation was observed for the sheet resistance with appreciate doping densities in the channel region. The phenomena is due to the channel electron depletion resulted from the population of the mobile surface electrons repelled to the top of the channel with negative gate biases. The photocurrent measurements demonstrated that employing IPGTs with sheet resistance can be an alternative approach for application of high-speed phototransistors. For the charging/discharging behaviors of InAs
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QDs using the architecture of wider-channel IPGTs at RT, the prompt response of drain currents to the gate bias for the reference device without QDs suggests that the migration speed of surface mobile electrons is sufficiently fast for memory applications. With the GaAsSb CL, the InAs QDs have shown the longer electron discharging/charging times than their type-I counterparts. The results have indicated the potential of GaAsSb-capped InAs QDs based on the simple IPGT architecture for memory applications.
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