PSS
In order to design the control algorithm, the control-to-output transfer function is derived firstly. Then, the feedback path constructed by the flyback transformer, the voltage divider, and the ADC is developed. Finally, the DPWM is considered with a delay model.
4.1.1 Control-to-Output Transfer Function
Although the controlled system is implemented with PSS, the small-signal model of the power stage is the same as the conventional flyback converter. As the mentioned process in Fig 2.1, a flyback converter can be converted into an equivalent buck-boost converter, so that the small-signal model of the DCM buck-boost converter can be utilized to derive the control-to-output transfer function of the flyback converter. Based on [16], Figure 4.2 is the small-signal model of the DCM equivalent buck-boost converter from the flyback converter, where the parameters noted with prime are converted from the secondary side to the primary side and the ones with tilde represent perturbations of themselves without DC operating points.
g v2 1
r2
j d2
C′
o R′Lg v1 2
r1
j d1
v1
+
−
v2
+
−
i1 i2
LM
vin
v′o
+
−
r′c
Switch network small-signal ac model
Fig. 4.2. Small-signal model of the DCM equivalent buck-boost converter from the flyback converter.
The relative parameters in the small-signal model are shown in Table 4.1. Because the average voltage on the magnetizing inductance is zero, so V1 = Vin. Re is the effective resistance defined as
s M
e D T
R 2L2
= (4-1)
where D means the duty ratio under steady state conditions, and M is the voltage conversion ratio defined as
.
When we derive the control-to-output transfer function, let the perturbations besides d be zero. There are only two current sources reserved. Applying superposition principle, the procedure to derive the control-to-output transfer function is simple.
Step 1 is letting j d2=0 to obtain Gvod1(s):
Finally, the control-to-output transfer function is obtained as follows
The small-signal model is derived by the averaged switch modeling method, so it is only correct at the frequency range lower than the switching frequency. Actually, there are two zeros during the calculation process, but the second zero is higher than the switching frequency. It is negligible when the system is concerned at the frequency much lower than the switching frequency.
The DC gain G0 of the control-to-output transfer function is
0 . K
G = Vin (4-6)
There are two poles as follows
)
where the second pole fp2 is close to the switching frequency depending on the duty ratio and the voltage conversion ratio.
There is only one zero we concerned as follows (Hz).
This zero is often called ESR zero caused by the ESR rc of the output capacitor. In
order to verify the derivation of the control-to-output transfer function, Fig. 4.3 shows the frequency response of the control-to-output transfer function by simulation and calculation.
4.1.2 Feedback Path
PSS technique utilizes the auxiliary winding to sense the output voltage. The sensing error is analyzed in chapter 3. In this section, we only consider the effective turns ratio neff in the feedback path. The effect of the sensing error will be discussed in the next section. The feedback path shown in Fig. 4.4 is constructed by the flyback transformer through the auxiliary winding, the voltage divider, and the ADC.
101 102 103 104 105
-20 0 20 40 60
Magnitude (dB)
101 102 103 104 105
-100 -80 -60 -40 -20 0
Frequency (Hz)
Phase (deg)
simulation result transfer function
simulation result transfer function
Fig. 4.3. Frequency response of the control-to-output transfer function by simulation and calculation.
Coo
C RL vo +
− Ns
Na
is
Llks
Llka
sense
v +
−
1
Rac
2
Rac
ia
v+sec
−
A D A D
vfb
Fig 4.4. Feedback path for PSS.
When the system is during interval T3, the voltage on the auxiliary winding contains the information of the output voltage. The relationship between these two voltages is mentioned in (3-14) where the effect of the voltage drop of the secondary diode and the winding resistance is neglected here, so the first block in the feedback path from vo node is the effective turns ratio neff. Then, the voltage on the auxiliary winding is sent to a voltage divider.
The gain of the voltage divider constructed by two resistors Rac1 and Rac2 is Kac shown below .
2 1
2 ac ac
ac
ac R R
K R
= + (4-9)
Combining the effect of the auxiliary winding and the voltage divider together, define a feedback gain H which is expressed by
.
2 1
2 ac ac
ac
eff R R
n R
H = + (4-10)
The final part of the feedback path is the ADC, which helps to convert the analog sensed voltage vsense into a digital parameter vfb for PSS algorithm. To avoid damaging the ADC, the range of the sensed voltage must be limited lower than the maximum input voltage of the ADC by setting a proper feedback gain H. For instance, the range must be lower than 3 volts for TMS320F2812, a DSP model of Texas Instruments (TI). The conversion ratio KADC of the
ADC is relative to the maximum input voltage vr and the number of bits B, which is expressed by
2 .
r B
ADC v
K = (4-11)
4.1.3 Digital PWM Model
For reasons of price, control circuits for low-power switching power supplies are always implemented using analog circuits before. As the price/performance ratio of DSPs has decreased rapidly during the last decade, the interest for digital control of switching power supplies has grown. The dynamics of a digital controlled converter are influenced by modulation effects. In this system, the duty command Vduty is updated with the switching frequency and the carrier of the DPWM is a sawtooth generated by a counter in DSP.
To derive the Laplace-domain models of the DPWM, consider the waveforms shown in Fig. 4.5 Firstly [17]. A general single-update-mode modulator has a carrier waveform vc, a triangular waveform determined by the switching frequency and the ratio α. Choosing α equal to one allows to obtain a sawtooth carrier, where the carrier is actually an incremental counter shown in Fig. 3.6, not a triangular waveform in Fig. 4.5, which is used to make a simple sense. Normalizing the peak-to-peak value reduces quantization effects. The DPWM can be analyzed in a unified way for different type carriers.
The input of DPWM u(t) is expressed by a steady-state part U and a small perturbation to this steady-state u t( ), or
( ) ( ).
u t = + U u t (4-12)
This input is sampled at the sample rate equal to the switching frequency to produce the waveform us(t), which is passed to the zero-order hold (ZOH). The output of the ZOH uH(t), the duty command, holds the amplitude of the input us(t) during one switching period. The output of the DPWM is the duty ratio y(t), which is also
expressed by a steady-state part Y (the response to U) and a small perturbation to this steady-state y t( ), or
( ) ( ).
y t = + Y y t (4-13)
If we assume the sampler is ideal, the sampled waveform us(t) can be regarded as an impulse and the small-signal output of the sampler is
( )
**( ) ( ) ( ).
u t = u t −U =δ t (4-14)
In order to obtain the dynamic model of the DPWM, we separate the small perturbation of the duty ratio y t( ) into two parts, y t1( ) and y t2( ), which are influenced by the small-signal output of the sampler u . Focusing on region (a) and * (b) in Fig. 4.5, the perturbations y t1( ) and y t2( ) can be obtained by the properties of similar triangles.
1( ) ( ) By sampling theorem, the small-signal input of the DPWM is
*( ) ( s) ( s)
and the small-signal output of the DPWM in Laplace-domain is
( )
If we only concern the frequencies lower than the Nyquist frequency in the output,
the summation part in (4-19) is simplified as U s( ).
As we mentioned before, the sawtooth carrier is obtained by choosing α equal to one.
The dynamic model of the DPWM with a sawtooth carrier GPWM(s) is
( ) ( ) .
When the peak value of the sawtooth carrier is Vtri, the complete dynamic model of the DPWM is
Fig 4.5. Key waveforms for a general single-update-mode modulator.
The exponential term represents a delay term, which can be simplified by the first-order Pade Approximation, so (4-21) can be simplified as
1 1
1 2
( ) 1
1 2
s PWM
tri
s
DT s
G s
V DT s
≈ − +
(4-22)
where the simplified dynamic model has a constant gain 1/Vtri and is with a linear phase. Notice that this simplified model has an error in phase at frequencies near the switching frequency shown in Fig. 4.6, where the solid line is the frequency response of the exponential delay term and the dash line and the circles are the frequency responses of the first-order Pade approximated result and second-order result, respectively. For a more accurate approximation in phase, the second-order Pade approximation can be utilized.
103 104 105
-1 -0.5 0 0.5 1
Magnitude (dB)
103 104 105
-100 -80 -60 -40 -20 0
Frequency (Hz)
Phase (deg)
exponential 1st-order Pade 2nd-order Pade
exponential 1st-order Pade 2nd-order Pade
Fig. 4.6. Frequency response of the exponential delay term in the DPWM model.