• 沒有找到結果。

Chapter 2 Investigation of HfO 2 /Poly-Si Interfacial Layer on

4.1 The fluorine ion implantation before solid phase crystallization

4.1.3 Discussion

Figure 4-2 shows the secondary ion mass spectrometer (SIMS) spectrum of HfO2

LTPS-TFT with fluorine implantation. We can observe that fluorine ions after post-implanted low temperature SPC activation are merely piling up at the poly-Si/buried-oxide interface and not observed in the HfO2/poly-Si interface. This distribution of fluorine ions is different from the results of high temperature annealing that fluorine ions would pile up at the interfaces of both gate-oxide/poly-Si and poly-Si/buried-oxide [4.3]-[4.6]. This implies that SPC activation of α-Si with fluorine pre-implantation would not affect the upper part of the channel film. The impacts of fluorine pre-implantation with low temperature SPC activation on the

performance of HfO2 LTPS-TFTs are shown in Fig. 4-3. High performance characteristics of HfO2 LTPS-TFT with low VTH ~ 1 V, excellent subthreshold swing (S.S.) ~ 0.147 V/decade, high mobility ~ 74.5 cm2/V-s, and high Ion/Imin current ratio ~ 2.19 x 106 is observed without any treatment. After fluorine implantation, we can observe that the Imin is reduced significantly from 9.78 pA to 1.09 pA at VD = 0.1 V.

The Imin can be attributed to the junction leakage current which is dominated by the grain-boundary trap-state densities (Ntrap) of poly-Si channel film [4.1]. The effective grain-boundary trap-state densities (Ntrap) with and without fluorine implantation are also estimated by Levinson and Proano method [4.15][4.16]. Figure 4-4 exhibits the plots of ln [4.IDS/(VGS - VFB)] versus 1/(VGS - VFB)2 curves at VDS = 1 V and high VGS, where the flat-band voltage (VFB) is defined as the gate voltage that yields the minimum drain-current from the transfer characteristic. From Fig. 4-4, it is apparent that the effective grain-boundary trap-state densities decrease from 3.530 x 1012 cm-2 to 2.624 x 1012 cm-2 after fluorine passivation. This indicates that about 25.6 % reduction in the effective grain-boundary trap-state densities is achieved due to the passivation of the grain-boundary trap-state densities in the lower part of the channel film. The important parameters of LTPS-TFTs are listed in the table 4-I. A slight increase of VTH from 1.01 V to 1.32 V is observed after fluorine implantation. This is because that lots of fluorine ions are incorporated in the buried oxide to form the negative fixed oxide charges to affect the channel film [4.17]. This sub-gate effect would make the channel less conductive thus increase the VTH [4.5]. However, the behaviors of significant Imin reduction and a slight VTH increase of the fluorinated n-channel TFTs can not be found in the previous reports [4.3]-[4.6].

In addition to the performance enhancement of HfO2 LTPS-TFT, the reliability of the devices under hot carrier stress with VD = 2(VG – VTH) = 10 V for 1000 second is also studied as shown in Fig. 4-3. The behavior of about one order reduction of Imin in

the fluorinated TFT still maintains and shows a better threshold voltage instability ΔVTH from 1.02 V to 0.89 V. It also demonstrates that the treatment method of fluorine pre-implantation with low temperature SPC activation would improve the reliability of LTPS-TFTs as the previous reports [4.3]-[4.6]. Hydrogen treatment can also reduce the Imin effectively. However, the introduction of hydrogen would seriously degrade the reliability of LTPS-TFTs and easily release during mediate temperature process (≧500°C) [4.13][4.14].

In addition to the stress condition of hot carrier stress with VD = 2(VG – VTH) = 10 V for 1000 second, other stress conditions are also performed to study. Because the operation voltage of LTPS-TFTs with TaN/HfO2 gate stack structure was within 3 V, we employee the hot carrier stress with VGS – VTH = VDS = 5 V for 1000 seconds instead of VGS = VDS = 5V because that different hot carrier stability is observed under different VGS and constant VDS [4.18]. The threshold voltage stability (ΔVTH = VTHf – VTHi) was improved from 1.6 V to 1.22 V of the threshold voltage shift after 1000 seconds hot carrier stress as shown in the Fig. 4-5. Positive voltage shifts of threshold voltage indicate that the electrons were trapped by the gate dielectric HfO2 under hot carrier stress. The fluorine implanted device shows a smaller threshold voltage shift indicates that fewer electrons were trapped in HfO2 after fluorine passivation. Figure 4-6 shows the gate leakage current of LTPS-TFT with and without fluorine ion implantation. A smaller reduction rate of gate leakage current of the fluorine-implanted device under hot carrier stress was observed, which shows a smaller electron trapping rate than the device without fluorine ion implantation.

Figure 4-7 shows the transconductance Gm degradation of the LTPS-TFT with and without fluorine ion implantation. For the device without fluorine ion implantation, a suddenly high degradation rate of transconductance Gm was happened within 50 seconds of hot carrier stress, and then a saturation behavior was observed.

For the fluorine-implanted device, the suddenly high degradation rate region of transconductance Gm was within 20 seconds. In addition, the degradation of transconductance Gm after 1000 seconds of hot carrier stress was more serious for the LTPS-TFT with fluorine ion implantation. In the short stress time regime, the degradation of Gm for the fluorine-implanted device is smaller than that of the device without fluorine implantation. Because the grain boundaries and the high-κ/poly-Si interface of the fluorine-implanted device were passivated by the strong Si–F bonds, the device was less degraded as the stress was initially performed. As stress time increases, the fluorine-implanted device shows a larger degradation rate in Gm than the one without fluorine implantation. We attributed the severe degradation of the fluorine-implanted device to the more strict stress current, and this can be further explained from Fig. 4-8, which shows the time dependence of the driving current under hot carrier stress.

It is worth noting that the fluorine-implanted device shows a larger driving current through all the stress time. The degradation improvement of driving current is attributed to the defects passivation by fluorine. Chern et al. have proposed that the fluorine can passivate uniformly the band tail-states, which are produced due to strain bond, and midgap deep-states, which are produced due to dangling bond, within the poly-Si channel film [4.6]. Fluorine can break the strain bond of channel film, like Si-Si and Si-O-Si bond, to relax the local strain and also passivate the dangling bonds in grain boundaries and HfO2/polysilicon interface [4.19]-[4.21]. Therefore, hot carrier immunity is enhanced due to the strong Si-F bond.

Finally, a high performance LTPS-TFT with low threshold voltage ~ 1.38 V, ultra-low subthreshold swing 0.132 V/decade, high Ion/Imin current ratio 1.21 x 107, and strong hot carrier immunity is derived. Consequently, the metal-gate/high-κ LTPS-TFTs with fluorine implantation is demonstrated for the first time.

相關文件