• 沒有找到結果。

CHAPTER 4 Ultra-Wideband CMOS Low Noise

4.2 Chip Implementation and Measured Result

4.2.3 Discussions

The measured data of S11 and S22 exhibit a little frequency shift. The difference between measured data and simulated result on the input and output return loss may be due to the variation of the pad capacitance, parasitic inductance of wire, and input matching components. The peak at 3GHz of the S22 may be caused by the extra LC resonance of metal line. The peak also has affection to S21 and S12. The gain degradation of the measured data showing in Figure 4-12 may be due to energy dissipation on the parasitic resistance of wire line and the underestimation of the load resistor parasitic. But the linearity improvement achieves more than 1.5 dBm without extra power consumption.

4.3 Comparison with no output buffer UWB LNA

The Ultra-Wideband LNA is fabricated using 0.18μm RF CMOS technology.

Figure 4-17 is the circuit schematic of the no output buffer UWB LNA. Figure 4-18 shows the simulated S21 comparison between with buffer and no buffer UWB LNA.

We can see that the no buffer LNA has poor gain and gain flatness, because the output impedance changes with frequency. So, the output impedance matching of with buffer LNA is better than the no buffer one. Although the output matching of the buffer one is the advantage, it needs more power consumption and the transistor of buffer introduces extra noise source. In the Figure 4-19, it is the simulated NF comparison between with buffer and no buffer UWB LNA. We can see that the no buffer one has better NF performance. Figure 4-20 shows the layout diagram of the UWB LNA. The total die area is 0.813 mm by 1.08 mm.

Figure 4-17 Circuit schematic of the no output buffer UWB LNA.

48

0 2 4 6 8 10 12

-60 -50 -40 -30 -20 -10 0 10 20

S21 (dB)

Frequency (GHz)

with buffer no buffer

Figure 4-18 Simulated S21 comparison between with buffer and no buffer LNA.

2 4 6 8 10 12

0 2 4 6 8 10

12 NF (dB)

Frequency (GHz)

with buffer no buffer

Figure 4-19 Simulated NF comparison between with buffer and no buffer LNA.

Figure 4-20 The layout diagram of the no buffer LNA.

50

„

CHAPTER 5 Summary

„

_____________________________________________

By the three-order band-pass Chebyshev filter, a broadband impedance matching, a low power consumption amplifier is developed for UWB system applications. Table 5.1 is the comparison of broadband LNA performance. We can find out that this work has the highest gain maximum and amazing linearity IIP3 in this table. This result can prove that this circuit topology is useful for UWB system application.

Table 5.1 Comparison of broadband LNA performance. ∗ LNA core only

Ref.

B.W.

(GHz)

Gmax

(dB)

NFmin

(dB)

S11

(dB)

S22

(dB)

IIP3

(dBm)

Pdc

(mW)

Tech.

(um)

year

[16] 2.4~9.5 9.3 4 < -9 < -20 -6.7

9

0.18

CMOS

2004 ISSCC [17] 0.6~22 8.1 4.3 < -8 < -9 NA 52 0.18

CMOS

2003 RFIC This

work

3~10 9.7 6.1 < -7 < -10 6 18 0.18

CMOS

2006

REFERENCES

[1] Thomas H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge, U.K.:Cambridge Univ. Press, 1998.

[2] Behzad Razavi, RF Microeletronics, Prentice Hall PTR, 1998.

[3] David M. Pozar, Microwave Engineering, 3rd Ed., Wiley John Wiley & Sons, Inc., 2003

[4] G. Gonzalez, Microwave Transistor Amplifiers Analysis and Design, 2nd ed. NJ:

Prentice-Hall, Inc. 1997

[5] Wei-Chia Zhan, “Low-Power and High-Linearity Mixer Adopting Derivative Cancellation by Using Complex Transconductance Equivalent Circuit, ”

Master thesis at Department of Electronics Engineering & Institute of Electronics

in National Chiao-Tung University

[6] K. Mandke, H. Nam, and L. Yerramneni, and C. Zuniga, “The Evolution of Ultra Wide Band Radio for wireless Personal Area Network,” Summit Technical Media,

LCC, High Frequency Electronics, Sep. 2003.

[7] E. Abou-Allam, J. J. Nisbet, and M. C. Maliepaard, “Low-Voltage 1.9-GHz Front-End Receiver in 0.5-um CMOS Technology,” IEEE J. Solid-State Circuits, vol. 36, NO. 10, pp. 1434- 1443, Oct. 2001.

[8] T. Manku, G. Beck, and E.J. Shin, “A Low-Voltage Design Technique for RF Integrated Circuits,” IEEE Trans. Circuits Syst. Part II, vol. 45, pp.1408-1413,

52

Oct. 1998.

[9] D. K. Shaeffer, and Thomas H. Lee, “A 1.5V, 1.5GHz CMOS Low Noise Amplifier, “IEEE Journal of Solid-State Circuit, vol. 32, pp. 745-759, May 1997.

[10] S. Vishwakarma, S. Jung and Y. Joo, “Ultra Wideband CMOS Low Noise Amplifier with Active Input Matching,” IEEE Ultra Wideband Systems, 2004.

Joint with Conference on Ultrawideband Systems and Technologies. Joint UWBST & IWUWBS. 2004 International Workshop on 18-21 May 2004, pp.

415-419.

[11] C-W. Kim, M-S. Kang, P. T. Anh, H-T. Kim and S-G. Lee, “An Ultra-Wideband CMOS Low Noise Amplifier for 3-5-GHZ UWB System,” IEEE J. Solid-State

Circuits, vol. 40, no. 2, February, 2005.

[12] Andrea Bevilacqua, and Ali M Niknejad, “An Ultra-Wideband CMOS LNA for 3.1 to 10.6GHz Wireless Receivers,” IEEE Journal of Solid-States Circuits, vol.

39, NO. 12, pp. 2259- 2268, Dec. 2004; and IEEE International Solid-State

Circuits Conference, vol. 37, pp. 382- 383, 2004.

[13] Trung-Kien Ngung, Chung-Hwan Kim, Gook-Ju Ihm, Moon-Su Yang, and Sang-Gug Lee, “CMOS Low-Noise Amplifier Design Optimization Techniques,”

IEEE Transactions on Microwave Theory and Techniques, vol. 52, NO. 5,

pp.1433-1442, May. 2004.

[14] Yang-Chaun Chen, and Chien-Nan Kuo, “A 6~10GHz Ultra-WideBand Tunable LNA,” IEEE the International Society for Computer Aided SurgeryI,

pp.5099-5102, 2005.

[15] R-C. Liu, K-L. Deng, and H. Wang, “A 0.6-22-GHZ broadband CMOS distributed amplifier,” in IEEE Radio Frequency Integrated Circuits Symp. Dig.

Papaers, 2003, pp. 103-106

[16] A. Bevilacqua and A. M. Niknejad, “An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receiver, " in IEEE International Solid-State Circuits

Conference, 2004, pp. 382–383.

[17] R.-C. Liu, K.-L. Deng, and H.Wang, “A 0.6–22 GHz broadband CMOS distributed amplifier," in Proc. IEEE Radio Frequency Integrated Circuits

(RFIC) Symp., June 8–10, 2003, pp. 103–106.

54

Vita

姓名:邱子倫 性別:男

出生年月日:民國 71 年 7 月 12 日 籍貫:台灣桃園市

住址:桃園市陽明九街 57 號 學歷:國立中興大學電機工程學系 (89 年 9 月~93 年 6 月)

國立交通大學電子研究所系統組 (93 年 9 月入學)

論文題目:

1.8 伏金氧半低雜訊放大器之設計應用於超寬頻 UWB 3.1-10.6GHZ無線接收端

(Design of a 1.8 -V CMOS LNA applied for Ultra-Wideband 3.1 to 10.6GHZ Wireless Receivers)

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