Drift Expression

One means of operating an ISFET is in the feedback mode, where a constant drain current is maintained by applying a compensating feedback voltage to the solution side of the gate voltage ( e.g., a reference electrode). Therefore, the temporal change is the overall insulator capacitance resulting from hydration leads to a drift in compensating feedback voltage. In other words, when drift phenomenon occurs at the surface of an actively-biased ISFET, the gate voltage will simultaneously exhibit a change to keep a constant drain current.

The change in the gate voltage can be written as )

Since the voltage drop inside of the semiconductor is kept constant in the feedback mode, ΔVG(t) becomes

where VFB and Vins represent the flatband voltage and the voltage drop across the insulator, respectively. The flatband voltage is given by

OX The voltage drop across the insulator, Vins, is given by

OX

where Qinv is the inversion charge. If the temperature, pH, and the ionic strength of the

solution are held constant, the variations in Eref, χ^sol, Ψ0, and ΦSi can be neglected, so the drift

The gate oxide of the fabricated ISFET was composed of two layers in this study, a lower layer of thermally-grown SiO2 of thickness, xL, and an upper layer of PECVD SiO2 of thickness, xU.. CI(0) is the effective insulator capacitance given by the series combination of the thermally-grown SiO2 capacitance, εL/xL, and the PECVD SiO2 capacitance, εU/xU. Ci(t) is analogous to CI(0), but an additional hydrated layer of capacitance, εHL/xHL, at the oxide-electrolyte interface must be took into consideration, and the PECVD SiO2 capacitance is now given by εU/[xU－xHL]. The series combinations of the capacitances are illustrated in Figure 2-7. The simplified expression for drift is, therefore, given by [17]

)

As is evident from From this equation (2-16), drift is directly proportional to the thickness of the modified surface layer. Therefore, the time dependence of drift is identical to that associated with the growth of this layer. By considering the time dependence of the diffusion coefficient associated with dispersive transport, an expression for xHL(t) is given by

[ ]

where AD represents the cross-sectional area, and Nhydr is the average density of the hydrating species per unit volume of hydration layer. The overall expression for the gate voltage drift is given by

[ ]

We can expect that if the time of gate oxide immersing in the test-solution is long enough (determined by the constant τ ), the gate voltage drift will approach a constant value which is greatly dependent on the hydration depth, xHL(∞).

Chapter 3

Procedures of the Experiment

To investigate the properties of membrane as the pH-sensing layers, the ISFET were fabricated. All processes were done in NDL (National Nano Device Laboratory)

and Nano Facility center. The schematic diagrams of ISFET is presented and corresponding graph is shown in Figure 3-1.

3.1 ISFET Fabrication Process Flow

(a) RCA clean

Wet-oxidation, 6000Å, temperature = 1050°C for 65 minutes (b) Defining of Source/Drain (mask 1)

BOE wet-etching of SiO2

(c) Screening dry oxidation thickness=300Å, temperature=1050°C for 12 minutes Source/Drain ion implantation

Source/Drain annealing, 950°C, 60 minutes (d) PECVD SiO2 for passiveness, 1μm

(e) To define contact hole and gate region (mask 2) BOE wet-etching of SiO2

(f) Dry oxide thickness=100Å, temperature=850°C for 60 minutes (g) Sensing layer 1, 300Å

Defining of sensing region (mask 3) HF wet-etching of SiO2

(h) Sensing layer 2, 300Å (mask 4)

(i) Al evaporation, 5000Å (mask 5)

3.2 Experiment details

3.2.1 Gate Region Formation

RCA clean is usually performed at wafer starting to reduce the effect of diffusion ions, particles and native oxide. RCA clean will ensure the integrity of device electricity. In order to create a Source/Drain region, the next step 600Å thickness wet oxide is deposited as blocking layer for Source/Drain implant. The density and the energy of Source/Drain implant is 5E15 (1/cm²) and 25Kev with phosphorus dopant, respectively. In our experiment, p-type wafer is used. After Source/Drain implanting following a 950°C 30minutes N⁺ anneal performed to activate the dopants.

We do not need to deposit PE-oxide with thickness 1um in standard MOSFET, but it is necessary to do which protect the structure of a pH-ISFET, when the ISFET’s will operating in a long period, during this period, we need to avoid ion’s diffusion in the structure and affect the electrical characteristics [18]. In order to avoid this influence, a thick PE-oxide deposition can eliminate this effect. After PE-oxide depositing, 100Å thickness dry oxide was grown as gate oxide.

3.2.2 Sensing Layer Deposition

Methods of deposited sensing membrane as gate material are different which is the most important part in our experiment. The drift, hysteresis and sensitivity will improve by different layers [19]. For comparing these sensing layers, several deposition techniques were performed. Low- pressure nitride (LP- nitride) and PE-oxide are deposited as sensing

layers. We adopted LPCVD to obtain low stress nitride and high sensitivity, so it is good sensing layer. There are so many researches on it [20]. However, PE-oxide drift and sensitivity are unstable in different electrolytes. In CMOS process, tungsten and tantalum are popularly used. By using different barriers, drift lowing for a long period of tome and compatible with CMOS can be accomplished.

3.3 Measurement System

3.3.1 Preparation Before Measuring

To define the characteristics of the device, we use HP4156A to measure the I-V curve of ISFET. The measurement system is showed in Figure 3-2. Otherwise, light will produce serious influence on the ISFET, so that we measurement in the dark box to prevent light influence.

After device being made, we glue a container on the wafer. Entire sensing layer region must be included in the opening under the container. The material of the container is made by silica gel and the bottom has to be small enough to avoid touching other devices. However, the opening on the top has to be big enough for insert reference electrode.

The pH-solution that we use is made from Riedel-deHzen and pH-value is 1, 3, 5, 7 buffer solutions. The electric potential of the pH-solution is always floating. The disturbance from the environment would induce the electric potential variance of the solution. By eliminating this variance, a reference electrode is needed to put into the pH-solution.

3.3.2 Measurement Set-Up

In the beginning of the measurement, the reference electrode is suspended on the air over the container. The pH-solution is filled in the container. It is noticed that the pH-solution must touch the sensing layer entirely because of the small opening.

In the setup of HP-4156A semiconductor parameter analyzer system, substrate is grounded and the reference electrode is sweeping to different voltage. In the measurement of sensitivity, the response of the pH-ISFET is the function of time and at the first, we check the I^D-V^D curve to make sure the ISFET device is work as a MOSFET. On the other hand, we also should decide the drain bias from ID-VD to ensure the both IFET are operating in linear region while I^D-V^G measurement.

The ISFET held at VG= 1V, 2V, 3V, 4V, and 5V. The typical set of ID-VD curves for the ZrO2, Ta2O5, Thermal Oxide, and PE Oxide gate ISFET are shown in Figure 3-3, Figure 3-4, Figure 3-5, Figure 3-6.

The pH-solution in the container is about several milliliters. In order to control the accuracy of the result, the container has to be washed by the next pH-solution after measuring previous pH-solution.

3.3.3 Temperature Measurement Set-Up

For characterizing the temperature influence of ISFETs, we measured I-V curves for etch film with changing the pH-solution in order of pH 1, 3, 5, 7 buffer solutions and controlling the different ambient temperature about 25°C, 35°C, 45°C, 55°C, 65°C, 75°C, and 85°C. For each temperature value, we wait the 15 minutes then measured the I^D-V^G curves which the pH-ISFET had been covered by the pH-solution. The measurement system is showed in Figure 3-7. Figure 3-8 illustrates the detection principle of pH. Firstly, we obtain

the pH1 transconductance, it is purpose to get maximum gain. The second step we decide the pH1’s VG then decide the IDS. At last, we can obtain the pH3, pH5, pH7’s VG. When we change the different pH buffer solution, we must use the pH7 buffer solution first, then pH5, pH3, and pH1, it is purpose to get better performance which let the pH buffer solution concentration from low to high.

Chapter 4

Results and Discussions

4.1 Temperature Sensitivities of Various Membranes

4.1.1 ZrO2 membrane gate ISFET

Figure 4-1~4-14 are the ID-VG curves and sensitivities of ZrO2 gate ISFET in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃. The measuring data are sorted in table 4-1. Figure 4-15 is temperature sensitivity correlation coefficient. The measuring data are sorted in table 4-3. Figure 4-16 is normalize the temperature sensitivities curve. The measuring data are sorted in table 4-2. According to the data about table 4-3, we can find that ZrO2 gat ISFET temperature sensitivity is increase progressively.

Figure 4-17~4-20 the ID-VG curve at a specific pH declined with an increase in temperature. That can fine the isothermal point as show as Figure 4-21, it is near zero temperature coefficient, this indicates that a well-closen operating point can eliminate the temperature influence, the measuring data are sorted in table 4-4.

4.1.2 Ta2O5 membrane gate ISFET

Figure 4-22~4-35 are sensitivities of Ta2O5 gate ISFET in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃. The measuring data are sorted in table 4-1. Figure 4-36 is temperature sensitivity correlation coefficient. The measuring data are sorted in table 4-3. Figure 4-37 is normalize the temperature sensitivities curve. The measuring data are sorted in table 4-2. According to the data about table 4-3, we can find that

Ta2O5 gat ISFET temperature sensitivity is decrease progressively.

Figure 4-38~4-41 the ID-VG curve at a specific pH declined with an increase in temperature. That can fine the isothermal point as show as Figure 4-42, it is near zero temperature coefficient, this indicates that a well-closen operating point can eliminate the temperature influence, the measuring data are sorted in table 4-4.

4.1.3 Thermal Oxide membrane gate ISFET

Figure 4-43~4-56 are sensitivities of Thermal Oxidegate ISFET in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃. The measuring data are sorted in table 4-1. Figure 4-57 is temperature sensitivity correlation coefficient. The measuring data are sorted in table 4-3. Figure 4-58 is normalize the temperature sensitivities curve. The measuring data are sorted in table 4-2. According to the data about table 4-3, we can find that Thermal Oxidegat ISFET temperature sensitivity is increase progressively.

Figure 4-59~4-62 the ID-VG curve at a specific pH declined with an increase in temperature. That can fine the isothermal point as show as Figure 4-63, it is near zero temperature coefficient, this indicates that a well-closen operating point can eliminate the temperature influence, the measuring data are sorted in table 4-4.

4.1.4 PE Oxide membrane gate ISFET

Figure 4-64~4-77 are sensitivities of PE Oxidegate ISFET in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃. The measuring data are sorted in table 4-1. Figure 4-78 is temperature sensitivity correlation coefficient. The measuring data are sorted in table 4-3. Figure 4-79 is normalize the temperature sensitivities curve. The measuring data are sorted in table 4-2. According to the data about table 4-3, we can find that

PE Oxidegat ISFET temperature sensitivity is decrease progressively.

Figure 4-80~4-83 the ID-VG curve at a specific pH declined with an increase in temperature. That can fine the isothermal point as show as Figure 4-84, it is near zero temperature coefficient, this indicates that a well-closen operating point can eliminate the temperature influence, the measuring data are sorted in table 4-4.

4.1.5 Followings are the discussions of the measurement results:

It is very interested in sensitivity measurement result. Why, there are ZrO2 gate ISFET and Thermal Oxide gate ISFET temperature sensitivity increase progressively?

Why, there are Ta2O5 gat ISFET and PE Oxide gate ISFET temperature sensitivity decrease progressively?

According to the Eq. (2-6), the parameter α is a dimensionless sensitivity parameter and T is temperature parameter. If T is multiply α and product is increase that cause temperature sensitivity is upwardly. Otherwise, if T is multiply α and product is decrease that cause sensitivity is downward.

Accordingly, an isothermal point of the ZrO2, Ta2O5, Thermal Oxide, and PE Oxide in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃, the pH response increases monotonically as the temperature increases.

4.2 Drift Characteristics of Gate Stress Voltages in Various Membranes

4.2.1 ZrO2 membrane gate ISFET

Figure 4-85 shows the drift of ZrO2 gate ISFET with time. It is obviously shows a strong relation of gate drift and gate stress voltages. When the gate voltage is controlled as -0.5V, the drift voltage will decrease from -57.94 mV to -3.45mV in six hours measurement.

The improvement of the drift voltage reaches 94.05%. In order to confirm that the method works, a ZrO2 film ISFET has also measured by various gate voltages. Figure 4-86 shows the relation of drift voltages and gate stress voltages, and the data are sorted in table 4-5.

4.2.2 Ta2O5 membrane gate ISFET

Figure 4-87 shows the drift of Ta2O5 gate ISFET with time. It is obviously shows a strong relation of gate drift and gate stress voltages. When the gate voltage is controlled as -0.5V, the drift voltage will decrease from 40.6mV to 25.48mV in six hours measurement.

The improvement of the drift voltage reaches 37.24%. In order to confirm that the method works, a Ta2O5 film ISFET has also measured by various gate voltages. Figure 4-88 shows the relation of drift voltages and gate stress voltages, and the data are sorted in table 4-5.

4.2.3 Thermal Oxide membrane gate ISFET

Figure 4-89 shows the drift of Thermal Oxidegate ISFET with time. It is obviously shows a strong relation of gate drift and gate stress voltages. When the gate voltage is controlled as -0.5V, the drift voltage will decrease from 56.12mV to 2.94mV in six hours measurement. The improvement of the drift voltage reaches 94.76%. In order to confirm that

the method works, a Thermal Oxide film ISFET has also measured by various gate voltages.

Figure 4-90 shows the relation of drift voltages and gate stress voltages, and the data are sorted in table 4-5.

4.2.4 PE Oxide membrane gate ISFET

Figure 4-91 shows the drift of PE Oxidegate ISFET with time. It is obviously shows a strong relation of gate drift and gate stress voltages. When the gate voltage is controlled as 1V, the drift voltage will decrease from 45.54mV to 0.92mV in six hours measurement. The improvement of the drift voltage reaches 97.98%. In order to confirm that the method works, a PE Oxide film ISFET has also measured by various gate voltages. Figure 4-92 shows the relation of drift voltages and gate stress voltages, and the data are sorted in table 4-5.

4.2.5 Followings are the discussions of the measurement results:

According to the table 4-5, it is a simple and cheap way to solve the drift problem is presented which described the relation of drift and gate voltage. A constant various gate voltages are biased in the sensing layer with reference electrode. The improvement of drift voltages reaches higher. This may result from the gate electric field affecting the ions to diffusive into the gate insulator. To use this method, we can change different gate voltages which get a series of drift voltage characteristic. By this way, we can find the point about gate voltage which let drift approach to 0V for each membrane gate ISFET, it is very important to us for ISFET application. Then we will be commercialize the ISFET with a very low drift rate in a simple way.

4.3 Drift Characteristics Hysteresis of Cycle Time Test in Various Membranes

4.3.1 ZrO2 membrane gate ISFET

Figure 4-93~4-94 are drift hysteresis of ZrO2 gate ISFET in pH=7 buffer solution at either 25℃ or 85℃. The measuring data are sorted in table 4-6 and table 4-10. According to table 4-11, the percentages of accuracy after second cycle time are about 1.30% at 25℃ and 1.96% at 85℃.

4.3.2 Ta2O5 membrane gate ISFET

Figure 4-95~4-96 are drift hysteresis of Ta2O5 gat ISFET in pH=7 buffer solution at either 25℃ or 85℃. The measuring data are sorted in table 4-7 and table 4-10. According to table 4-11, the percentages of accuracy after second cycle time are about 1.60% at 25℃, and 1.69% at 85℃.

4.3.3 Thermal Oxide membrane gate ISFET

Figure 4-97~4-98 are drift hysteresis of Thermal Oxidegat ISFET in pH=7 buffer solution at either 25℃ or 85℃. The measuring data are sorted in table 4-8 and table 4-10.

According to table 4-11, the percentages of accuracy after second cycle time are about 3.66%

at 25℃, and 4.12% at 85℃.

4.3.4 PE Oxide membrane gate ISFET

Figure 4-99~4-100 are drift hysteresis of PE Oxidegat ISFET in pH=7 buffer solution at either 25℃ or 85℃. The measuring data are sorted in table 4-9 and table 4-10. According to table 4-11, the percentages of accuracy after second cycle time are about 3.68% at 25℃, and 4.19% at 85℃.

4.3.5 Followings are the discussions of the measurement results:

According to the Figure 4-94, Figure 4-96, Figure 4-98, Figure 4-100, we can see that cycle time 1 is toward gate voltage hysteresis larger then the other cycle time, it is initial drift characteristic of ISFET. If we want to know the ISFET gate voltage drift hysteresis at different temperatures, we must calculate hysteresis with beginning at second cycle.

Table 4-12 shows percentages of gate voltage drift hysteresis are smaller then 5% of all membranes. It is indirect identification that the confidence of this thesis experiment results are very high.

4.4 Conclusions

In this thesis of our experiment is to study and obtain the most suitable membrane which is compatible with CMOS fabrication processes to be a sensing layer for ISFET. We choose four membranes of ZrO2, Ta2O5, Thermal Oxide, and PE Oxide to be sensing films.

The first purpose is studying the temperature sensitivity characteristic. According to the Eq. (2-6), the parameter α is a dimensionless sensitivity parameter and T is temperature parameter. If T is multiply α and product is increase that cause temperature sensitivity is upwardly. Otherwise, if T is multiply α and product is decrease that cause sensitivity is

downward. There are ZrO2 gate ISFET and Thermal Oxide gate ISFET temperature sensitivity increase progressively. There are Ta2O5 gat ISFET and PE Oxide gate ISFET temperature sensitivity decrease progressively.

The second purpose is studying the temperature isothermal point of the four membranes in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃, the pH response increases monotonically as the temperature increases. In other words, the temperature isothermal point is temperature balance point in pH=1, 3, 5, 7 buffer solutions at 25℃, 35℃, 45℃, 55℃, 65℃, 75℃, and 85℃. We can obtain a well-chosen operating point that can eliminate the temperature influence in this region.

The third purpose is studying the gate voltage drift characteristic. According to the table 4-5, it is a simple and cheap way to solve the drift problem is presented which described the relation of drift and gate voltage. A constant various gate voltages are biased in the sensing layer with reference electrode. The improvement of drift voltages reaches higher. This may result from the gate electric field affecting the ions to diffusive into the gate insulator. To use this method, we can change different gate voltages which get a series of drift voltage characteristic. By this way, we can find the point about gate voltage which let drift approach to 0V for each membrane gate ISFET, it is very important to us for ISFET application. Then we will be commercialize the ISFET with a very low drift rate in a simple way.

The fourth purpose is studying the drift characteristics hysteresis of cycle time test in various membranes. According to the Figure 4-94, Figure 4-96, Figure 4-98, Figure 4-100, we can see that cycle time 1 is toward gate voltage hysteresis larger then the other cycle time,

The fourth purpose is studying the drift characteristics hysteresis of cycle time test in various membranes. According to the Figure 4-94, Figure 4-96, Figure 4-98, Figure 4-100, we can see that cycle time 1 is toward gate voltage hysteresis larger then the other cycle time,