DG-TFTs can be operated in several different modes, namely, single-gated (SG) modes and double-gated (DG) mode. In SG modes, a sweeping bias is applied to one gate (denoted as the driving gate) while the other gate, denoted as the control gate, is applied with a fixed voltage (usually 0V); whereas in DG mode, the top-gate and bottom-gate are connected together to serve as the driving gate. In this work two SG modes are investigated: the first mode using the top-gate as the driving gate with the bottom-gate grounded is called the top-gate (TG) mode; the other SG mode, called the bottom-gate (BG) mode, has the biasing configuration opposite to the TG mode.
Figure 3-1 shows the transfer curves of a device with channel thickness of 30nm and symmetrical gate oxide of 20nm, under DG, TG, and BG mode of operations. Figs.
3-1(a) & (b) show the characteristics before and after NH3-1hour plasma treatment, respectively. It is clear that devices operating DG mode exhibit better performance, such as steeper SS and higher on-current. The BG mode depicts the worst subthreshold slope (SS) among the three modes of operation in Fig.3-1(a), implying
the poorer crystallinity in the bottom channel. Nevertheless, it is obvious that the subthreshold slope (SS) in BG mode has been significantly improved by plasma treatment since the defects at grain boundaries have been effectively passivated, and the SS of the BG mode become closer to that of the TG mode, as shown in Fig.3-1(b).
As mentioned above, thanks to its strong gate controllability, DG mode depicts steeper subthreshold slope (SS) compared with the SG mode. This is also confirmed in Fig. 3-1(b), in which SS is 554 mV/dec and 690mV/dec for TG mode and BG mode, respectively. It is worthy to note that SS is 422mV/dec for DG mode due to the coupling effect of the two channels. Owing to twice the conductive width compared with either TG or BG mode, DG mode has a higher drive current than either TG or BG mode, resulting in a larger Ion/Ioff ratio.
Figure 3-2 shows the TG and DG transfer characteristics of a short-channel device (L=0.7μm) with drain voltage of 0.5V and 3.5V, respectively. It could be seen that drain induced barrier lowering (DIBL) can be slightly suppressed with the DG mode.
Figure 3-3 shows the transfer characteristics of a device with channel thickness of 50nm and symmetrical gate oxide of 20nm, under DG, TG, and BG modes of operation. The device received a plasma treatment before the characterization. Since the channel body is thicker than the devices characterized in Figs. 3-1 and 3-2, the
gate-to-gate coupling effect should be weaker. This explains why the DG mode exhibits less improvement in SS over the SG modes.
For the structures studied above, the bottom gate oxide and the top gate oxide are both 20nm-thick. We have also investigates cases with asymmetric gate oxide (i.e., the thickness of the bottom gate oxide and the top gate oxide are different.). Figure 3-4 (a) shows the transfer characteristics of a device with 30nm-thick channel body, 20nm-thick top gate oxide, and 50nm-thick bottom gate oxide. Since the bottom oxide is much thicker than the top one, the BG mode shows much worse performance than the TG mode, so the operation of the DG mode is actually dominated by the conduction of the top channel. As a result, the DG curves are very close to the TG curves. With 50nm-thick channel body, 20nm-thick top gate oxide and 50nm-thick bottom gate oxide, as shown in Fig. 3-4(b), the trend becomes even clear. The SS under various operation modes are summarized in Table 3-1.
Figure 3-5 shows output characteristics of a device with 30nm-thick channel body with symmetric gate oxide. It is found that TG mode has a higher drive current than BG mode. It is ascribed to the small grain size in the bottom channel region. This also results in the degradation of mobility as shown in Fig. 3-6. It is worth noting that the drain current is enhanced in DG mode, as shown in Fig. 3-5. As can be seen in the figure, the on-current of the DG mode is actually higher than the sum of the two SG
modes. However, the mobility characteristics tell a different story. As can be seen in Fig. 3-6, the peak value of mobility of the DG mode extracted at Vd=0.5 V is actually smaller than the SG modes.
There are many reports investigating the so-called “volume inversion”
phenomenon that may happen when the channel body is sufficiently thin [35]. If the channel body is thicker than the maximum depletion width, there will be negligible interaction between the top and the bottom channels. In such case, the DG operation is simply the combination of two independent MOSFETs in parallel. However, if the channel body is thinner than the maximum depletion width, the two triangular shape quantum potential wells of the opposite channels will couple each other, as shown in Fig. 3-7. Such coupling effect may lead to the redistribution of the inversion electrons throughout the entire channel body, rather than concentrating near the top and bottom Si/SiO2 interfaces, a phenomenon known as “volume inversion”. Note that such volume inversion happens in an ultra-thin body and is significant at a low transverse electric-field (see Fig. 3-8). When vertical electric field increases, the volume inversion is weakened, since inversion charges will tend to accumulate toward the interfaces due to the high vertical electric field.
Volume inversion has several significant advantages, such as [35-36]
(a) an enhancement of carriers density,
(b) a reduction of surface scattering, thus an increase in mobility, and (c) an increase in drain current and transconductance.
These advantages for DG devices were previously reported for devices with crystalline Si channel. To this date, no related works are reported on the cases using poly-Si channel. To confirm if the volume inversion happens, Figure 3-9 shows the drain current ratio of DG mode to the sum of TG and BG modes. It is found that the drain current in DG mode is larger than the sum of TG and BG modes, especially in low gate voltage. In low gate voltage (Vg-VTH=1 or 2V), the drain current ratio (IDG/(ITG+IBG)) can be around 1.5 x. It may be due to the volume inversion or the decrease of series resistance. Figure 3-10 shows the series resistance. The series resistance is 43KΩ for TG mode and 40KΩ for BG mode. It drops to 33KΩ for DG mode, which is larger than the equivalent resistance of the two parallel TG and BG resistances (~22KΩ). This means that the series resistance in DG mode is not low enough to contribute so large an enhancement in IDG shown in Fig. 3-9. However, there is no enhancement in DG mode mobility (shown in Fig. 3-6). Figure 3-11 shows the device transconductance in DG, TG, and BG modes, where Gm(DG)/(Gm(TG)+Gm(BG)) is smaller than 1. Some remarks on the results are drawn here. First, the mobility extracted from the Gm is the so-called field-effect mobility, which is different than the equivalent mobility value [37]. Sometimes it cannot represent the whole picture of the
mobility characteristics. Second, although volume inversion may reduce the surface scattering rate, in the present case the inversion electrons accumulate in the channel may suffer from the scattering events with the defects contained in the grain boundaries of the poly-Si channel. This may explain the degraded mobility under the DG mode. Based on the analysis, we conclude that the enhancement in drain current under DG mode mainly comes from the increase of inversion electron concentration.
To understand the importance of the channel thickness, we have also characterized devices with 50nm-thick channel body with symmetric gate oxide. Typical output characteristics are shown in Fig. 3-12(a), and Fig. 3-12(b) plots the drain current ratio (IDG/(ITG+IBG)). The ratio is around 1x, indicating the top and bottom channels are operating independently.