Before the discussion of fixed-point simulation, note that in the published WLAN design [3] the CE and EQ modules are designed combining ZF CE, DDCT, and LS EQ. So the all fixed-point performance of the proposed WLAN chip is simulated without MMSE EQ.
For converting the floating-point baseband design to the fixed-point design, the DAC and ADC wordlengths need to be decided first. In the existing baseband chip design 9-bit ADC/DAC [18, 23, 37] and 10-bit ADC/DAC [25, 44] are generally proposed. For deciding the wordlength, two issues including the quantization error and the power consumption of DAC and ADC should be considered. To understand the system performance degradation caused by the fixed-point quantization error, the PER curves of 54Mb/s mode with different wordlengths are simulated. In the fixed-point simulation the key modules comprising AGC, synchronizer, FFT/IFFT, channel equalizer, shaping filters, and FEC designs are also converted to the fixed-point design with the suitable wordlengths. The PER curves simulated in AWGN channel and IEEE multipath channel [19] with 50ns RMS delay spread are respectively shown in Figure 5-1 and Figure 5-2. And the SNR values for 10% PER are listed in Table 5-1. As shown in Figure 5-1 and Table 5-1, we can find the acceptable wordlength for WLAN system is ≥ 9 bits since the SNR for 10% PER can
satisfy the system constraint (26.7dB) in both AWGN and multipath channel. Another concern for deciding the wordlength is the DAC and ADC power consumption. Since the PER between 16-bit 10-bit fixed-point designs is very close, for low power we just consider 9-bit and 10-bit to be the fixed-point wordlength. The normalized DAC and ADC power with the same operation frequency is listed in Table 5-2.
Channel Condition:
AWGN, CFO = 40ppm+phase noise, SCO=40ppm, Doppler = 50Hz
Figure 5-1: 54Mb/s PER with different ADC/DAC wordlength in AWGN channel
Channel Condition:
RMS=50ns, CFO = 40ppm+phase noise, SCO=40ppm, Doppler = 50Hz
Figure 5-2: 54Mb/s PER with different ADC/DAC wordlength in multipath channel Table 5-1: SNR for 10% PER of 54Mb/s WLAN with different wordlengths
Design
AWGN channel (dB)
Fixed-point SNR loss
AWGN channel (dB)
Multipath channel with
50ns RMS delay (dB)
Fixed-point SNR loss in multipath channel (dB)
System constraint
Floating-point
20.8
(A1) 25.5
(B1)
16-bit 21.25 0.45 25.6 0.1
10-bit 21.35 0.55 25.8 0.3
9-bit 21.4 0.6 26.5 1.0
8-bit 22.2 1.4 27.6 2.1
7-bit >23 >2.2 >30 >4.5
26.7
Note A
A-A1 B
B-B1 C
Table 5-2: Power consumption of DAC and ADC for WLAN system
State-of-the-art Wordlength DAC/ADC
I/Q DAC power in 40MS/s (mW)
I/Q ADC power in 40MHz (mW)
Ref. [18] 9/9 17 105.5
Ref. [23] 10/9 58 155
Ref. [25] 10/10 Not Listed 248
As listed in Table 5-2, the power is normalized in 40MS/s rate for basic 2x transmitter filtering and 2x receiver interpolation for 20MHz OFDM-based WLAN system. When we use 9-bit wordlength, the DAC and ADC power is respectively saved by 41mW and 93~142.5mW [18, 23, 25]. That means the use of 9 bit wordlength can save 241% of 9-bit DAC power and 60%~135% of 9-bit ADC power.
The saved ADC power is equivalent to 70% of Coded-OFDM baseband receiver power [18]. In the trade-off between system performance and low power, we use 9-bit DAC and ADC as the interface connecting to RF. Besides, the 7-bit DAC is added for receiver AGC. The DAC and ADC power information of other state-of-the-art can be found in references. After the wordlength decision, the fixed-point system block diagram with main wordlength setting is shown in Figure 5-3. With the clipping design of the transmitter, the peak-to-average-power ratio (PAPR) can be suppressed to enhance the linearity of RF power amplifier. The PAPR of the fixed-point design is listed in Table 5-3.
FEC
Figure 5-3: Block diagram of the proposed fixed-point WLAN baseband system Table 5-3: PAPR of the proposed fixed-point design for WLAN system
Data Rate (Mb/s) PAPR (dB)
Based on the wordlength setting, the PER curves of the proposed fixed-point
design can be simulated. The PER curves of the fixed-point design in (i) AWGN channel and (ii) IEEE multipath channel with 50ns RMS delay spread (frequency-selective fading > -15dB) are respectively shown in Figure 5-4 and Figure 5-5. And the relative SNR values for 10% PER are listed in Table 5-4 and Table 5-5.
As listed in Table 5-4 and Table 5-5, the average SNR loss caused by the quantization error is only 0.16 and 0.36dB in the simulation channels. For understanding the performance difference from the state-of-the-art, the SNR values for 10% PER of the proposed design are compared with the references [18, 25]. And the SNR comparison is listed in Table 5-6.
Channel Condition:
AWGN, CFO = 40ppm+phase noise, SCO=40ppm, Doppler = 50Hz
Figure 5-4: PER of fixed-point WLAN design in AWGN channel
Table 5-4: SNR for 10% PER of fixed-point WLAN design in AWGN channel Data Rate
(Mb/s)
Floating-point Design (dB)
Fixed-point Design (dB)
System Constraint (dB)
Fixed-point Loss (dB)
6 2.3 2.6 9.7 0.3 9 4.0 4.05 10.7 0.05
12 5.65 5.7 12.7 0.05
18 8.35 8.4 14.7 0.05
24 11.2 11.3 17.7 0.1 36 15.0 15.1 21.7 0.1 48 19.4 19.5 25.7 0.1 54 20.8 21.4 26.7 0.6 Avg. 10.84 11.00 17.45 0.16
Note A B (should < C) C B-A
Channel Condition:
RMS=50ns, CFO = 40ppm+phase noise, SCO=40ppm, Doppler = 50Hz
Figure 5-5: PER of fixed-point WLAN design in multipath channel with RMS=50ns
Table 5-5: SNR for 10% PER of fixed-point WLAN design with RMS=50ns Data Rate
(Mb/s)
Floating-point Design (dB)
Fixed-point Design (dB)
System Constraint (dB)
Fixed-point Loss (dB)
6 7.2 7.5 9.7 0.3 9 10.05 10.1 10.7 0.05 12 9.6 9.65 12.7 0.05 18 13.4 13.8 14.7 0.4 24 15.1 15.45 17.7 0.35 36 19.8 20.15 21.7 0.35 48 23.2 23.6 25.7 0.4 54 25.5 26.5 26.7 1.0 Avg. 15.48 15.84 17.45 0.36
Note A B (should < C) C B-A
Table 5-6: SNR for 10% PER of fixed-point WLAN processors in AWGN channel
Data Rate (Mb/s)
Proposed Design SNR
(dB)
Design SNR [18]
(dB)
Design SNR [25]
(dB)
System Requirement
(dB)
6 2.6 5.4 4.9 9.7 9 4.05 5.8 5.8 10.7 12 5.7 7.0 8.6 12.7 18 8.4 9.5 9.9 14.7 24 11.3 11.3 12.4 17.7 36 15.1 14.9 15.9 21.7 48 19.5 18.6 20.3 25.7 54 21.4 20.6 21.7 26.7 Avg. 11.00 11.68 12.44 17.45
The difference between the proposed design and references [18, 25] is the use of low-complexity synchronizer, high-performance decision-directed channel tracking (DDCT), and high-performance weighted-average phase error tracking (WAPET). As listed in Table 5-6, the proposed design requires lower SNR compared with the reference [18, 25] especially in low data rates. In the low data rate, the packet length is longer and the OFDM symbol number of one packet is larger. Therefore the channel variance and phase error caused by CFO and SCO will become rapid. And the phase error will exceed ±π which is the range of normal phase detection. In this low-data-rate condition, the proposed DDCT and WAPET can be efficient to suppress
exceeding ±π. Therefore the proposed design requires lower SNR for 10% PER. And in the average SNR for 10% PER, the proposed design can have 0.68dB, 1.44dB, and 6.45dB gain when compared with reference [18, 25] and the system constraint.