CHAPTER 5 CONCLUSIONS AND FUTURE WORK
5.2 FUTURE WORK
In this dissertation, an LNCNN chip has been fabricated and verified successfully.
However, the applications of LNCNN are few because there are few studies on LNCNN due to the lack of LNCNN hardwares. Hence, with the proposed LNCNN structure and hardware, many researches on LNCNN templates and phenomenon can be studied and verified.
Furthermore, because the simple circuits are used in the proposed LNCNN chip for small area and power consumption, the linearity of the templates is not the first priority of our consideration. Hence, the linearity of the circuits can be further modified to get a more precise control on the templates. Meanwhile, the goal of the LNCNN chip proposed in this dissertation is to realize the core of the LNCNNUM. In the next phase, it is anxious to achieve an LNCNNUM chip for many applications of LNCNN. Moreover, the applications of the diamond templates and how to transfer the 5 × 5 templates into diamond templates are also interesting researches. The tolerance of the diamond templates will be analyzed to generate a more robust template.
Furthermore, an RMCNN without elapsed time is also presented. In the structure of RMCNN, the correlations are stored on the analog memories, that is, the capacitors. Although the analog design is an intuitional method, it is also possible to operate the RMCNN in digitalized mode or mixed-mode structure. Under analog mode, the operation is easier and faster. However, under digital mode, it is more precise and more economic in power consumption. Hence, how to design a most proper structure is the main target in the next generation. Moreover, the learning of the large-neighborhood templates can also been applied on RMCNN. The effects of the large-neighborhood templates could be analyzed and how to implement the space-variant templates on RMCNN chip is a challenging topic.
As to the recursive learning RMCNN, the templates Z are learned recursively. With the simulations, it is proved that the recognition rates can be improved as an RMCNN structure is used. However, per 5 iterations, the deviation of the learned templates Z is calculated and the recursive learning stops when the deviation is smaller than the constrain δ. The mathematical model and derivation will be further studied in the future. Based on the proposed algorithm, a recursive learning RMCNN chip will also be designed and implemented in 0.18 μm or better CMOS technology. Further research on the efficiency of the learning templates Z will be concerned and integrated.
Finally, the integration of RMCNN and LNCNN can make the whole chip powerful.
RMCNN is applied on learning where LNCNN is used for controlling and computing. As a machine with RMCNN and LNCNN contains memories, controllable instructions, and learnable abilities, it may achieve an artificial intelligence system with a proper design and controlling codes.
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