NICs consist of practical circuit components

In this section, NIC consist of practical circuit components are simulated and discussed. All the component models used in the simulations are measurement-based models from the manufactures’ websites. The full small-signal model of the transistor VMMK-1218 is used in the simulations. The effects of the transmission lines, junctions and the substrate are not included in the simulations, and these effects will be discussed in the next chapter.

A NIC loaded with a 1-pF capacitor is shown in Figure 3.14. The capacitor comes from Murata GRM15 series. The DC block capacitors are used on the cross-coupling path between the two transistors. There are RF choke inductors near the voltage source.

In addition, decoupling capacitors are shunted to the voltage sources so that the lower-frequency ac signals which pass through the choke inductors would not disturb the power supply. The gate voltages of the transistors are chosen in order that the bias condition for the transistors is Vds=4V, Ids=5mA. The simulated impedance shows between the sources of the two transistors is shown in Figure 3.15 with the impedance

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of an ideal −1.2-pF capacitor for comparison.

Similarly, the NIC loaded with 2.9-nH inductor is simulated, and the simulated impedance shows between the sources of the two transistors is shown in Figure 3.16 with the impedance of an ideal −2.9-nH inductor for comparison. In addition, the impedance of the loads (the 1-pF capacitor and the 2.9-nH inductor) used in the NICs and their ideal counterparts (with minor adjustments to the value of the ideal

components) are shown in Figure 3.17 and Figure 3.18. The inversion of load reactance is still valid up to 3GHz, which can be observed between the sources of the two

transistors. Although there is a small input resistance that may be undesirable, it could be eliminated with slight change of the load based on Equation 2.6. From the similar behavior of the proposed circuit and an ideal NIC, it can be seen that the components’

parasitic effects would only slightly affect the NIC’s behavior at UHF if the components are properly chosen.

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Figure 3.11 Input impedance of the 1-μF capacitor (circle line: reactance)

Figure 3.12 Impedance of the 560-nH inductor (circle line: reactance)

Figure 3.13 Impedance of the 120-nH inductor (circle line: reactance)

41 Figure 3.14 NIC consists of practical circuit components

Figure 3.15 Impedance of NIC loaded with 1-pF capacitor compared with ideal −1.2 pF capacitor

(circle line: ideal −1.2 pF capacitor)

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Figure 3.16 Impedance of NIC loaded with 2.9-nH inductor compared with ideal −2.9 nH inductor

(circle line: ideal −2.9 nH inductor)

Figure 3.17 Impedance of the 1-pF load and an ideal 1-pF capacitor (circle line: ideal 1-pF capacitor)

Figure 3.18 Impedance of the 2.9-nH load and an ideal 2.6-nH inductor (circle line: ideal 2.6-nH

inductor)

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Chapter 4

Implementation of the NIC

A prototype NIC circuit is simulated and manufactured based on the results in chapter 3. Simulations in this chapter are the extensions of that in the previous chapter.

Apart from the components’ non-ideal behavior, the effects of transmission lines and the substrate are also included in the simulations presented in this chapter. The conclusion and future works are addressed at the end of this chapter.

4.1 Simulation of the prototype NIC circuit

The geometry of the prototype NIC circuit is shown in Figure 4.1. The NIC circuit which is based on microstrip structure is simulated using ADS, and the schematic design is shown in Figure 4.2. The core of the NIC is shown in Figure 4.3, which consists of the two transistors, the DC block capacitors and the load impedance. A 1.6 mm FR4 dielectric slab (ε^r = 4.4 and tanδ=0.02) is used in this design. The load of the NIC circuit is a 1pF capacitor from Murata GRM15 series.

The simulated S-parameters for the 2-port NIC circuit are shown in Figure 4.4. The circuit is designed as a 2-port network, thus it can be easily measured and tested. The

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impedance between the sources of the two transistors can be obtained by de-embedding the network after the measurement process.

Figure 4.1 Geometry of the prototype NIC

Figure 4.2 Schematic design of the prototype NIC used in the simulation

45 Figure 4.3 Core of the prototype NIC

Figure 4.4 Simulated S-parameters of the 2-port NIC network

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The schematic design for simulating the impedance between the sources of the two transistors is shown in Figure 4.5, and the simulation result is shown in Figure 4.6. The simulation result in the previous chapter, which excludes the effects of the transmission line and the substrate, is also shown in Figure 4.6.

Figure 4.5 Schematic design for simulating the impedance between the sources of the two transistors

Figure 4.6 Simulated impedance between the sources of the two transistors (circle line: without the

effects of the transmission lines and the substrate)

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4.2 Fabrication of the prototype NIC circuit

A photograph of the fabricated loaded NIC is shown in Figure 4.7. The size of this prototype circuit is 24×17 mm², including the space occupied by the pads for SMA connectors and the DC connectors. If the area occupied by the biasing circuit and the connectors’ pads is neglected, the core of the NIC is implemented in the area equal to 2×2.8 mm². At the submission date of this thesis, the measurement of the prototype NIC circuit is unfinished, thus the measurement results are not shown here.

Figure 4.7 Photograph of the prototype NIC

4.3 Conclusion

The frequency response of a NIC structure which is originally designed for LF (low frequency) is discussed in this thesis. By analyzing the new circuit model proposed in this thesis, the behavior of the NIC structure can be explained at UHF (ultra-high

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frequency). The frequency response caused by the transistor is discussed in chapter 2, and the frequency response caused by the non-ideal surface-mounted devices used in the design is discussed in chapter 3.

A prototype UHF NIC is designed, simulated and fabricated. The general

components selection guide for a wideband UHF NIC is proposed in chapter 3, and the full prototype NIC circuit is discussed in this chapter. Although the frequency response of the NIC structure could be complicated at UHF, the simulations show that by

choosing the components properly and minimizing the size of the NIC structure, a wideband NIC at UHF is still possible to achieve.

4.4 Future works

There are some possible studies that could be the extension of this work, and they are divided into three categories. First, after the measurement of the NIC circuit is finished, the layout of the NIC could be further optimized based on the measurement results. Second, the small signal NIC circuit model proposed in this work could be modified into a more general form. By substituting general impedances for the internal capacitances of the transistor in the model, the frequency response of the full NIC circuit could be fully described, which includes the parasitic effects introduced by other

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components in the circuit. Third, the circuit could be redesigned based on different applications. For instance, if a certain impedance-frequency curve is desired within a target frequency band (rather than the whole UHF band), the circuit could be redesigned based on the design formulas in chapter 2, and the optimal components choices could be different from that suggested in chapter 3. In addition, it should be noticed that the cross-couple pair (XCP) circuit used in the design is not necessarily operated as a NIC if components with more parasitic effects are adopted. Although not recommended for a NIC, these components could be adopted in the XCP circuit to synthesize the needed impedance by carefully making use of their parasitic effects. For example, wider transistors could be a better choice than the smaller ones if a large-value negative resistor is desired at the terminals of the XCP. However, the load of the XCP should be carefully selected, and it would not be simply the inverse of the desired negative resistor.

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Reference

[1] S. E. Sussman-Fort and R. M. Rudish, "Non-Foster impedance matching of electrically-small antennas," Antennas and Propagation, IEEE Transactions on, vol. 57, pp. 2230-2241, 2009.

[2] B. Razavi, "The Cross-Coupled Pair - Part I [A Circuit for All Seasons]," Solid-State Circuits Magazine, IEEE, vol. 6, pp. 7-10, 2014.

[3] J. G. Linvill, "Transistor Negative-Impedance Converters,"

Proceedings of the IRE, vol. 41, pp. 725-729, 1953.

[4] H. Morkner, "Wafer scale package construction and usage for RF through millimeter wave applications," in Microwave Conference, 2009. EuMC 2009. European, 2009, pp. 1772-1775.

[5] O. O. Tade, P. Gardner, and P. S. Hall, "Antenna bandwidth broadening with a negative impedance converter," International Journal of Microwave and Wireless Technologies, vol. 5, pp. 249-260, 2013.

[6] Murata. SimSurfing [Online]. Available:

http://ds.murata.co.jp/software/simsurfing/en-us/index.html