Chapter 4 UWB CMOS LNA Design
4.2 Design procedures
4.2.2 Input and output match
Input matching:
In feedback topology, the small signal equivalent is shown in Fig. 4-6, where
1
The third stage is decided to use source follower buffer to make 1 50
4
gm 𝛺
for output match.
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Fig. 4-6 Feedback configuration 4.2.3 Shunt peaking
A model of shunt peaking amplifier is shown in Fig. 4-7. The capacitance C may be taken to represent all the loading on the output node, including that of a subsequent stage. The resistance R is the effective load resistance at that node and the inductor provides the bandwidth enhancement. It’s clear from the model that the resistor provides an impedance component that increases with frequency, which helps offset the decreasing impedance of the capacitance, leaving net impedance that remains roughly constant over a broader frequency range than that of the original RC network. The impedance of the RLC network may be written as
L must be sizable to have large gain and must be small so that it resonates d
Cout out of band. R is chosen to place the zero frequency (d
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to the lower edge of the band to improve the gain.
We introduce a factor m, defined as the ratio of the RC and L/R time constant:
R L m RC
/ (4.27) Then, the transfer function becomes
1
The magnitude of the impedance, normalized to the DC value as a function of frequency, is then then can lead to a bandwidth that is about 1.72 times as large as the un-peaked case.
Therefore, both a maximally flat response and a substantial bandwidth extension can be obtained simultaneously at least for the shunt-peaked amplifier. [8]
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Fig. 4-7 Model of shunt-peaked amplifier
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4.3 Simulation Result
Fig.4-8 shows the simulated input and output reflection coefficients. S11 is lower than -10dB between 3.1 and 10.6GHz. The output buffer achieves excellent matching such that S22 is lower than -12.57dB from 3.1GHz to 10.6 GHz. Fig. 4-9 is the power gain versus frequency, and the maximum power gain is 18.43dB in our simulation results. Since the output source follower drives a matched load, the voltage gain of the core amplifier is exactly 6dB higher than S21. The -3dB bandwidth is 0.4~9.9GHz for the simulation. The noise figure (NF) of this UWB LNA is shown in Fig.4-10. The noise figure is as low as 2.8dB at 10.6GHz, while the average noise figure in-band is about 3.7dB. Fig.4-11 and 4-12 show the simulated reverse isolation S12 and stability factor respectively. The two-tone test results for third-order intermodulation distortion are shown in Fig.4-13. The test is performed at 5.5GHz.
IIP3 is to 5.19dBm, and the input referred 1-dB compression point (ICP) is -2dBm.
These results imply excellent linearity of our LNA. The proposed UWB LNA dissipate 17.2mW with a power supply of 1.8V.
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47
Fig. 4-10 Simulated NF
Fig. 4-11 Simulated S12
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Fig. 4-12 Simulated stability
Fig. 4-13 Two tones test
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4.4 Measurements and Conclusions
The following Fig.4-14 ~ Fig.4-19 are the measurement result which are slightly different from simulation. Which imply good accuracy of simulation and good circuit design. The some of the gain compression at high frequency showing in Figure 4-14 maybe due to the underestimate of the load resistor parasitic.
The bandwidth of this work with considering matching and gain is from 3.1 to 10.6 GHz, while the average gain is about 10dB. Fig. 4-16 shows the measurement result of S11 and the Fig. 4-17 shows the measurement result of S22. Output matching is achieved well from 3.1 to 10.6 GHz. The average S11 is about -8dB and the S22 can bellow -9.6dB. Fig. 4-18 shows the measured noise figure. The noise performance is very flat and the minimum noise figure is 5.03dB at 7GHz. The noise figure can be better if we solve the resistor parasitic. Fig.4-20 shows the die photo of this circuit.
Total power consumption is 17mw which the vg is 0.7V and vdd1 and vdd2 are 1.8v.
Table 4.1 is the measurement result summary. By the capacitor-resistance feedback with series inductive peaking we proposed, a good input and output matching, broadband, a low power consumption amplifier is developed for UWB system applications.
50
51
52
Fig. 4-17 Measured S22
Fig. 4-18 Measured noise figure
-20 -15 -10 -5 0 5 10
-50 -40 -30 -20 -10 0
OP3 OP1
Output Power(dB)
Intput Power(dB)
Fig. 4-19 Measured linearity
5.66 5.49
5.21 5.38 5.03 5.44 5.48 5.51 6.06
4 5 6 7 8 9 10
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Freq (GHz)
NF(dB)
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Fig.4-20 Die Photo
B.W.
(GHz)
Gain (dB)
NF (dB)
S11 (dB)
S22 (dB)
IIP3 (dBm)
Pdc (mW)
3.1~10.6 6.73~13.20 5.03~5.66 -9.18~-12.65 -9.63~-17.39 -3 17
Table 4.1 Measured results summary
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Chapter 5 Summary
By the capacitor-resistance feedback with series inductive peaking we proposed, a good input and output matching, broadband, a low power consumption amplifier is developed for UWB system applications.
Table 5.1 is the comparison of broadband LNA performance. We can find out by this table, by using R-C feedback with series inductive peaking technology, can
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Reference
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[2] J. Rudell, et al.,“A 1.9GHz wide band IF double conversion CMOS receiver for cordless telephone applications” IEEE J. Solid-state Circuits, vol.32, pp.2071-2088, Dec.1997.
[3] P. Orsatti, F. Piazza, Q. Huang, and T. Mosrimoto, “A 20 mA receive 55 mA transmit GSM transceiver in 0.25-mm CMOS,” in In Int. Solid-State Circuits Conf. Dig. Tech. Papers.(San Francisco), pp. 232-233,Feb. 1999.
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PAE in 0.2µm CMOS.” In 2000 Symposium on VLSI circuits,(Honolulu, HI),pp.56-57, June 2000.
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[12] S. Vishwakarma, S. Jung and Y. Joo, “Ultra Wideband CMOS Low Noise Amplifier with Active Input Matching,” IEEE Ultra Wideband Systems, 2004.
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Vita
姓名：陳懿範 性別：女
出生年月日：民國71年10月30日 籍貫：台北市
住址：台北市信義區吳興街284巷28弄36號2樓 學歷：國立交通大學電子工程學系
(90年9月~94年6月)
國立交通大學電子研究所固態電子組 (94年9月~96年6月)
論文題目：
應用於超寬頻3.1-10.6 GHz之無線接收端之低雜訊放大器之設計
An ultra-wideband CMOS LNA for 3.1 to 10.6 GHz wireless receivers