Introduction of Low Temperature Poly-Si TFTs

High-performance silicon devices on insulators have recently been incorporated in various new applications, such as AMLCDs and lightweight flat panel displays. However, the first generation of AMLCDs rely on a-Si:H TFTs as switching elements. Although

a-Si:H TFTs have the advantages of low processing temperature and low leakage current, the low electron field-effect mobility (typically below 1 cm²V^-1s^-1) implies its limitation as switching device. Thus the panel size and resolution of LCD panel is also limited.

Polycrystalline silicon TFTs essentially have higher field effect mobility than a-Si:H TFTs. Thus poly-Si reasonably brings benefits of higher driving current, higher aperture ratio and low power consumption to TFT performance [19]. Besides, the peripheral driving circuits can be realized by integration of complementary metal-oxide-semiconductor (CMOS) circuits on the panel. Thus the cost of driver IC can be reduced and the reliability of driver IC can be improved [20]. In addition to crystallization techniques, implant activation is also one of the most important steps for TFT fabrication. Here we focused on the dopant profile engineering which is more crucial for activation of high speed devices.

In order to produce poly-Si TFTs with high performance, plenty of studies have been made to improve the crystallization and activation techniques. The details of crystallization and activation processes will be introduced in following sections.

1.2 Crystallization of Amorphous Silicon (a-Si) Thin Films

Crystallization of a-Si has been taken as the most important process in the fabrication of LTPS TFTs. This is because the crystallized poly-Si serves as the active layer in the TFTs.

Thus the quality of crystallized poly-Si affects the performance of TFTs deeply. However, defects such as dangling bonds which mainly exist in grain boundary of poly-Si may deteriorate the performance of TFTs. To avoid the degeneration of performance caused by defects, reduction of grain boundaries in active region can essentially promote the quality of poly-Si. Many efforts therefore have been focused on the enlargement of grain size.

In last two decades, various techniques such as solid phase crystallization (SPC) and laser crystallization have been studied for crystallization of a-Si. Generally speaking, SPC requires a long processing duration to crystallize a-Si at low temperature. However, high

defect density in grain boundary still limits the improvement of TFT performances. In contrast to the solid crystallization process of SPC, laser crystallization process induces the melting of a-Si. Poly-Si will form after the recrystallization of melted a-Si. The details of these two crystallization techniques are introduced as below.

1.2.1 Solid Phase Crystallization

Solid phase crystallization of a-Si is a simple and effective method to acquire poly-Si thin film. Amorphous state is a thermodynamically metastable state; transformation to polycrystalline state can be achieved by given sufficient energy to overcome the energy barrier. To achieve a large grain size, it is important to suppress nucleation instead of grain growth. Therefore, SPC is typically processed at a low temperature. To achieve a larger grain size also implies a longer crystallization time. Thus SPC is generally processed in furnace at a temperature of 600 °C for 24 hours. However, the processing time of SPC is too long and suffers a trade-off between performance and throughput [21].

SPC has an advantage that it can be accomplished in a wide process window of annealing temperature and annealing time. Besides, SPC is a reliable technique due to its simplicity, low cost and excellent uniformity [22]. For practical applications, the average grain size of poly-Si should be about 0.5-1μm. However, high defect density always exists in crystallized poly-Si. These defects may result in a saturation of electrical performance of TFTs with a corresponding grain size of 0.3-0.5 μm. Thus the poly-Si TFTs processed by standard SPC can only show mediocre performance with mobilities in the range of 20-40 cm²/Vs.

1.2.2 Excimer Laser Crystallization

Shtyrkov et al. initiated pulsed laser annealing and reported that the lattice damage induced by implantation into crystalline silicon could be repaired as well as activated by

laser annealing [23]. Plenty of works on the use of pulsed laser annealing were conducted in the 1980s. The first study of pulsed laser crystallization of a-Si film was published by Sussmann et al. in 1980 [24]. The crystallization of a-Si films on glass substrate was also published in this decade [25]. For excimer laser annealing (ELA), pulse to pulse repeatability, output energy and pulse duration may affect the film quality dramatically.

Laser annealing with low fluence describes a condition where the incident laser fluence is sufficient to melt the a-Si film, but it is also low enough that the un-melted a-Si film remains at the maximum extent of melted area. This condition is also referred to as

“partial-melting regime”, which corresponds to the microcrystallities of laser-annealed Si film [26]. The high laser fluence corresponds to the situation when the laser fluence is sufficient to melt the Si film completely. This condition is also referred to as

“complete-melting regime”. The nucleation in this regime occurs as a result of undercooling in the molten-Si. Therefore, the copious nucleation occurs and the grain size obtained in the regime is about ten nanometers in diameter.

Another regime, called super lateral grain growth (SLG), has been found within the process window between the previous two regimes (see Fig.1-1). The grain size in this regime is about several hundred nanometers in diameter. The transformation process associated with this regime has been modeled by Im et al., in terms of near-complete-melting of Si film [27-28]. The drawing picture of this model is that the unmelted islands provide seeds for solidification, thus the lateral grain growth can ensue from the propagating of the solid-liquid interface within the surrounded “undercooled molted Si”. The SLG grain growth initiates from seeds located at the Si-SiO2 interface is shown in Fig. 1-2 [29].

However, the drawbacks of conventional ELA process were related to difficulty in maintaining a proper balance between performance and grain uniformity. The grain

boundaries and small grains in channel may disturb the carrier transportation and deteriorate the TFT performance [30-31].

1.3 Dopant Profile Engineering of Ion –Implanted Semiconductors

Much effort has been focused on the formation of thin insulators, short channels, and shallow junctions for scaling of transistor-based silicon devices to ~100 nm [32]. This is crucial in achieving better performance for these devices in terms of speed, power consumption, and device packing density. Dopant profile engineering is potentially a promising approach for scaling of these devices [33-39]. State-of-the-art dopant profile engineering is established by integrating low-energy implantation [33-35], defect engineering [36-39], and fast solid-phase-epitaxial-regrowth [35, 37] or laser annealing [37-39]. To date, dopant profile control still suffers from boron-enhanced diffusion (BED) [33], transient-enhanced diffusion (TED) [34-35], boron-interstitial clustering [35], and uphill diffusion [36, 39-40], all of which are associated with thermal energy supply during dopant activation.

It has been demonstrated that TED can be eliminated by reducing the implantation energy to sub-keV energies [35]. However, Agarwal et al. have observed that a diffusivity enhancement of a factor of 4 still exists when the implantation energy is decreased to less than or equal to 1 keV [41]. In this regime, BED is thought to be responsible for diffusion enhancement of boron [42]. Besides reducing the energy of the ion implantation, TED and BED can also be minimized by employing a preamorphizing implant (PAI) and/or by reducing the thermal budget of the subsequent anneals. Recent developments of low thermal budget annealing techniques include spike rapid thermal annealing (RTA) and laser annealing.

1.3.1 Rapid Thermal Activation

Although a shallow junction can be formed by low-energy ion implantation and a RTA process, the production of an ultrashallow junction using a conventional process is difficult.

Low-energy ion implantation has disadvantages, which include a low-beam current and a low throughput. RTA usually works at a temperature higher than 1000 °C and a short process time (several seconds) [37, 43-44]. Therefore the sheet resistance of implanted sample can be decreased dramatically after RTA processing and the throughput increase a lot in comparison with furnace annealing process. However, RTA cannot completely prevent TED, which increases the junction depth [37, 43-44]. Excimer laser activation, therefore, has been introduced for this application.

1.3.2 Excimer Laser Activation

Activation by excimer laser annealing [37-39, 45-46] (ELA) has been shown to outperform furnace annealing (FA) [37, 45] and even spike rapid thermal processing (RTP) [37, 40, 43-44] on minimizing dopant diffusion (see Fig. 1-3), due to fast thermal energy supply from nanosecond laser pulses. The ELA profile is shallower than the RTA one and, moreover, has a shape completely different from that obtained by the standard thermal process. This is a direct consequence of the melting process. There is also a clear indication that no significant movement of B occurs underneath the melted layer, due to the extremely fast process.

Based on the fact that amorphous/damaged Si should have a slightly lower melting point than crystalline Si, the preamorphized layer can be melted without melting the underlying Si [37]. Since the diffusivity of boron in the liquid phase is about eight orders of magnitude higher than that in the solid state, the boron atoms become nearly uniformly redistributed within the melt depth as shown in Fig. 1-3, thus forming an abrupt junction.

Besides, Fig. 1-4 shows that the boron profile advances further into the Si as the number of

pulses increases due to the piling up of boron at the molten/solid interface after the preceding pulse. A highly activated, ultrashallow, and abrupt junction layer can be obtained by optimizing the laser fluence, irradiated pulse number and preamorphization depth.

Nevertheless, dopant diffusion during ELA-based activation is still observed due to the fact that both vacancy-mediated [36, 39-40] and interstitial-mediated diffusion [33-35]

mechanisms are enhanced by photoexcited lattice systems like thermally heated lattice systems. Therefore further improvement of activation technique is still required for future applications.

1.4 Time-Resolved Terahertz Spectroscopy

Terahertz (THz= 10¹² Hz) has been strongly studied for last two decades. The opening of THz era not only made significant contribution to ultrafast phenomena, but also opened wide applications to optoelectronics and biomedical fields. The THz field is roughly defined by the frequency range of 0.1 to 10 THz (see Fig. 1-5), which corresponds to the wavelength of 0.003 to 3 mm. In 1981, Mourou and Auston firstly demonstrated generation and detection THz radiation by a photoconducting switch [47-48]. It was followed by the study of photoconductor dipole antenna as the THz sensor in 1988 [49]. Afterward plenty of works were focused on the dipole antenna and semiconductor surface electric field for THz generation [50-51]. Free-space electro-optic sampling (FS-EOS) technique was further studied by X. C. Zhang et al. to improve signal to noise ratio and dynamic range [52].

THz has highly potential for many applications. In the bioscience, the photon energy of THz is much smaller than X-ray and therefore will not cause harmful photoionization in biological tissues. THz is also hot for chemical detection, mail or luggage inspection, gas spectroscopy, non-contact and non-destructive measurements. The spectroscopic technique using pulsed THz radiation, terahertz time-domain spectroscopy (THz-TDS), has been developed by taking advantage of short pulses of broadband THz emission. THz-TDS has a

time resolution of sub-picosecond and corresponds to a spectral resolution of 50 GHz. Since THz-TDS is a non-destructive measurement, it is suitable for the study of dielectric materials and semiconductors. For example, Grischkowsky et al. use THz-TDS for the study of carrier concentration and absorption characteristics of sapphire and silicon in THz frequency. Therefore we will also use THz-TDS for the non-destructive measurement of poly-Si annealed by Ti:Sapphire laser.

1.5 Motivation

Hydrogenated amorphous silicon (a-Si:H) is used extensively in Thin Film Transistors (TFTs) for Flat Panel Displays (FPDs) and large area imagers, and it is also a promising photovoltaic material. The a-Si:H TFTs have low off-current and sufficient on-current for most applications. However, a-Si:H shows poor carrier mobility due to its disordered crystal structure. The poor mobility will result in the limitation on the pixel sizes for display and other imaging applications. Therefore, poly-Si with higher mobility up to 300cm²/Vs has been suggested as an alternative of a-Si:H. Recently, high performance poly-Si devices have been applied in many applications such as flat panel displays.

Poly-Si can be obtained by furnace annealing and ELA applied on a-Si. However, the process temperature of furnace annealing is 550 °C, which may induce the melting of glass substrate. Considering of the long pulse duration (~10 ns) of excimer laser, the melting process of a-Si layer is still thermal melting, which starts via the lattice vibration. Therefore, we try to induce nonthermal melting by irradiate the a-Si layer with ultrafast laser pulses (~50 fs) for comparison. The laser pulse promotes electrons from valance (bonding) states to conduction states, resulting in destabilization of the bands and softening of phonon modes. The semiconductor may lose its lattice structure when the phonon modes soften to certain point and undergo a phase transition [13-15]. The effect was observed in semiconductors under intense femtosecond laser excitation in a time scale of subpicosecond.

This subpicosecond time scale is too fast for carrier to transfer energy to lattice, ruling out the possibility of lattice heating via phonon emission. Therefore, the melting in subpicosecond time scale is named as nonthermal melting. Besides, the linear absorption coefficient of silicon at 250 nm (ELA) is 200 times higher than that at 800 nm (FLA) as shown in Fig. 1-6. The nonlinear absorption may play an important role in FLA. After the laser crystallization process, it is also important to put the poly-Si on TFT fabrication. Thus we can analyze the electrical characteristics and the defect state density of femtosecond laser annealed (FLA) TFT.

Dopant profile engineering is potentially a promising approach for the formation of thin insulators, short channels, and shallow junctions for scaling of transistor-based silicon devices to ~100 nm. Activation by ELA has been shown to outperform FA and even RTP (or RTA) on minimizing dopant diffusion. However, dopant diffusion during ELA-based activation is still observed by photoexcited lattice systems like thermally heated lattice systems. Therefore, FLA seems to have a high potential to reduce the lattice heating by reducing the activation duration with ultrashort laser pulses. After activation process, we can analyze the dopant profile and sheet resistance of FLA-processed sample to ensure the activation efficiency.

Since the grain size of poly-Si is one of the key features to affect electrical characteristics of TFTs such as mobility, it is important to examine the grain size of poly-Si before TFT-fabrication. Traditionally, the grain size is examined by scanning electron microscopy (SEM). However, a destructive sample preparation, such as Secco etching is required for SEM. The Secco etch, using (HF + K2Cr2O7 + H2O in a ratio of HF : H2O = 2 : 1 with 44 g K2Cr2O7 dissolved in 1 L of the H2O has been frequently used to delineate the grain boundary of poly-Si. Besides, SEM picture is limited with a tiny observation area, which can not offer the information about the grain quality in a large area. In this study, the carrier mobility of FLA poly-Si is measured by optical-pump–THz-probe (OPTP) technique.

We also measured the temporal evolution of far-infrared conductivity and refractive index of FLA poly-Si. This technique is contact-free, therefore, damage-free. The quality of poly-Si samples annealed at various pump fluence can be directly identified by OPTP technique.

1.6 Organization of thesis

In Chap. 2, the grain size of FLA-processed poly-Si is firstly analyzed in order to obtain the annealing parameter of FLA. The characteristics of FLA-processed poly-Si are also analyzed by various techniques. The electrical characteristics of FLA-processed TFTs are also measured and applied for the calculation of defect state density.

In Chap. 3, the results of dopant profile engineering by FLA will be shown. The activation parameter which is affected by various sample preparation parameters will also be shown. We will discuss the mechanisms of dopant diffusion due to ion implantation with different ions and different activation parameters. Our results show that FLA has a high potential for future application on ultra-shallow junction activation. Not only the ultra-shallow formation in silicon substrate is important, bulk germanium (Ge) gains the attention for its significantly high carrier mobility. Our preliminary results will be shown in this chapter.

The results of FLA-processed poly-Si analyzed by THz-TDS will be shown in chapter 4. Poly-Si in two different grain sizes can be easily distinguished by OPTP technique. The mobility can also be obtained by fitting the results of THz-TDS measurements with the Drude model. The reason that the increase of mobility for large grain size poly-Si measured by OPTP will be discussed.

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