LDPC Code Specifications

The low–density parity check (LDPC) coding scheme used in IEEE 802.16e OFDMA is shown in Fig. 2.8. The randomized input data are first encoded by the LDPC encoder.

Figure 2.8: LDPC coding structure in transmitter (top path) and decoding in receiver (bot-tom path).

The encoder and then interleaved by the bit interleaver. Likewise, there are three different modulation types.

LDPC codes are a special case of error correcting codes that have recently been receiving received much attention because of their very high throughput and very good decoding performance. Inherent parallelism in the message passing decoding algorithm for LDPC codes makes them very suitable for hardware implementation. The LDPC codes can be used in any digital environment that high data rate and strong error correction ability are important.

Gallager [11] proposed LDPC codes in the early 1960s, but his work received little atten-tion until after the invenatten-tion of turbo codes in 1993, which used the same concept of iterative decoding. In 1996, MacKay and Neal [12], [13] re-discovered LDPC codes. Chung et al. [14]

showed that a rate-1/2 LDPC code with block length of 10⁷ in binary input AWGN can achieve a threshold of just 0.0045 dB away from the Shannon limit.

LDPC codes have several advantages over turbo codes. First, the sum-product decoding algorithm for these codes has inherent parallelism that can be exploited to achieve a greater speed of decoding. Second, unlike turbo codes, decoding error is a detectable event which results in a more reliable system. Third, very low complexity decoders, such as the modified minimum-sum algorithm that closely approximate the sum-product in performance, can be designed for these codes.

Our interest is in both low algorithm complexity and high decoding speed, as these are both desirable under the IEEE 802.16e applications.

Complexity in iterative decoding can be divided into two types: first, complexity of the computations in each iteration and second, the number iterations. Naturally, there is a trade-off between the decoding performance and the complexity and decoding speed.

In this section, we will only discuss the LDPC encoder and decoder block. Other blocks in Fig. 2.8 are the same as in previous section.

2.3.1 Overview of LDPC Code

LDPC codes are a class of linear block codes corresponding to a sparse parity check matrix H. The term “low-density” means that the number of 1s in each row or column of H is small compared to the block length n. In other words, the density of 1s in the parity check matrix which consists of only 0s and 1s is very low and sparse. Given k information bits, the set of LDPC codewords c in the code space C of length n spans the null space of the parity check matrix H, i.e., cH^T = 0.

For a (W_c, W_r) LDPC code, each column of the parity check matrix H has W_c ones and each row has W_r ones; this is called a regular code and W_c and W_r are tenoned the column degree and the row degree, respectively. The degrees per row or column are not constant, then the code is irregular. Some of the irregular codes have shown better performance than regular ones. But irregularity results in more complex hardware and inefficiency in terms of re-usability of functional units. The IEEE 802.16e standard uses irregular codes. Moreover, the codes in 802.16e are systematic, which means that n − k redundant bits are added to k bits of message to form an n bits codeword.

LDPC codes can be represented effectively by a bipartite graph called a Tanner graph [15], [16]. A bi-partite graph is a graph (nodes or vertices are connected by undirected edges)

Figure 2.9: Tanner graph of a parity check matrix

whose nodes may be separated into two classes and where edges may only be connecting two nodes not residing in the same class. The two classes of nodes in a Tanner graph are bit nodes (or variable nodes) and check nodes. The Tanner graph of a code is drawn according to the following rule: Check node f_j , j = 1, · · · , n − k, is connected to bit node x_i, i = 1, · · · , n, whenever element h_ji in H (parity check matrix) is a one. Figure 2.9 shows a Tanner graph for a simple parity check matrix H. In this graph each bit node is connected to two check nodes (bit degree = 2) and each check node has a degree of four. Degree of a node is the number of branches that is connected to that node.

Let d_vmax and d_cmax denote the maximum variable node degree and maximum check node degree, respectively, and let λ_i and ρ_irepresent the fraction of edges emanating from variable and check nodes of degrees d(v) = i and d(c) = i, respectively. Define

λ(x) =

dX_vmax

i=2

λixⁱ⁻¹ (2.18)

as the variable node degree distribution, and

ρ(x) =

dX_cmax

i=2

ρ_ixⁱ⁻¹ (2.19)

as the check node degree distribution.

A cycle of length l in a Tanner graph is a path comprised of l edges which closes back on itself. The Tanner graph in Fig. 2.9 has a cycle of length four which has been shown in dashed lines. The girth of a Tanner graph is the minimum cycle length of the graph. The shortest possible cycle in a bi-partite graph is clearly a length-4 cycle. Short cycles have negative impact on the decoding performance of LDPC codes. Hence we would like to have large girths.

2.3.2 LDPC Code in IEEE 802.16e OFDMA [1]

The LDPC codes in IEEE 802.16e are systematic linear block codes. They are defined based on a parity check matrix H of size m×n that is expanded from a binary base matrix H_b of size m_b×n_b, where m = z·m_b and n = z·n_b. In this standard there are six different base matrices, one for the rate 1/2 code as depicted in Fig. 2.10, two different ones for two rate 2/3 codes, type A in Fig. 2.11 and type B in Fig. 2.12, two different ones for two rate 3/4 codes, type A in Fig. 2.13 and type B in Fig. 2.14, and one for the rate 5/6 code as depicted in Fig. 2.15. In these base matrices, size nb is an integer equal to 24 and the expansion factor z is an integer between 24 and 96 . Therefore, we can compute the minimal code length is n_min = 24×24 = 576 bits and the maximum is n_max = 24×96 = 2304 bits.

For codes ¹₂, ²₃B, ³₄A, ³₄B, and ⁵₆, the shift sizes p(f, i, j) for a code size corresponding to expansion factor zf are derived from p(i, j), which is the element at the ith row, jth column in the base matrices, by scaling p(i, j) proportionally as

p(f, i, j) =

(p(i, j), p(i, j) ≤ 0, b^p(i,j)z_z ^f

o c, p(i, j) > 0. (2.20)

For code ²₃A, the shift sizes p(f, i, j) are derived by using a modulo function as

p(f, i, j) =

(p(i, j), p(i, j) ≤ 0,

mod(p(i, j), z_f), p(i, j) > 0. (2.21)

Figure 2.10: Base model of the rate-1/2 code (from [1]).

Figure 2.11: Base model of the rate-2/3, type A code (from [1]).

A base matrix entry p(f, i, j) = −1 indicates a replacement with a z × z all-zero matrix and an entry p(f, i, j) ≥ 0 indicates a replacement with a z×z permutation matrix. The permutation matrix represents a circular right shift of p(f, i, j) positions. This entry p(f, i, j)

= 0 indicates a z×z identity matrix.