4.9. Load regulation, Line regulation
4.9.2. Load Regulation
The load regulation of the design converter is shown in Fig. 59.
100mV
130mV
60mA
200mA
60mA
120us
140us
Time (s)
Fig. 59. Load regulation waveform.
The load condition transforms minimal load condition 60mA into maximal load condition 200mA. Therefore, the load regulation is 0.928mV/mA. The recovery time of the load transitions for heavy load to light load, light load to heavy load are 100us and 116us respectively. The recovery time for each condition is very close because the phase margin and the crossover frequency are almost the same for the different load conditions.
4.10. Die photograph
The proposed LED driving circuit with constant current sink circuit is implemented by the VIS CMOS 0.5 um process. The die photograph is shown in Fig. 60.
R ef er en ce T ra ck in g B G & O S C 2 7 2 5 u m
Fig. 60. The die photograph.
The chip size of the designed driving circuit is 3660 um * 2725 um. The power MOSFET must be large enough to reduce the on-resistance and endure the large inductor
current during heavy load condition. Another power MOSFET is for the LED strings to regulate the LED currents. In order to minimize the voltage drop on the constant current sink circuit and sustain the LED current, the power MOSFET should be large enough to reduce the gate-source voltage, VGS. The sub-circuits are divided into four parts, such as reference tracking circuit, bandgap and oscillator circuit, controller and pre-regulator. The functions of each block are as mentioned in previous sections. The controller comprises ramp generator, voltage to current converter, current sensing, error amplifier, on-chip compensator and constant current sink unit.
Chapter 5
Conclusions, Experiment Results and Future work
5.1. Conclusions
The proposed circuit is a WLED backlight driver with an integrated 40V HV process to drive up to total 66 white LEDs. The regulator provides six-channel precise control of LED current with boost converter topologies.The circuit is simulated and fabricated by VIS 0.5um 2P3M 5V/5V and 40V/40V CMOS technology. The chip size is about 3.6 x 2.7 mm2.
The output voltage of the boost converter can be reached to around 40V. The power stage is designed by asynchronous rectification with an off-chip Schottky diode. The on-chip soft start technique can prevent the using of a large off-chip capacitor. The proposed soft-start technique is implemented by the digital circuits as mentioned in Chapter 3.
The constant current sink circuit is designed with a load dependent minimum drain circuit. It is utilized to determine minimum drain voltage according to the situation of the current through LED stings. Through a load dependent minimum drain circuit can save unnecessary power loss at the constant current sink circuit.
The propose boost converter runs from an internally generated clock. The brightness of the LED strings is controlled by an external low frequency PWM control via the PWM pin.
The normal operation temperature range is over -20℃ to 120℃.
In conclusions, the proposed driving circuit is suitable for the application such as display backlighting, LCD monitor, Notebook displays and LED accent lighting.
5.2. Measurement Module
The measurement module of the propose chip is as shown in Fig. 61. The proposed circuit and external elements are illustrated together to show the entire testing method. There are some key points should be concerned: The output capacitor should use low ESR capacitor to reduce the output voltage ripple. The low DCR inductor on the DC-DC converter is better to minimize switching current ripple and increase efficiency. The selection of Schottky diode should be fast switching and low forward-voltage to minimize power loss.
Fig. 61. The measurement module.
The power supply is utilized to offer the request voltage level. The electric load is as total LED string current and for load regulation measurement. The oscilloscope is to show the output voltage and output current waveform respectively.
5.3. Future Work
In this thesis, the proposed circuit only operates in PWM mode. The efficiency of converter is relative poor at light loads. Therefore, by means of the hybrid PFM/PWM operation the efficiency over a wide load range may be raised quite substantially. Furthermore,
the constant current sinking circuit is composed of a cascode structure in this thesis. However, a cascode structure suffers from a poor efficiency due to its’ large voltage headroom.
Therefore, the improvement of a better constant current sinking circuit is important in the future to enhance the efficiency. Finally, the fault detection is a critical issue in design of LED driver in order to enhance the reliability of the LED backlight system. Thus, the fault detection circuit such as open-loop, short circuit, over voltage, and over temperature should be added to the LED backlight system in the future.
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