Chapter 2 Optical property of LEDs and instruments
2.3 Monte Carlo raytracing
where 4πr2 is the entire surface area of the sphere with radius r.
The calculation indicates that only a fraction of the light emitted inside a semiconductor can escape from the semiconductor. This fraction is given by
)
Because the critical angle of total internal reflection for high-index materials is relatively small, the cosine term can be expanded into a power series. Neglecting higher-than
second-order terms yields
The escape problem is a significant problem for high-efficiency LEDs. In GaN and most semiconductor, the refractive index is quite high (>2.5) and thus only a few percent of the light generated in the semiconductor can escape from a planar LED. The problem is less significant in semiconductors with a small refractive index and for polymers, which have refractive indices of the order of 1.5.
2.3 Monte Carlo raytracing
TracePro is a comprehensive, versatile software tool for modeling the propagation of light in imaging and non-imaging opto-mechanical systems, as shown in Fig. 2-4. TracePro is a Monte Carlo ray tracing program that accounts for flux or light power in your optical system, as well as the irradiance or the distribution of light.
In Monte Carlo raytracing, scattering and diffraction are treated as random processes. Instead of propagating a distribution of light, discrete samples of the distribution,
(2-17)
(2-18)
(2-19)
or rays, are propagated with BSDFs (Bidirectional Scattering Distribution Functions) used as probability distributions for determining ray directions. Monte Carlo ray tracing has several advantages over finite element methods. Below list is the characteristic of this software.
• Geometry can be procedural
• No tessellation is necessary
• It is not necessary to precompute a representation for the solution
• Geometry can be duplicated using instancing
• Any type of BRDF can be handled
• Specular reflections (on any shape) are easy
• Memory consumption is low
• The accuracy is controlled at the pixel/image level
To use TracePro, we set up a model of our optical system within the program including optical and non-optical surfaces, and trace rays through the model. We can set up a model importing from a lens design program like OSLO, from a CAD program via SAT, STP, or IGS files, or by creating the solid geometry directly in TracePro. The model includes not only the geometric data specifying the surfaces and optical material data, but also the radiometric properties of the surfaces, i.e., the absorptance, reflectance, transmittance, and scattering coefficients. Rays propagate through the model with portions of the flux of each ray allocated for absorption, specular reflection and transmission, and scattering. This forms a "tree" of rays.
The flux of a ray is reduced at each ray-surface interaction, with its flux being reduced in value each time. This process continues until the flux of the ray falls below a threshold. We can run TracePro ray-traces in Analysis Mode and view the incident illuminance (or irradiance) on any surface in the model.
Fig. 2-1 Band diagram of active region of LEDs
Fig. 2-2 Reservoir analogy
Fig. 2-3 Definition of the escape cone by the critical angle θc.
Fig. 2-4 Image of Tracepro software
Θc na 90°
ns
Chapter 3
V-shape sapphire facet reflector LEDs
3.1 Monte-Carlo ray-tracing calculations
In order to investigate the fundamental of enhancement of light output with different etching time of V-shape sapphire facet reflector LEDs, we used a commercial ray-tracing software employing the Monte-Carlo algorithm for forward ray-tracing, various outputs including efficiency value, spatial distributions of radiometric and photometric data. Shape and size of the solid model for the ray-tracing calculation was shown in the Table 3-1(a), (b) and Fig. 3-1(a), (b), (c). Table 3-1(a) shown the material variable of the models ,and Table 3-1(b) shown the surface variable of the models. The wavelength and temperature in my simulation were 450 nm and 300K, respectively. Fig. 3-1(a) shown the structure of the simulated models, and Fig. 3-1(b) shown the models in the TracePro software. Because the thickness of the sapphire layer was thicker than others, the epitaxial layer was not clear in Fig.
3-1(b). Fig. 3-1(c) was a sketch of the pattern on the sapphire substrate. The circles in the figure represent holes in my models. The arrangement of the holes were hexagonal matrix ,and the distance of the center of the hole was 7 μm. The simulated models were exactly the same as the SEM images and microscopic measurements of the geometry of CWE-PSS LEDs afterward.
The solid model was built up as a combination of simple solid objects, each semiconductor layer adjacent to the other. According to the recombination process [25], light rays were generated in the active layer with a uniform random distribution. Monochromatic radiation representing the peak wavelength of the measured spectral emission (450 nm) was used in the simulation.
Fig. 3-2 (a) and (b) shown the irradiance maps of flat and etching 120sec structures. The
result of etching 120sec was better than flat, outstandingly.
The comparison of overall light extraction efficiency was plotted and shown in the Fig.
3-2(c). According to this calculation, the light extraction efficiency is dramatically enhanced with the increasing of sapphire etching time. For this result, we select etching time 120sec to fabricate V-shape sapphire facet reflector LEDs.
Fig. 3-3 show the further simulated results with long etching time from 0 to 750 sec. The output power is increase with the raise of etching time and gradually converges. This shows that we can try to fabricate patterned sapphire substrate with longer etching time in the future.
3.2 Fabrication of V-shape sapphire facet reflector LEDs 3.2.1 Process procedure
The GaN-based LEDs used in this study were grown using a low-pressure metal-organic chemical vapor deposition (Aixtron 2600G) system onto the C-face (0001) 2”-diamerter sapphire substrate. The LED layer-structure comprised a 30-nm-thick GaN nucleation layer, a 2-µm-thick undoped GaN layer, a 2-µm-thick Si-doped n-type GaN cladding layer, an un-intentionally doped active region with five periods of InGaN/GaN multiple quantum wells (MQWs), and a 0.2-µm-thick Mg-doped p-type GaN cladding layer.
Fig. 3-4(a)~(e) shows the fabrication steps of GaN-based LEDs with an Al-deposited V-shape sapphire facet reflector by double transferred and laser-lift-off (LLO) techniques. The grown wafer was patterned with square mesas 350 x 350 µm2 in size by a standard photolithographic process and was partially etched until the exposure of n-GaN to define the emitting area and n-electrode; a 300-nm-thick ITO was deposited as the transparent conductive layer and Cr/Au were then deposited as n and p electrodes and was alloyed at 200
oC in N2 atmosphere for 5 minutes [Fig. 3-4(a)]. The processed wafer was then brought into contact with a GaAs carrier using a commercially available epoxy glue (index of refraction ~
1.6 at 470 nm) at an operating temperature of 80 oC [Fig. 3-4(b)]. The bonded structure was then subjected to the LLO process [Fig. 3-4(c)]. A KrF excimer laser at a wavelength of 248 nm with a pulse width of 25 ns was used to remove the sapphire substrate. The laser with a beam size of 1.2 mm x 1.2 mm was incident from the backside of the sapphire substrate onto the sapphire/GaN interface to decompose GaN into Ga and N2. In this process, the beam size of KrF laser was larger than that of the size of the LEDs. Therefore, the laser irradiation on the interface of sapphire and GaN was uniform. The GaN thin-film was again brought into contact with the Al-deposited V-shaped sapphire facet reflector using epoxy glue at an operating temperature of 80 oC [Fig. 3-4(d)]. The fabrication of Al-deposited V-shaped sapphire facet reflector was illustrated as following: the SiO2 film with hole-patterns of a diameter of 3 µm was deposited onto the sapphire substrate by plasma-enhanced chemical vapor deposition (PECVD) and defined by standard photolithography to serve as the wet etching mask. The sapphire substrate was then wet etching using an H3PO4-based solution with an etching time of 120s and etching temperature of 250 oC. The sapphire wet-etching rate is about 0.8 µm/minute in this study and can be related to the H3PO4 composition and etching temperature [9]. A sapphire substrate with V-shape facet patterns was formed after the chemical wet etching process. A 200-nm-thick Al metal with a reflectivity of about 90 % was then deposited on the top of the V-shaped sapphire substrate by e-beam evaporation. After the re-bonding process, the GaAs carrier was removed using a NH4OH-based solution [Fig.
3-4(e)]. Thus GaN-based LEDs with high reflectivity V-shape sapphire facet reflector could be realized by adopting this what we called the double transferred technique since the LED epitaxy was firstly transferred into a sacrifice GaAs substrate and LLO process, re-transferred into a host sapphire substrate with Al-deposited V-shape reflectors. Fig. 3-5 shown the detail size of the V-shape sapphire facet reflector LEDs. The conventional LEDs have the same structure except sapphire substrate. It should also be noted that although the thermal
conductivity of epoxy glue (~0.32 W/ mK) here we used for the attaching material is lower than that of the sapphire substrate (~23W/ mK), the ability of heat dissipation of this novel structure will not be degraded due to the thin thickness of epoxy glue. By specifically adjusting the bonding pressure, the thickness of epoxy glue could be well controlled and a thickness as thin as 0.2 µm could be achieved. Therefore, the heat that generated while operating the LED can easily penetrate through the thin epoxy glue in spite of the relative low thermal conductivity, indicating that it will not exist any disadvantage in terms of heat dissipation, as comparing to the ordinary LED. The reference LED sample with exactly the same procedure, but without wet etching sapphire substrate process, was also prepared for comparison.
3.2.2 SEM images of patterned sapphire substrates
Fig. 3-6 shows scanning electron micrograph (SEM) images of the wet etched sapphire substrate. According to Fig. 3-6, the etched V-shape facet of an (0001)-oriented sapphire substrate has the R-plane {1-102} facet, and the angle against {0001} C-axis is about 57o.
This large etching slope is useful for providing appropriate slant surfaces, which are helpful to the light extraction, according to the calculated results based on the Monte-Carlo ray tracing simulation [11]. Besides, this high slope facet using chemical wet etching is difficult to achieve by using other methods, such as the ICP dry etching, and the smooth crystal facet of R-plane is quite suitable for the subsequent deposition of the metal layer serving as a reflector. Thus, a high slope and reflectivity V-shape sapphire reflector for increasing the light extraction efficiency of LEDs can be realized by adopting the sapphire wet etching process.
3.3 Characteristics of V-shape sapphire facet reflector LEDs
Fig. 3-7 shows the (a) output power (L-I curve) and (b) current-voltage (I-V curve)
characteristics of flat and V-shape Al-deposited sapphire reflector LEDs as a function of forward driving current. The L-I-V characteristics were measured with an on-wafer testing configuration, consisting of the Si detector mounted directly above the LED and the driving current being applied through the probes. It means that the power measurement is a relative axial output from the top surface of the chip. As can be seen in Fig. 3-7(a), the light output power of both structures increased continuously as the driving current was increased from 0 to 100 mA. The light output power of the V-shape sapphire facet reflector LEDs has higher output power of about 40% compared to the flat Al-deposited sapphire reflector LEDs at an injection current of 20 mA, i.e., a significant improvement attributed to the V-shape sapphire facet reflector to effectively reflect the emission light toward to the chip surface. In Fig.
3-7(b), about 3.3 V of forward voltages was measured on both devices at the injection current of 20 mA and no significant difference of the I-V curves were observed under the measurement condition of the driving current up to 100 mA, indicating that a feasible process for high brightness GaN-based LEDs was achieved without electrical damage.
In order to realize the enhancement mechanism of output power by adopting the V-shape sapphire facet reflector, the top view light-emission of LEDs were observed by charge-coupled device (CCD) and the obtained images are shown in Fig. 3-8 The photograph of the GaN-based V-shape Al-deposited sapphire reflector LED without current driving is shown in Fig. 3-8(a). According to this figure, a V-shape sapphire facet reflector is successfully attached to the LED epitaxy using double transferred technique. Fig. 3-8(b) shows the light-emission image of the enlarged photograph of area A in Fig. 3-8(a) under a driving current of 20 mA. In this figure, the emitting light from the LED mesa edge is redirected toward to the axial direction by the V-shape sapphire facet reflector, thus higher intensity was observed on the individual V-shape pattern than that on other regions, indicating that employing the V-shape sapphire facet reflector has the superior benefit for improving the
light extraction efficiency by effectively redirecting the guided light in side the LED chip toward to the top escape cone.
(a)
thickness index
sapphire 90 μm 1.7
epoxy glue 0.2 μm 1.6
n-GaN 4 μm 2.45
InGaN of MQW 3 nm 2.65
GaN of MQW 3 nm 2.45
p-GaN 0.2 μm 2.45
(b)
reflectance transmission absorptance
Al mirror 90% 0% 10%
ITO 10% 90% 0%
p-pad 50% 0% 50%
n-pad 50% 0% 50%
Table 3-1 (a) shown the material variables of the simulated models. And, (b) shown the surface variables of the models.
(a)
(b)
(C)
Fig. 3-1 (a) shown the structure of the simulated models. (b) shown the models in the TracePro software. (c) is a sketch of the pattern on the sapphire substrate.
(a)
(b)
(c)
0 30 60 90 120
0 10 20 30 40 50
Enhancement (%)
Etching time (sec)
Fig. 3-2 The Monte-Carlo ray-tracing calculated results of radiation patterns of the calculated enhancement on the light extraction efficiency with the increasing of sapphire etching time. (a) and (b) shown the irradiance maps of flat and etching 120sec structures. (c) shown the comparison of overall light extraction efficiency.
0 100 200 300 400 500 600 700 800 0
20 40 60 80 100
Enhancement (%)
Etching time (sec)
Fig. 3-3 show the simulated results with long etching time from 0 to 750 sec.
Fig. 3-4 Schematic of fabrication steps for GaN LEDs with sapphire facet mirror adopting double-transferred technique.
Fig. 3-5 shown the detail size of the V-shape sapphire facet reflector LEDs. The conventional LEDs have the same structure except sapphire substrate.
(a)
Fig. 3-6 SEM images of the wet etching sapphire substrate with R-plane of {1-102}. (a) top view , (b) and (c) cross-section side view images.
(a)
(c)
(b)
(b)
Fig. 3-7 (a)The output power (L-I curve) and (b) current-voltage (I-V curve) characteristics of flat and V-shape Al-deposited sapphire reflector LEDs as a function of forward driving current.
Fig. 3-8 The top view light-emission images. (a) Plan-view photograph of the GaN-based V-shape Al-deposited sapphire reflector LED. (b) The light-emission image of the enlarged photograph of area A in Fig. 3-8(a) under a driving current of 20 mA.
Chapter 4
Chemical wet-etched patterned sapphire substrate (CWE-PSS) LED
4.1 Fabrication of CWE-PSS LED 4.1.1 Process procedure
The GaN-based LEDs used in this study were grown using a low-pressure metal-organic chemical vapor deposition (Aixtron 2600G) system onto the C-face (0001) 2”-diamerter chemical wet-etched patterned sapphire substrates. The LED layer-structure comprised a 30-nm-thick GaN nucleation layer, a 2-µm-thick undoped GaN layer, a 2-µm-thick Si-doped n-type GaN cladding layer, an un-intentionally doped active region of 450-nm emitting wavelength with five periods of InGaN/GaN multiple quantum wells (MQWs), and a 0.2-µm-thick Mg-doped p-type GaN cladding layer. The grown wafer was patterned with square mesas of 350 x 350 µm2 in size by a standard photolithographic process and was partially etched until the exposure of n-GaN to define the emitting area and n-electrode; a 300-nm-thick ITO was deposited as the transparent conductive layer and Cr/Au was then deposited as n and p electrodes and was alloyed at 200 oC in N2 atmosphere for 5 minutes. Fig.
4-1 shows the process chart of the GaN-based LED grown on CWE-PSS.
For fabricating the CWE-PSS, the SiO2 film with hole-patterns of 3-µm-diameter and 3-µm-spacing was deposited onto the sapphire substrate by plasma-enhanced chemical vapor deposition (PECVD) to serve as the wet etching mask. The sapphire substrate was then wet etched using an H3PO4-based solution at an etching temperature of 300 oC. The sapphire wet-etching rate was about 1 µm/minute in this study and can be related to the H3PO4
composition and etching temperature [23-24].
4.1.2 SEM images of patterned sapphire substrates
Fig. 4-2 (a) and (b) show the SEM images of the pattern sapphire substrate of the etching time of 90s and 120s, respectively. In Fig. 4-2(a), the crystallography-etched pattern of an (0001)-oriented sapphire substrate has a flat-surface of {0001} C-plane with triangle-shape in the center. Surrounding the triangle-shape C-plane are three facets of {1-102} R-plane with angle of 57° against the [0001] C-axis. However, due to the relative fast etching rate of C-plane than that of R-plane, the triangle-shape flat-surface of {0001} C-plane in the pattern center finally vanishes with the increasing of the etching time. As shown in Fig. 4-2(b), the {0001} C-plane is absent and only {1-102} R-plane is observed on the CWE-PSS with the etching time of 120s. Fig. 4-2(c) shows the evolution of CWE-PSS with the increasing of sapphire etching time. It should be noted that the diameter of the sapphire pattern also increases with the increasing of etching time due to the side-etching effect; however, the period of the sapphire pattern keeps the same as 6-µm. Additionally, the high slope (57°) crystallography-etched facet of CWE-PSS is hard to fabricate by dry etching and it has been demonstrated in our previous work that this inclined facet has the superior capability for improving light extraction efficiency [15].
4.2 Characteristics of CWE-PSS LED 4.2.1 The HR-XRDs of the CWE-PSS LEDs
In order to investigate the film quality of CWE-PSS LEDs, the epitaxial wafers were analyzed by the high-resolution X-ray rocking curves (Bede D1 HR-XRD). Fig. 4-3 shows the HR-XRDs of the (0002) reflection of the CWE-PSS LEDs.
The measurements over wide range (-4000~3000 arcsec) and narrow range (-100~100 arcsec) are shown in Fig. 4-3(a) and Fig. 4-3(b), respectively. In Fig. 4-3(a), the same location of satellite-peaks over the wide measurement range for the conventional (sapphire etching
time of 0s) and all CWE-PSS LEDs indicates that the LED composition and growth rate were not associated with the CWE-PSS. However, according to Fig. 4-3(b), the full-width at half-maximum (FWHM) of main peak was about 40 arcsec for the conventional LED and was about 30 arcsec for all CWE-PSS LEDs. An obvious broad shoulder was observed near the main peak for the conventional LED. It suggested that the better crystalline quality was achieved on CWE-PSS LEDs and was consistent with the well accepted concept that the growth on the pattern sapphire substrate exhibited a considerable improvement on internal quantum efficiency by reducing the threading dislocation density, no matter on dry etching or chemical wet etching patterned sapphire substrates [16-22].
4.2.2 L-I measurement and external quantum efficiency
For comparing the LED performances with different crystallography-etched facet patterns, the sapphire substrates of etching times of 0s, 30s, 60s, 90s, and 120s, were employed into this report. All of these CWE-PSSs were then grown and processed at the same time, eliminating any artificial issue during LED fabrication. The LED chips were packaged into TO-18 without epoxy resin for the subsequent measurement. The typical light-current-voltage (L-I-V) measurements were performed using a high current measure unit (KEITHLEY 240).
The light output power of the LEDs was measured using an integrated sphere with a calibrated power meter.
Fig. 4-4(a) shows the measurement results of room temperature output power (L-I curve) of conventional and CWE-PSS LEDs as a function of the forward-bias current. In this figure, all the CWE-PSS LEDs demonstrate a significant improvement on output power as comparing to the conventional LED under our measurement condition up to 200 mA. The enhanced factor of output power of CWE-PSS LEDs compared to the conventional LED at a driving current of 20 mA is shown in Fig. 4-4(b). According to this figure, the optimized CWE-PSS condition was achieved on the etching time of 90s, corresponding to an enhanced
factor of output power of 1.4. Fig. 4-4(c) shows the external quantum efficiency (EQE) of the
factor of output power of 1.4. Fig. 4-4(c) shows the external quantum efficiency (EQE) of the