• 沒有找到結果。

Chapter 2 Oscillators

2.4 Design Considerations

2.4.5 Noise Power Trade off

In a physical oscillator design, it is always a trade off between power dissipation and noise.

If the output voltages of N identical oscillators are added in phase, shown as Fig 2.14, then the total carrier power is multiplied by N², whereas the noise power increases by N. Thus, the phase noise decreases by a factor N at the cost of proportional increase in power dissipation.

Figure 2.14 Addition of the output voltages of N oscillators

Following parameters must be taken into account, the center frequency ω0, the power dissipation P and the offset frequency ω. Thus, the phase noise power of different oscillators must be normalized to (ω0/Δω)2/P for a fair comparison.

2.4.6 Effect of Frequency Division and Multiplication

Since frequency and phase are related by a linear operator, division of frequency by a factor

N is identical to division of phase by the same factor. For a nominally periodic

sinusoid, , where represents the phase noise, a frequency divider simply divides the total phase by N, Equation (2.6).

= ⎢⎣ + ⎥⎦ (2.6) t N

A N

x /N cos ⎡ n(t)⎤

1 ω φ

t) cos

[

c n( )

]

( A t t

x = ω +φ φnt

where the phase noise contributed by divider is neglected. This indicates that magnitude of phase noise at given offset frequency is divided by N, and from narrowband FM

approximation the phase noise power is divided by N². A similar analysis shows that frequency multiplication raises the phase noise magnitude by the same factor.

2.4.7 Pulling and Pushing

Assumed that the magnitude of the noise injected into the signal path is much less than that of the carrier, thereby arriving at a noise shaping function for oscillators. An interesting phenomenon is observed if the injected component is close to the carrier frequency and has a comparable magnitude, shown as Fig 2.15. As the magnitude of the noise increases, the carrier frequency may shift toward the noise frequency ωn and eventually “lock” to that frequency called “injection pulling”.

Figure 2.15 Injection pulling of an oscillator as the noise amplitude increases

In a transceiver environment, various sources can introduce oscillator pulling. As like a power amplifier output may couple to LO and injection pulling arises in the receive path when the desired signal is accompanied by a large interferer, shown as Fig 2.16. If the interferer frequency is close to the LO frequency, coupling through the mixer may pull ωLO toward

ωint. Thus, the VCO must be followed by a buffer stage with high reverse isolation. However, the noise of such a stage may increase the noise figure of the mixer.

Figure 2.16 Injection pulling due to large interferer

Fig 2.17 illustrates a GFSK modulator system, a topology used in DECT transmitters. This VCO first placed in a feedback loop so as to stabilize its output frequency. Subsequently, the control voltage of the VCO is switched to the baseband signal, allowing the VCO to function as a frequency modulator. However, the open loop operation makes the VCO frequency quite sensitive to variations in the load impedance “load pulling”. In particular, as the power

amplifier turns on and off periodically to save energy, the VCO center frequency changes considerably, demanding a high isolation stage between the VCO and the PA.

Figure 2.17 Load pulling due to variation of impedance

RF oscillators in general exhibit a poor supply rejection. If the supply voltage varies, so do the reverse to voltage across the varactor and the frequency of oscillation. In RF design, this is called “supply pushing”. An important case of supply pushing occurs in portable transceivers when the power amplifier turns on and off. Owing to the finite output impedance of the battery, the supply voltage may vary by several hundred millivolts.

Chapter 3 Bipolar and CMOS LC Oscillator

This chapter introduces several kinds of LC oscillators fabricated by CMOS and Bipolar.

Analyze its topology and equivalent circuit to trace what design issue influences its entire function? Discuss with some novel VCO designs understanding their merit and drawback.

Basically, the design considerations of a VCO design always takes care of phase noise, Q and so on. In RF application, it should have a good trade-off between these considerations, as described in chapter 2.

3.1 Negative-G

m

Oscillators

Figure 3.1 (a) Addition of active buffer in feedback loop of a Colpitts oscillator, (b) implementation of buffer with an emitter follower, (c) differential implementation of (b)

In Fig 3.1, an active buffer B1 is interposed between the collector and the emitter, presenting a relatively high impedance to the bank. The buffer B1 can be implemented as an emitter (or source) follower. Note that the base of Q1 is connected to Vcc to have the same dc voltage as the base of Q2. The circuit can also incorporate two inductors to operate differentially, shown as Fig 3.1(c). However, if the inductors are off-chip, bond wire parasitics make it difficult to achieve a small phase mismatch between the two tanks.

The feedback oscillator of Fig 3.1(c) can be viewed as a one port implementation as well.

Calculating the impedance seen at the collector of Q1 and Q2, shown as Fig 3.2. Note that positive feedback yield Equation (3.1). Thus, if |Rin| is less than or equal to the equivalent parallel resistance of the tank, the circuit oscillates. This topology is called a “negative-Gm oscillator”.

(3.1) in

g

m

R = / − 2

Figure 3.2 Circuit to calculate the input impedance of cross-coupled pair

In addition to contributing noise, Q1 and Q2 in Fig 3.1(c) saturate heavily if the peak swing at nodes X and Y exceeds approximately 400 mV. To resolve this issue, a capacitive divider can be inserted in the feedback path, shown as Fig 3.3, allowing greater swings and higher common mode level at nodes X and Y than at the bases of Q1 and Q2.

Figure 3.3 Capacitive division in feedback path of an oscillator

The negative-Gm oscillator can also be implemented in MOS technology, shown as Fig 3.4.

Figure 3.4 CMOS oscillators, (a) output referred to VDD, (b) output referred to ground,

(c) Differential operation with one inductor

3.2 Interpolative Oscillators

Figure 3.5 Interpolative oscillator

The frequency of VCOs can be varied by adjusting the tank capacitance or inductance. An interpolative oscillator provides an alternative tuning mechanism by employing more than one resonator. Fig 3.5 illustrates a feedback oscillatory system incorporating two transfer functions, H1(s) and H2(s), whose outputs are scaled by variable factors α1 andα2, respectively, and summed. The overall open loop transfer function is therefore equal to H(s)=

α1 H1(s)+α2 H2(s), which must equal +1 for the system to oscillate. In the extreme cases whereα1=0 orα2=0, the oscillation frequency, ωc, is determined by only H1(s) or H2(s), and for intermediate values ofα1 andα2, ωc can be “interpolated” between its lower and upper bounds. Of course, this occurs only if the roots of H(s)-1=0 move in a “well-behaved” manner from one extreme to the other.

Figure 3.6 Interpolative oscillator using two tanks

In Fig 3.6, it shows a conceptual illustration of the oscillator. R1 and R2 denote the equivalent parallel resistance of each tank. For the system to oscillate, the open loop transfer function must equal unity.

1 + 2 − =0 (3.2)

+L R R

R α

α

It assumes Equation (3.2) that has a unique set of conjugate roots on the imaginary axis or in the right half plane, then the circuit oscillates at a single frequency.

Fig 3.7 illustrates that the resonance frequencies of the two tanks, ω1 andω2 are far apart.

It plots the open loop gain and phase of such an oscillator, revealing two frequencies at which the total phase is zero and the gain is greater than unity. As a consequence, the circuit may oscillate at more than one frequency. It can be shown that the maximum spacing betweenω1 andω2 that avoids this effect is equal to , where the two tanks are assumed to have equal Q. Interpolative oscillators exhibit a trade-off between the phase noise and the tuning range.

Figure 3.7 Open loop gain and phase of an interpolative oscillator

3.3 Experimental VCO designs

3.3.1 A 21.5/43-GHz Dual Frequency Balanced Colpitts VCO

Figure 3.8 21.5/43-GHz Dual Frequency Balanced Colpitts VCO circuit schematic

The circuit schematic is shown in Fig 3.8. Two single common base Colpitts VCOs are synchronized at the base terminals and through the varactors between the emitter terminals.

The resulting balanced VCO operates differentially and virtual ac grounds are formed at the

base terminals and at the node between the varactors. Thus, each half of the balanced VCO circuit behaves like a single Colpitts VCO. The two parts operate in anti-phase at the fundamental frequency, which is collected differentially at the collectors. The second harmonic is probed directly at node, shown in Fig 3.8, where the fundamental frequency components cancel, while the second harmonics add constructively. Four varactors, which are placed between the two emitters, are tuned differentially by Vtune+ and Vtune-, which are related to the reverse bias across each varactor, Vtune, through, Equation (3.3),

(3.3)

,where represents the dc voltage at the emitter, which is 0.4 V according to simulation.

Common mode noise voltages result in changing capacitance of and in opposite directions, thus leaving the total capacitance of the parallel connection unchanged. This increases the frequency stability, i.e., reduces phase noise when differentially tuned. Simulation shows that the phase noise of a VCO using four varactors is about 3 dB lower than using two varactors.

No output buffer is used in this design. The capacitors used for ac coupling to a 50Ohm load resistor are chosen as small as 50 fF to prevent the resonator from being heavily loaded. This is a major reason for the low output power obtained in this design.

In the VCO design, small signal analysis is carried out first. Loop gain and phase shift are estimated with respect to varying inductance, capacitance, transistor size, and bias conditions.

The VCO oscillation frequency is then determined by fulfilling the well-known oscillation

conditions, i.e., zero phase shift and larger-than-unity loop gain. Second, harmonic balance analysis is used to calculate the phase noise. The ratio of C1 to C2 is crucial to both phase noise and loop gain and is chosen carefully by simulations. Relatively large sized transistors are used to reduce the base resistance and minimize 1/f noise. However, a too large transistor size should be avoided, since large parasitic capacitances lower tuning range. Proper bias currents in the VCO are also very important for the phase noise and loop gain. Large currents result in large voltage swings in the resonator, thus reducing phase noise. On the other hand, a transistor operating under large bias currents contribute significant shot noise to the circuit.

The voltage swing in the resonator is limited by the breakdown voltage of the transistors. The open-base collector–emitter breakdown voltage, BVCEO, in the technology used here is 2.5 V.

Our VCE simulated has a peak-to-peak value of 3 V. This 20% excess in VCE over the BVCEO should not raise much reliability concern, since the impedance seen by the base is less than infinity. Finally, optimization is carried out automatically toward low phase noise through fine tuning of the components’ values and bias conditions.

A balanced Colpitts VCO has been presented, which has a 21.5 GHz differential output and a 43 GHz single ended output. Excellent low phase noise characteristics are achieved. This demonstrates the great potential of using the VCO topology presented here for low-cost, low-phase-noise, and high-frequency signal generators, possibly up to 60 GHz [12].

3.3.2 A Switched Resonators Applied in a Dual-Band LC Tuned VCO

A switched resonator concept, which can be used to reduce the size of multiple band RF systems and which allows better tradeoff between phase noise and power consumption, is demonstrated using a dual band voltage controlled oscillator in a 0.18 µm CMOS process. To maximize Q of the switched resonator when the switch is on, the mutual inductance between the inductors should be kept low and the switch transistor size should be optimized. The quality factor of switched resonators is ~30% lower than that of a standalone inductor. This work operates on 0.9 GHz and 1.8 GHz dual band frequency.

Figure 3.9 Schematic of dual band VCO

The proliferation of wireless applications is rapidly increasing the demand for low cost communication terminals, which can support multiple standards and frequency bands. In response to this, multi-band terminals using multiple RF transceivers have been reported.

However, increases die area or chip count in a radio, which, in turn, increases cost and

complexity of radios. A way to mitigate this is the use of a tunable/programmable transceiver consisting of a tunable low-noise amplifier, buffers and mixers, and a voltage controlled oscillator with a wide tuning range. To realize the tunable RF blocks, the variable inductor concept has been previously reported and utilized first in a VCO. The VCO partially relies on the changes in series resistance of an inductor to attain continuous variations of effective inductance. This resistance, however, significantly degrades of the resonator and phase noise of the VCO. To reduce the degradation of phase noise, a switched resonator concept, shown as dotted rectangle in Fig 3.9 is proposed and demonstrated in a dual band VCO, and a VCO with a tuning range greater than 50% and excellent phase noise performance. In this work, the measured and simulated characteristics of switched resonators including the quality factor are reported. Analytical expressions, which explain the behaviors of switched resonators, as well as the design considerations and approaches to improve their properties are presented. Lastly, this work suggests that a dual band VCO using switched resonators can have the same phase noise and power consumption while occupying a smaller area than that for two VCOs needed to cover the two bands.

Fig 3.10(a) and (b) shows switched resonators including mutual inductance (M). The inductance seen between ports 1 and 2 are changed by turning the switch transistor Msw on and off. The equivalent circuit of the switched resonator is shown in Fig 3.10 (c). In the case that port 2 is grounded and that L1 and L2 have no mutual effect (M=0), the resonator is

simplified into the circuit in Fig 3.10 (d) when the switch is on, and into the circuit in Fig.

3.10 (e) when off. When the switch is off, the inductance of switched resonator is largely determined by the two inductors while the capacitance is determined by the parasitic

capacitances (CpL1’s and CpL2) of the inductors and the capacitances (Cdb and Cgd) at the drain of the switch transistor. The extracted inductance using measurements and the simple inductor model is lower due to the effects of Cgd in series with Cgs, and Cdb of the switch transistor (M4). When the switch is on, the channel resistance is close to zero. The inductance and capacitance of the switched resonator are switched by shorting out L2, the capacitances associated with L2, L1, and the switch transistor. The inductance is approximately L1 and the capacitance is Cp1, thus, leading to simultaneous decreases of inductance and capacitance [13].

Figure 3.10 (a) and (b) Two-use configurations of a switched resonator. (c) An equivalent circuit of a switched resonator in (a). (d) The equivalent circuit when port 2 is ac grounded and the switch is on. (e) The equivalent circuit when the switch is off.

3.3.3 A Low phase noise VCO design with Symmetrical Inductor

When a symmetric inductor is driven differentially, voltages on adjacent conductors are in anti-phase but currents flow in the same direction on each side. This increases the overall magnetic flows as Fig 3.11 and Fig 3.12. The equivalent circuit of inductor is shown in Fig 3.13. In the high frequency operation, the substrate parasitic C and R involved. For the differential excitation, these parasitic effects have higher impedance than in the single-ended

connection. Obviously, this reduces the real part and reactive component of the input

impedance. Therefore, the inductor Q factor is better and yields a wider operating bandwidth.

In this work, this argument is well proved by the measurements of single ended and differential inductors.

Figure 3.11 Two single inductor excitation

Figure 3.12 Differential inductor with center tap excitation

Figure 3.13 Inductor equivalent circuit model

The inductor area can be saved as 50% when using differential inductor without sacrificing its performances. The equivalent model as shown in Fig 3.14 can be easily constructed for Spice-like simulator. Something needed to notice here, that the model is three ports. In the differential application, the centre point is a virtual ground as illustrated in port 3. The port 3 can be widely use as the dc supply or ground. Since the advantages of symmetrical

inductors as mentioned before, the symmetrical VCO will be the better choice for a low phase noise design.

Figure 3.14 Spice-like equivalent circuit

The work presented a design methodology of C-band VCO using 0.35 µm CMOS low cost process. The single-ended and symmetrical driven inductors are thoroughly investigated, designed, and measured. A general three port model for a symmetrical driven inductor is well established in this work. These two types’ inductors are applied for the low phase noise VCO design. The symmetrical driven VCO achieves a phase noise of -112dBc/Hz at a frequency offset of 1MHz from the carrier which yields 10 dB improvements in comparison to that of single-ended driven VCO [14].

Chapter 4 Multi-section Resonator VCO applied for UWB 4.1 Introduction of Ultra Wideband

Figure 4.1 Occupied frequency of different protocol

The release of the first worldwide official ultra-wideband (UWB) emission masks by the U.S. Federal Communication Commission (FCC) in February 2002 opened the way, at least in the U.S., to the development of commercial UWB products. The strong power limitations set by the FCC determined as a natural consequence the application scenarios suitable for UWB communications, that is, either high data rates (HDRs) over short ranges, dealt with by the IEEE 802.15.3a Task Group, or low data rates (LDRs) over medium-to-long ranges, within the IEEE 802.15.4a Task Group.

Different UWB high data rate physical layer (HDR-PHY) submissions to the 802.15.3a Task Group converged into two main proposals: the multi-band orthogonal frequency division multiplexing (MB-OFDM) solution, based on the transmission of continuous OFDM signals combined with frequency hopping (FH) over instantaneous frequency bandwidths of 528 MHz, and the direct-sequence (DS) UWB proposal, based on impulse radio transmission of UWB DS-coded pulses. As the main focus targeted HDR, final standard specifications

lacked requirements on ranging, while a well-known feature of UWB is to allow accurate distance estimation and potentially enable joint communications and ranging. In any case, both MB-OFDM and DS-UWB adopt bandwidths exceeding 500 MHz for UWB emissions in compliance with the UWB definition given by the FCC and can thus provide, when specified, high ranging accuracy.

The UWB good ranging potential was particularly emphasized for location-aware

applications in ad-hoc and sensor networks; the introduction of positioning in LDR networks forms the main concern of the recent IEEE 802.15.4a Task Group, and impulse radio UWB (IR-UWB) radio was proposed as a possible radio transmission technique [15].

4.2 Proposal VCO design

Figure 4.2 Proposal multi-section VCO equivalent circuit

Base on considering the coverage range of Ultra Wideband and saving the area of physical layout, refer to section 3.3.2 and 3.3.3. If this work uses different single inductance to fulfill this bandwidth 3.1 GHz~10.6 GHz, its die will enlarge very much and mutual inductance will be unpredictably causing electrical characteristic dropping. The proposal circuit schematic is shown as Fig 4.2. It generates four different sections of resonating frequencies, because of tuning range limitation, to assemble the entire frequency bandwidth. Le1 andLe2 are

inductance adjustable to this proposal LC tank. Note that deciding an inductor to afford the bandwidth 3.0 GHz~4.0 GHz, and this inductor should have high Q factor to be a high equivalent resistance of this LC tank, shown in Fig 4.3.

Figure 4.3 Simplified LC tank equivalent circuit

(4.1) Req= (1+Q2R

The three sections built on the same model of L, Req, Equation (4.1), to each section

inductance still keeps enough to feed start-up oscillation condition, . Q factor, line width, inductance and mutual inductance must be taken into consideration in this

proposal design. Utilize Ansoft designer V2 to analyze the EM effect of Le1 andLe2 modified by inductor model type “standard“ of TSMC 0.18μm, shown in Fig 4.4.

proposal design. Utilize Ansoft designer V2 to analyze the EM effect of Le1 andLe2 modified by inductor model type “standard“ of TSMC 0.18μm, shown in Fig 4.4.

相關文件