Nonlinear Amplifier

As 2.2.3 introduces, another approach of PA is to use the device as a switch, the reasoning being that a switch ideally dissipates no power, for there is either zero voltage across it or zero current through it. Since the switch’s I-V product is therefore always zero, the transistor dissipates no power and the theoretical efficiency must be 100%. The trade-off is poor linearity due to the switching nature. Therefore, switched-mode power amplifiers can only be suitable for the systems with constant envelope modulation scheme.

z Class D PA

The typical circuit of Class D PA is shown in Figure 3.1. Driving signals are applied to the gates in opposite polarities. The FETs are biased at the verge of conduction and the drive causes them to switch on and off alternately.

Figure 3.1 Schematic of Class D PA

During the half cycle when M1 is on, Vdrain1 = 0, hence a voltage –VCC is coupled to the output-transformer network. During the half cycle when M2 is on, a voltage of +VCC is similarly coupled to the output-transformer network. Since the voltage at the dc feed-point is fixed at V^CC, the drain voltage waveforms are square waves with levels of 2VCC and 0.

The fundamental frequency component of the square wave on the output of T2

passes through the output filter to become the output voltage. The sinusoidal current following in the series-tuned output filter requires a corresponding current to flow through one drain or the other. The drain current waveforms are therefore half sinusoids. The current flowing into the dc feed-point of T1 is the sum of i and _D1 i , and is therefore a full wave rectified sinusoid. Ideally, the drain voltage is zero D2

when the drain current is flowing, and the drain current is zero when the drain voltage is not. Consequently, an ideal Class D amplifier is 100% efficient.

One practical problem with this PA is that there is no such thing as a perfect switch. Nonzero saturation voltage guarantees static dissipation in the switches while finite switching speeds imply that the switch I-V product is nonzero during the transitions. Hence, switch-mode PA’s function well only at frequencies substantially below f . Furthermore a particularly serous reduction in efficiency can result in _T bipolar implementations if, due to charge storage in saturation, one transistor fails to

turn completely off before the other turns on. Transformer action then attempts to apply the full supply voltage across the device that is not yet off, and the I-V product can be quite large.

z Class E PA

Figure 3.2 shows a conceptual picture of a Class E power amplifier. In operation, the input signal Vin toggles the switch (M1) periodically with approximately 50%

duty cycle. When the switch is on, a linearly increasing current is built up through the inductor. At the moment the switch is turned off, this current is steered into the capacitor C1, causing the voltage across the switch Vs to rise. The tuned network is designed such that in steady state, Vs returns to zero with a zero slope, immediately before the switch is turned on. The fundamental component of Vs then selectively passes through the band-pass filter (C2 and L1) to the load, creating a sinusoidal output that is synchronized in phase and frequency with the input. In practical applications, Vin may be phase or frequency modulated, in which case the information embedded in the modulation is also passed to the output with a power amplification.

Figure 3.2 Schematic of Class E PA

In practice, the on/off transitions of the transistor will cause the drain voltage and current to be simultaneously non-zero for a short period of time, resulting in additional small power loss. This is aggravated giga-Hertz operation, since the signal

period is reduced, while the transistors’ transition times remain unchanged. Thus, a major design aspect of RF Class E PA’s is concerned with minimizing this transition loss. Moreover, Class E PA faces a problem of poor power capability (even worse than Class A) [34]. As a result, practical implementations of the Class E amplifier do not exhibit significantly superior efficiency to well-executed designs of other types.

z Class F PA

A Class F power amplifier improves efficiency and output power capability (over that of Class A) by using selected harmonic to shape its drain voltage and current waveforms. The circuit of a genetic Class F PA is shown in Figure 3.3(a). The basic principles of operation are as follows:

(a) Fundamental frequency drain voltage and current are shifted in phase by 180^° from each other.

(b) One drain waveform (e.g., voltage) adds odd harmonics to build its shape to a square wave (Figure 3.3(b)).

(c) The other drain waveform (e.g., current) adds even harmonics to build its shape toward a half sine wave (Figure 3.3(b)).

(d) No power is generated at the harmonics because there is either no voltage or no current present at a given harmonic. Harmonic impedances are either zero or infinite.

(e) At microwave frequencies, the number of harmonics is usually relatively small.

(f) The RF power device acts as a saturating current source (e.g., a soft switch).

Only when all harmonics are properly terminated can it act as a true switch.

Negative voltage and current are not permitted.

(a) (b)

Figure 3.3 Class F PA (a)schematic (b)drain voltage and current waveforms

In Figure 3.3(b), it’s noticed that the drain voltage waveform is a square wave while the drain current is a half-rectified sinusoid. From the output waveforms it’s also noticed that in the ideal case, there is no overlapping between the drain voltage and current waveform. This suggests that the maximum achievable power efficiency of the PA is 100%, since there is no power loss in the output waveform. To accomplish this behavior, the active device has a bias point at the cutoff region (Class B) for switching operation.

The configuration in Figure 3.4 is also called “flattening”, the loading network of which only consists of parallel resonant filters tuned to the fundamental and third harmonic components.

Figure 3.4 Phase vs. relative voltage of an ideal third order network

Note that the voltage of a third order network shown in Figure 3.3(a)

approximates a square wave, which, just like Class D and Class E PA’s, causes inevitably power dissipation due to the little overlap between the output voltage and current waveform.

z Comparisons

Unfortunately, only two types of amplifier tunings appropriate for high- frequency operation, i.e., Class E and Class F, have been explored. They have found most application as a higher performance alternative to Class D PA’s because they may be implemented with a relatively simple circuit.

On the other hand, although Raab has shown that the efficiencies of properly tuned class E and Class F are identical when the efficiency is limited primarily the harmonic content of the waveforms [41], the case wherein the transistor is switching nearly ideally and the efficiency is limited primarily by the device’s on-resistance would seem to favor Class F with their reduced peak drain voltages (Vpeak = 3.6Vcc and 2Vcc for Class E and Class F, respectively). Additionally, the allowable output capacitance in the Class E case is limited. The switch parallel capacitance C1 (in Figure 3.2), which must be at least as large as the transistor output capacitance, is determined by the output power, DC voltage, and operating frequency. This restriction on the size of the transistor can limit the performance of Class E amplifiers [42]. Class F tunings, however, can, in principle, utilize a transistor with any output capacitance provided that it is properly resonated out at the appropriate frequencies. Although this approach might be used to resonate part of the output capacitance of a Class E tuned transistor at each harmonic, the resulting circuit complexity would be at least that of Class F.

Prior to the availability of switching transistors suitable for Class D and Class E amplifiers, Class F would be our choice for this power amplifier design.

3.3 Circuit Design

In this work, two TSMC 0.35 mµ 3P3M Si/SiGe BiCMOS 2.4-GHz Class F power amplifiers for Bluetooth application are designed, and the proposed schematics are shown in Figure 3.5.

(a)

(b)

Figure 3.5 Schematics of (a)the first (b)the second designed Class F power amplifiers

The first Class F power amplifier contains on-chip HBT, DC-blocking capacitors, and a RFC for base bias, the input/output matching networks and the harmonic loading network are implemented on PCB. The second one is a fully integrated Class

F power amplifier, leaving only the output matching network off-chip. The RFC for power feeding of both amplifiers also utilize Murata lumped elements for the concern of current density. The design concepts will be illustrated as follows.

3.3.1 Device Size and Bias Point

The desired output power at 1-dB compression point is 20dBm for Bluetooth Class 1, and the expected power efficiency is about 60% and 40% for the 1^st and 2^nd power amplifiers, respectively. Since the transistor of Class F power amplifier acts as a switch, Class B bias point is chosen. Moreover, a 6-V high voltage HBT is utilized to withstand large output voltage swing. The transistors T1 and T2 in Figure 3.5 are identical, and composed of two parallel HBTs. The total emitter length is 162.4 mµ , with single emitter length/width of 20.3/0.9 mµ .

Figure 3.6(a) is the curve of IDC vs. VBE @ VCE = 6.0-V, which indicates that the turn-on voltage of the transistor is about 0.8V, the desired bias point. The IV-curve of the Class F power amplifiers is shown in Figure 3.6(b). The bias current at which no input power is 4.3mA, for Class F power amplifier, however, the dc current as well as the output optimum load, depends on the input power. As a result, the dc current at the input 1-dB compression point (about 10dBm) is about 50mA for both designs.

VBE (V)

0.70 0.75 0.80 0.85 0.90

IDC (A)