Pad/Layer Assignment for Free-Assignment Nets

After the escape routing stage, we construct a flow network and apply the minimum-cost maximum-flow (MCMF) algorithm [1] to assign all free-assignment I/O pads to the fan-in region (the escaped routes and the outermost bump pads of bump pad arrays inside the chips) and the fan-out region (the fan-out bump pads). We refer to the outermost bump pads of bump pad arrays inside the chips as boundary bump pads. Note that at this stage, we have layout information of the finished routes in the fan-in region and the layer-assignment results of pre-assignment nets (actual routes are yet to be determined). To fully integrate all the layout information into our flow network model, we remove some edges while considering the pre-assignment nets.

First, we introduce the construction of the flow network. Then, we modify the flow network considering the pre-assignment nets. Every free-assignment I/O pad and every escaped route correspond to a vertex in the flow network. For each fan-out and boundary bump pad, L duplicated vertices are created to represent the same-location bump pad on each layer, where L is the current number of layers.

To ensure that each fan-out and boundary bump pad is assigned only on one layer, another vertex as a super vertex is created for each fan-out and boundary bump pad.

In addition, two super vertices, which are the source vertex and the sink vertex, are created in the flow network. There are six types of directed edges:

• Edges from the vertex for a free-assignment I/O pad to the L duplicated vertices for a fan-out bump pad or a neighboring boundary bump pad.

• Edge from the vertex for a free-assignment I/O pad to the vertex for a neigh-boring escaped route.

• Edges from the L duplicated vertices for a fan-out bump pad or boundary bump pad to the super vertex for the same bump pad.

• Edge from the source vertex to the vertex for a free-assignment I/O pad.

• Edge from the super vertex for a fan-out bump pad or boundary bump pad to the sink vertex.

• Edge from the vertex for an escaped route to the sink vertex.

Every edge has a unit capacity. The edge cost of the first type is the Euclidian distance between the two pads. The edge cost of the second type is the wirelength of the escaped route plus the Euclidian distance between the I/O pad and the bump pad array boundary location of the escaped route. All the other edges have zero costs.

To consider the pre-assignment nets, we need to remove some edges in the flow network to avoid potential detours or routing failures. As shown in Figure 3.7(a), assigning the I/O pad q¹₁ to the bump pad b^o₃ would lead to an inevitable detour, due to the bottom pre-assignment net. We use the concentric-circle model to identify edges which might lead to detours and remove them. For each chip on each layer, we first construct a concentric-circle model with bonds of the pre-assignment nets of the chip on the layer. Taking Figures 3.7(a) and (b) as an example, the gray regions are to-be-checked regions (degree intervals) in which, if other nets exist, some detours might occur. Note that the method to decide the degree of an outer node is different from the one in Section 3.2. To map a pre-assignment or a free-assignment net to a bond, the degree of its outer node is decided by the angle from the positive x-axis to the segment formed by the center of the chip to the I/O pad or the bump pad.

After the construction of the concentric-circle model for each chip on each layer,

(a) (b) : pre-assignment net

: to-be-checked region/degree interval

: no-check-needed net : check-needed net

𝑞𝑞₁¹ 𝑏𝑏₁^𝑜𝑜

𝑏𝑏₃^𝑜𝑜 𝑏𝑏₂^𝑜𝑜

𝑏𝑏₂^𝑜𝑜 𝑏𝑏₃^𝑜𝑜 𝑞𝑞₁¹

𝑏𝑏₁^𝑜𝑜

Figure 3.7: An example of our concentric-circle model in the stage of pad/layer assignment for free-assignment nets. (a) A sample layout with two pre-assignment nets. q₁¹ is the I/O pad of consideration, and b^o₁, b^o₂, and b^o₃ are the candidate bump pads to be connected to. The to-be-checked regions are constructed from the perspective of the leftmost chip based on the pre-assignment nets connecting to it.

(b) The corresponding concentric-circle model of (a). The inner circle represents the leftmost chip in (a). The red and blue arcs are the degree intervals derived from the layout. Starting from q₁¹, the red ones are the ones that need to be checked whether a potential detour may occur because they overlap with the bottom to-be-checked region, whereas the blue one needs not be checked.

all the to-be-checked degree intervals are formed based on the pre-assignment nets.

We then construct an interval tree to store all the to-be-checked degree intervals for each chip on each layer. We use interval trees to decide whether edges of the overall flow network may need to be removed to avoid potential detours. Finally, we check the results obtained by the interval trees to actually remove them by the physical locations of the pads. As shown in Figure 3.7(b), the edge from q¹₁ to b^o₂ and the edge from q₁¹ to b^o₃ may need to be removed (we exclude the edge from q₁¹

Figure 3.8: Assume there is a crossing consisting of edges (the solid lines) at the layer l₁ in an MCMF result, and there are an edge between q^j_a and b^o_e at the layer l₂ and an edge between q_b^j and b^o_f at the layer l₃. This contradicts the fact that the total cost of the MCMF result is minimum.

Because we use the Euclidian distance as the cost metric (see Figure 3.8) and consider the pre-assignment nets, very few crossings will be introduced. In addition, we can distribute I/O pads to all the layers evenly by adjusting the edge costs. There is an additional cost on the edges from an I/O pad to the vertices on some layers. Because there is a minimum distance between an I/O pad and a bump pad, we can choose the additional cost small enough which would not violate the property in Figure 3.8. Hence, the result of the MCMF algorithm is a good

assignment topology which facilitates the following stages.

We have the following theorem for the time complexity of the method.

Theorem 3 The overall time complexity of this method is O(|Q| (L |B| + |Q|)²), where Q is the set of all the I/O pads, L is the current number of layers, and B is the set of all the bump pads.

Proof 3 We can construct the original flow network in O(|B| |Q|) time. The time complexity of removing undesired edges is O(|B| |Q| lg |N |+I₄), where I₄ = O(|B| |Q| |N |) is the number of intersections between the degree intervals of bonds of free-assignment nets and pre-assignment nets. The time complexity of the MCMF algorithm is O(|Q| (L |B|+|Q|)²) because the maximum flow is O(|Q|) and the number of vertices is O(L |B| + |Q|). Hence, the time complexity of the method is dominated by the MCMF algorithm.