Chapter 2 Physical Theory and Electron Mobility Model
2.2 Electron Mobility Model
2.2.5 Remote Coulomb Scattering Model due to Ionized Impurity Atoms in
In order to clarify the origin of remote Coulomb scatterers in polygate depletion region, we refer to the momentum remote Coulomb scattering rate due to ionized impurity atoms in poly side [5] for comparison with the experimentally assessed
16
additional mobility in this work. This model only considered the lowest subband in twofold valley.
The detailed descriptions for two-dimensional (2D) electron density (ni,j), total inversion layer charge density (Ninv), and the average inversion layer thickness (Zav) have been mentioned in Section.2.2.1. By using a triangular potential approximation and a variation approach, the lowest energy level (E11) and corresponding average inversion layer thickness (Z11) can be written as
2 1
where m1(=0.916×mo) is normal electron effective mass, and the space charge for depletion region (Ndep) is given by
2 si d sub
dep
N N
e
(2.44)
where φd is the surface band bending in substrate region, and is described by
,
E
F,bulk is the bulk Fermi energy in the substrate region.The previous results are used for the calculation of remote Coulomb scattering (RCS) due to impurity atoms in polysilicon depletion region. Thus, the corresponding RCS rate at scattering angle is given by contains the screening effect of inversion layer carrier on impurity atoms in
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polysilicon depletion region. The detailed process has been solved in [5], and the result is written as
The parameters in Eq.(2.44) are shown below
2
By using Eq.(2.44) – Eq.(2.46) and integrating within the polysilicon depletion region, the momentum RCS rate due to ionized impurity is written as
2
Hence the remote Coulomb-limited mobility due to doping impurity in poly side can be described as
denotes density of states in two dimensional electron gas from twofold valley, and
f
018
is Fermi-Dirac distribution function. Eventually, the resulting remote Coulomb mobility due to ionized impurity atoms in poly side with oxide thickness as a parameter is presented in Figure 2.5. Agreements are achieved (see Fig. 8 in [5]).
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Chapter 3
Experiment Framework
N-channel devices under test were fabricated in a conventional 90-nm manufacturing technology with different channel width (W) and length (L):
W/L=10/10 μm for Tox=1.65nm and W/L=1/1 μm for Tox=1.27 nm. Their SiO2 thin films were grown thermally, followed by NO annealing. Experimental C-V characteristics for W/L=10/10μm as depicted in Figure 3.1 were fitted well using a fully Schrödinger and Poisson self-consistent solver in our simulator (NEP) and by Schred [15]. NEP was employed in fitting the C-V data, and the resulting process parameters of the devices are given in Table II. In addition, the same parameter values are also extracted by the available self-consistent Schrődinger and Poisson’s equations solver Schred [15].
3.1 The Measurement Method of the Inversion-Layer Experimentally Assessed Effective Mobility
In measurement method, the conventional inversion-layer mobility is usually extracted as where Gd is drain conductance. When Ig
is small sufficiently, G
d can be presented bych d
I
V , and the channel current (Ich) should be the same as drain current (Id) and source
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current (Is). However, while gate oxides are thin enough to encounter direct tunneling current, high gate leakage current would affect the accurate determination of drain conductance (Gd ), hence the Gd is difficult to define simply by s
By following the experimental work by Takagi, et al. [18], we can know that while gate oxide thicknesses are quite thin, the drastically increased gate current (Ig) affects source current (Is) and drain current (Id) with the resulting opposite signs. The schematic diagram of current flow in MOSFETs with high gate leakage current is shown in Figure 3.2 where Is and Idcan be written as
s ch GS
I I I
(3.3)d ch GD
I I I
(3.4) where IGS and IGD are the current from the source to the gate and the current from the drain to gate, besides Is<0 and Id>0. Figure 3.2 illustrated that Is is larger than the current from the source into the channel (Ich) due to the current flows from source to gate(IGS), but Id is smaller than the current from channel to gate (Ich) because the current tunnels from drain into gate (IGD). When Vd is sufficiently small, the IGS must be the same as the IGD , hence the channel current can be defined as2
d s
ch
I I
I .Therefore, inversion layer (channel) mobility is measured by
( ( ) ( )) 1
Considering the difference between Lmask and Leff, as well as the issue about the parasitic source/ drain resistance (Rsd), Eq. (3.5) could be defined more accurate by
' '
21
L is the length of the overlap region between gate and diffusion extensions. The measured effective mobility values (μeff) are demonstrated in Figure 3.3 versus vertical effective field Eeff for two different gate oxide thicknesses.
3.2 Extraction of Source/Drain Series Resistance
Although the parasitic resistance in this research could be neglected, the issue of parasitic resistance should still be mentioned in this section in order to apply for short channel issue in the future.
First, a state-of-the-art n-MOSFET was simulated by TCAD[16] in order to restructure the experimental one. Figure 3.4 illustrates the net doping concentration near the drain edge of n-MOSFETs (
L
mask 0.065m
) used in this work. The process parameters used are gate oxide thickness (Tox) =1.27 nm, n+ polysilicon doping concentration (Npoly) =1×1020cm-3, and the p-type substrate (Psub) =4×1017cm-3. The central doping concentration inside the source/ drain extension (SDE) region is higher than 1020 cm-3.The detailed doping parameter and profile were determined by fitting the measured I-V curve at T=292 K. In this situation, the method of extracting parasitic source/ drain resistance (Rsd) with Vg-dependence can be described by [19]sd sd the source/ drain extension (SDE) and channel surfaces, which was extracted below
22
the interface 2.5 nm which belongs to inversion region, and
I was measured by
sd experiment. Eq. (3.8) regards sdsd
treated as channel resistance (
R ) with V
ch g-dependence, hence we can extract theseries resistance (
R ) by Eq. (3.8) simply. The schematic of electrostatic potential in
sd channel region at Vg=1.0 V for T=292K is also shown in Figure 3.5. Further, we discussR values under various bias conditions in three gate voltages: 0.8, 1.0, and
sd 1.2 V.The results of extracting
R value are summarized in Table III. When gate
sd voltage increases, the corresponding parasitic resistance decreases gradually.Regardless of temperatures used, it is found that
R
sd 126 at Vg=0.8 V,sd 106
R
at Vg =1.0 V, andR
sd at V99 g =1.2V. Finally, theR values
sd obtained by using this simulation study are reasonably consistent with the extracted one (R
sd 120 ) shown in [20]. Thus, we selectedR
sd 117 as process parameter in W/L= 1/1 μm.23
Chapter 4
Analysis and Discussion
In this section, the resulting universal mobility for a correlation length of the surface roughness (λ) of 14.9 Å and root mean square height of the surface roughness amplitude (Δ) of 2.6 Å, which are mentioned in section 2.2.3, was found to reproduce experimental data [17] well for two different temperatures (T=242K, 297K).
Corresponding comparison is depicted in Figure 4.1. This confirms the validity of the temperature-dependent universal mobility simulation work. Therefore, we can use the fitting parameters as reference. Since different manufacturing procedures or oxide fabrication steps may result in different universal mobility [19], [21], we took various surface roughness amplitude (Δ) into account with the other process parameters kept fixed. With aforementioned process parameters (see Table II ) as inputs, the measured effective mobility (μeff), simulated universal curves (μuni), and the calculated universal one with no remote scatterers were plotted in Figure 4.2 for Tox=1.65nm and Figure 4.3 for Tox=1.27nm, both as a function of vertical electrical field (Eeff) with Δ as a parameter. What deserves to be mentioned is that the simulated mobility curve and calculated one would be smaller than measured data in this work when Δ = 2.6 Å in Figure 4.2(a), which is the same fitting Δ values as compared with Takagi et al.[17].
The explanation is considerable that different oxide fabrication steps correspond to different additional scattering mechanisms. While the gate oxide replaced pure oxide [17] by the SiO2 film following NO annealing as used in this work, the Δ value would decrease [21]. Therefore, Δ = 2.0 Å should be substituted for Δ = 2.6 Å as upper limit of surface roughness amplitude, and due to the improvement in the progress of manufacturing processes, Δ value should be further reduced as expected. Not only
24
did the published experiment [22] show that the extracted Δ is 1.2 Å, but also the fitting range of Δ in Fischetti [6], which will be addressed in Section4.2, yielded possible Δ range of 0.8 Å- 2Å.
4.1 The Origin of Remote Coulomb Scattering Mechanism
While comparing measured effective electron mobility (μeff), the additional scattering by remote scatterers in polysilicon region can be defined by using Matthiessen’s rule as follows:
eff _
1 1 1
thick oxide add
(4.1) the resulting additional mobilities with Δ as a parameter in W/L=10/10 μm and W/L=1/1 μm are depicted in Figure 4.4 and Figure 4.5. These figures illustrate that no matter what Δ values change, the additional scattering becomes more insignificant with decreasing temperature in universal mobility dominant region (Eeff >0.7 MV/cm).
The results confirm that although we do not know the accurate Δ value in the measured samples, the simulated results all lead to one argument that the origin of remote Coulomb scattering is due to interface plasmons. The reasons are given below.
First, the conventional concept believes that a positive temperature coefficient is expected to be treated as ionized impurity atoms in polysilicon depletion region, but owing to Thomas-Fermi theory of screening effect, the higher temperature would enhance the exponential damping factor and result in the decreased screening effect, the actual trend for case of ionized impurity atoms is not so simple. In order to deal with this unknown situation, we quoted the detailed formula to calculate the remote Coulomb-limited mobility due to ionized impurity atoms in poly side as have been mentioned in Section 2.2.5. The resulting simulations are also shown in Figure 4.4 and Figure 4.5. The results point out that the calculated remote Coulomb-limited
25
mobility due to ionized impurity atoms is about two orders of magnitude larger than the experimentally assessed additional mobility.
Second, we also produced the formula of temperature-coefficient (η) to clarify the temperature-oriented trend: We can find that the temperature coefficient due to ionized impurity atoms in poly side also displays large inconsistency in comparison with experimentally additional one in this work; the results are depicted in Figure 4.6.
The extra evidence suggests that remote Coulomb scattering dominates over interface plasmons as shown in Figure 4.7 and Figure 4.8. These figures showed that the published [5],[6],[18],[23] degraded mobility values at near-room temperature can be compared with experimentally assessed additional mobility in this work at T=298K.
We can find that these additional mobilities from different processes [5],[6],[18],[23]
are all close to our additional mobility. Besides, the remote Coulomb-limited mobility due to ionized impurity atoms in poly side is again larger than the published values [5],[6],[18],[23].
Summing up the previous contentions and the trend of additional mobility for increasing temperature which can enhance the absorption and emission of interface plasmons, we assume that interface plasmons dominate remote Coulomb scattering.
4.2 The Main Source of Mobility Degradation in Polysilicon Ultrathin Gate Oxide nMOSFETs Stacks
In this section, we have to further clarify the main source which results in mobility degradation in polygate stacks. This concerns the degraded mobility due to
26
the surface roughness scattering mechanisms at the SiO2/Si substrate interface in high
E
effregion. To alleviate this hurdle, we used the calculated mobility curves to replicate
the experimental data for different temperatures simultaneously with Δ as a parameter, the fitting results are shown in Figure 4.9. These figures all point out obviously that none of the single Δ can lead to concurrent reproduction of the measured one with different temperatures in universal dominated region; hence the remote scatterers do exist in this work.Figure 4.10 illustrates that additional mobility exhibits an increasing trend in low
E
eff region or low inversion-layer sheet density (Ninv) while decreasing gradually for higher Eeff ( Ninv >5×1012cm-2). The increasing trend of additional mobility with Eeffcan be ascribed to fixed oxide charge density near SiO2/Si interface. The effect of fixed oxide charge becomes insignificant with increasing Ninv due to screening effects, and owing to decreasing screening effect with temperature, additional mobility curve at T=380K is lower than T=292K [3]. Nevertheless, in view of the applicability of Matthiessen’s rule, we only considered the high Eeff region in this work. In this situation, the effect of fixed oxide charge can be suppressed.
Figure 4.11 has shown the measured data, simulated curves, and the temperature-oriented additional mobility at Ninv =1×1013cm-2, along with the power-law relation of add T. The resulting power-law exponent γ versus Eeff is depicted in Figure 4.12. The figure reveals obviously that the γ values are all around -1.0, no matter what Eeff and Δ was adjusted.
The extra evidence is given blow. First, the simulated interface plasmons limited mobility with 1-nm gate oxide [6] in Figure 4.12 shows that the fitting γ in the same temperature region in this work is close to ours. Second, our additional mobility value is qualitatively similar with the experimentally extracted mobility [9], although we
27
cannot identify the dominated mechanisms in terms of interface plasmons in the work by Chau, et al.[9], unless we can extract the γ value to meet each other. The confirmative evidence supports that the interface plasmons are more dominant than SO phonon mode as the inversion charge density increases, as plotted in Figure 7,8 in Ref.[8]. Similar trends can be found in Figure 4.10.
Therefore, we reach the argument that Coulomb drag due to interface plasmons is the main source for degraded mobility in poly gate oxide stacks.
4.3 The Validity of Matthiessen’s rule
Finally, we want to highlight that the validity of Matthiessen’s rule in this work is adequate. Therefore, we calculated the universal mobility and the corresponding error using two different microscopic definitions:
1 1 1
The comparison results with temperatures as a parameter are shown in Figure 4.13. Obviously, although using Matthiessen’s rule would overestimate the value of universal mobility, the maximum error of universal mobility caused by using Matthiessen’s rule is below 5%. Thus, this error is insignificant as compared with the measured or simulated effective mobility difference (see Figure 4.2 and Figure 4.3). Importantly, high vertical effective electric field is involved only. Thus, the validity of Matthiessen’s rule used in this work is adequate.
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Chapter 5 Conclusion
In this work, we have experimentally established a novel temperature-dependent method to obtain additional electron mobility due to remote scatterers and its power-law temperature exponent in ultrathin gate oxide polysilicon nMOSFETs operated at high vertical effective field.
First, in a considerable range of surface roughness amplitudes (Δ), the resulting additional mobility component for mobility degradation for the first time exhibits a negative temperature coefficient (η). We also quoted the detailed formula to calculate the remote Coulomb-limited mobility due to ionized impurity atoms in polygate depletion region. The simulated result is about two orders of magnitude larger than experimentally additional mobility in this work. The temperature coefficient (η) due to impurity atoms in poly side also exhibits a large discrepancy as compared with experimental additional one. Second, the temperature exponent (γ) extracted from experimentally additional mobility points out that the interface plasmon mode is more significant than SO phonons in this work, as supported by the existing sophisticated simulation[8].
Therefore, we reasonably confirm that Coulomb drag due to interface plasmons to be the dominant remote Coulomb scatterers and the main source of degraded mobility in ultrathin gate oxide polysilicon stacks. In addition, validity of Matthiessen’s rule used in this work has been verified .
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Figure 1.1 The framework of this work in nMOSFETs to distinguish remote scatterers.
33
Figure 2.1 The energy band diagram in a poly gate/SiO2/P-substrate system.
34
Figure 2.2 The flowchart of Schrödinger and Poisson self-consistent process.
35
Figure 2.3 The calculated universal mobility (solid lines with symbols) versus vertical effective electric field with substrate doping concentration (Psub) as a parameter.
36
(a)
(b)
Figure 2.4 The simulated universal curves (solid lines with symbols) with Nsub as a parameter by different definitions of vertical effective electric field in surface roughness’s model: (a). The experimentally empirical formula. (b). The definition of vertical electric field in Eq.(2.30) [14].
37
Figure 2.5 The calculated remote Coulomb-limited mobility (symbols) due to ionized impurity atoms in polysilicon depletion region in reproducing simulated data (lines) [5], plotted versus vertical effective electric field for the three oxide thicknesses of 1, 1.5, and 2 nm.
38
Figure 3.1 The comparison of the measured (symbol) and simulated (lines) gate capacitance versus gate voltage. In addition, the dotted lines came from the self-consistent Schrödinger and Poisson’s equations solvers [15].
39
Figure 3.2 The schematic diagram for current flow of nMOSFETs with large gate tunneling current. Besides, IS>0 and Id<0.
40
(a)
(b)
Figure 3.3 Measured electron effective mobility (Solid lines with symbols) versus vertical effective electric field for (a). W/L=10/10 μm with the three temperatures of 233, 263, 298 K. (b). W/L=1/1μm with four temperatures of 292, 330, 360, and 380 K.
41
Figure 3.4 The simulated doping profile of nMOSFETs. Here, the blue color represents p-type doping and red color depicts n-type one.
42
Figure 3.5 The simulated electrostatic potential profile of nMOSFETs.
/ channel drain
is the potential which locates in the surface between drain extension region and channel region. Its value is extracted below the SiO2/Si substrate interface 2.5 nm.43
Figure 4.1 Comparison of simulated electron universal mobility curves for two temperatures of 242K and 297K in this work (dotted lines) with the experimental one (solid lines) [17].
44
(a)
(b)
Figure 4.2 Calculated effective mobility (solid lines), the simulated one (dotted lines), and the measured one (lines with symbols) for three temperatures of 233, 263, and 298 K with W/L=10/10 μm, plotted versus vertical effective electric field for (a) Δ
= 2.6 Å, (b) = 2.0 Å, (c) = 1.8 Å, (d) = 1.6 Å, (e) = 1.4 Å, and (f) = 1.2 Å.
45
(c)
(d)
Figure 4.2 Calculated effective mobility (solid lines), the simulated one (dotted lines), and the measured one (lines with symbols) for three temperatures of 233, 263, and 298 K with W/L=10/10 μm, plotted versus vertical effective electric field for (a) Δ
Figure 4.2 Calculated effective mobility (solid lines), the simulated one (dotted lines), and the measured one (lines with symbols) for three temperatures of 233, 263, and 298 K with W/L=10/10 μm, plotted versus vertical effective electric field for (a) Δ