Chap 3 Device Measurement and Characteristics
4.2 Researches about the mechanisms of NBTI
During negative bias temperature instability stress, the interface states Nit, trivalent silicon dangling bonds Si3 ≡ Si•, and fixed oxide charges (O3 ≡ Si−) are generated by the
impact of hot holes on the hydrogen-terminated Si bonds and contribute to the negative
threshold voltage shift [44],[45]. The electrochemical reactions are expressed as follows:
The holes are activated thermally and gain enough energy to dissociate the
interface/oxide defects by the vertical electrical field near the LDD regions because of higher
hole concentrations near the gate edge. Initially, the reaction favors the generation of interface
states and produces hydrogen atoms and ions at the interface. And this process is limited by
the dissociation rate of hydrogen-terminated Si bonds. After some stress time, however, the
transport of hydrogen ions in the oxide dominates and its diffusion rate is controlled by two
factors: (a) the modified oxide field due to the existing hole trapping in the oxide and the
formation of positive fixed oxide charges. (b) the gradually increasing interface states
≡ Si•
Si3 . Hence, further diffusion of protons or the generation of interface states will be discouraged. When reaction (4.1) reaches the balanced condition, the main electrochemical
reaction becomes the diffusion of neutral hydrogen atoms in (4.2) and (4.3).
4.3 Results and Discussion
In this section, we employ charge pumping methods to extract interface-trap density [46].
At high frequencies, the Icp current is given by
)
We use two kinds of pulse train as square and triangular. The first form obtain
interface-trap densities near conduction band and valance band, the latter form obtain
interface-trap densities close to deeper level. By using this method, we can realize different
levels of interface-trap density.
Figure 4.2 shows threshold voltage shift under NBTI stress with different source/drain
and bulk-Si implantation. The BT stress condition is Vg = - 3.8 V at 150°C. We found an
interesting result. Although higher nitrogen implantation at source/drain extension region
reduces short channel effect, it decreases device reliability under NBTI stress. It can be
explained by the locally enhanced degradation reactions between holes and oxide near the
source/drain extension region, and the nitrogen may diffuse toward the silicon/oxide interface
during RTA processing step or lateral scattering of ion implantation. In Fig. 4-3, interface-trap
density of nitrogen implantation at source/drain extension region has the maximal Nit than
others. Triangle wave has the same trend as shown in Fig. 4-4. There is another reason for
nitrogen reduce reliability phenomenon. Fig. 4-5 shows temperature dependence of NBTI
stress. In the figure, slope is proportional to active energy. So, nitrogen cause lower Ea let
device owning poor reliability.
Figure 4-6 shows threshold voltage shift under NBTI stress for pMOSFETs with
different source/drain implantation. Fluorine incorporation into source/drain extension region
has a better reliability than nitrogen does. Figure 4-7 and Figure 4-8 exhibit the account for
this result. In the annealing process, nitrogen diffusion to Si/SiO2 interface causes an increase
of interface-trap density than fluorine influence does. The result is corresponding to Fig. 3-12
as we expected. Threshold voltage shift under NBTI stress for different poly-silicon gate and
bulk-Si implantation as shown in Fig. 4-9. In chapter 3, we have known that fluorine
implantation into silicon substrate has more interface-trap density opposite to control wafer
(compare to Fig. 3-6). This figure suggests fluorine and nitrogen incorporation into
poly-silicon gate enhance device reliability and nitrogen implantation has the better efficiency
than fluorine. Maybe it is related to fluorine enhances boron diffusion through gate insulator
into silicon substrate. We also found the similar result as shown in Fig 4-10. Besides, we
investigate difference poly-silicon gate implantation without substrate implantation. In Fig.
4-11, nitrogen and fluorine implantation into gate can also increase reliability issues. Nitrogen
incorporation into poly-silicon gate with the 1 × 1015/cm2 dosage has the better immunity for
NBTI stress than fluorine incorporation into poly-silicon gate with the 1 × 1014/cm2 dosage.
Figure 4-12 illustrates interface state for the same condition as that in Fig. 4-10. Moreover, it
shows the similar result as before.
4.4 Summary
NBTI effects on pMOSFETs with the different dosages of nitrogen and fluorine
incorporation were investigated in this chapter. Although nitrogen at the source/drain
extension region can reduce threshold voltage roll-off effects, however, nitrogen diffusion
from source/drain extension region into channel interface during RTA processing step makes
the NBTI of pMOSFETs more serious. Therefore, the implantation must be trade-off for
devices’ fabrication. We found that the method of nitrogen and fluorine implantation into
poly-silicon gate can be used to enhance device reliability performance.
Chap 5
Dynamic Negative bias temperature instability of pMOSFETs with different nitrogen and fluorine
implantation dosages
5.1 Introduction
In conventional NBTI study, a constant negative bias is applied to the gate electrode as
the “high” output state in a CMOS inverter. However, the applied gate bias is switching
between “high” and “low” voltage during the operation of pMOSFETs in CMOS inverters,
while the drain bias is alternating between “low” and “high” voltage correspondingly. During
low output phase of an inverter, the electric passivation (EP) effect reduces the interface traps
generated during high output phase effectively and recovers the degradations of device
parameters for a certain degree. This “Dynamic” negative bias temperature instability
(DNBTI) operating in a CMOS inverter circuit prolongs the device lifetime significantly.
Therefore, it is important to investigate dynamic stress conditions. In this chapter, we clarified
the DNBTI effects to our splits. The positive gate voltages were stressed under Vg = 0 V at
150°C.
5.2 Researches about the mechanisms of DNBTI
The passivation effect or dynamic NBIT can be explained by extending the previous
Hydrogen diffusion–reaction model [47]–[50]. The interface trap generation is ascribed to hydrogen release from a hydrogen terminated silicon-dangling bond (Si≡Si−H ), first
proposed by Balk in 1965. Under high-temperature and negative gate bias stress conditions,
the holes from the induced inversion layer react with the interface trap precursors (Si≡Si−H ), breaking the H–Si bond and resulting in interface traps Nit (Si dangling bonds).
The produced hydrogen-related species, denoted as X in Fig. 5-1(a), diffuse/drift to the gate
electrode. During this stress period, the interface acts as a hydrogen source. The electric
passivation (EP) effect can be readily interpreted by the reverse reaction between Nit and X
species, as shown in Fig. 5-1(b). The interface trap passivation by hydrogen-related in SiO2
was first explained in a comprehensive study by Sah et al. in 1984. When the bias polarity is
reversed (positive or zero gate bias), the channel inversion layer disappears. The breaking of
Si–H bond is interrupted due to a lack of holes, and at the same time, move back to the SiO2
/Si interface under the influence of positive gate voltage and passivates the Si dangling bond,
resulting in Nit reduction. In this period, the interface acts as a hydrogen sink. Further
investigation of this interface trap generation/passivation mechanism in DNBTI is in progress
and will be reported elsewhere.
5.3 Results and Discussion
Figure 5-2 shows threshold voltage shift under stress-passivation-stress for pMOSFETs
with different source/drain and bulk-silicon implantation. The BT stress condition is Vg = -3.8
V for NBT stress, and Vg = 0 V for PBT stress. It is obvious that the threshold voltage shift
increases during negative gate voltage applied with source/drain ground. When reversing the
gate-to-source/drain electric field to the opposite polarity (positive) during DNBTI stressing, a reduction (passivation) of ∆Nit and thus ∆Vth is observed. In Fig. 5-3 and Fig. 5-4, nitrogen
implantation into the source/drain extension region has large ∆Nit than control device. This is
because nitrogen causes interface-trap density enhancement during annealing process and
have the lower active energy.
Threshold voltage shift under stress-passivation-stress for pMOSFETs with different
source/drain implantation is shown in Fig. 5-5. We found the same trend as shown in chap 4.
The ∆Vth of nitrogen implantation into source/drain extension region is lower than that by
fluorine implantation into source/drain extension region. In Fig. 5-6 and 5-7, we found
nitrogen implantation has a lower interface state under the square wave plus. But under the
triangle wave plus, two curves are almost the same.
Figure 5-8 shows DNBTI curves between control and fluorine implantation condition.
The device of fluorine implantation has a better performance of reliability than that of control
one. On the other hand, the variation of charge pumping current by fluorine implantation has
lower values as shown in Fig. 5-9 and Fig. 5-10. Finally, we compare the DNBTI effect by fluorine implantation or nitrogen implantation into poly-silicon gate. Obviously, ∆Vth of
devices with fluorine implantation into poly-silicon gate is worse than that with nitrogen does, as shown in Fig. 5-11. This indicates that ∆Nit of device with nitrogen implantation into the
gate is less than that with fluorine implantation. The result is shown in Fig. 5-12.
5.4 Summary
In this chapter, we have investigated the dynamic NBTI effects of pMOSFETs with
different nitrogen and fluorine implantation dosages. The result indicates the identical trend as
those in chapter 4. Nitrogen implanted at source/drain extension regions has poor reliability
performance. But fluorine at source/drain extension region can improve the performance. We
also found that nitrogen or fluorine in implanted at poly-silicon gate can enhance devices’
reliability. Moreover, the immunity of DNBTI effects by nitrogen implantation is better than
fluorine implantation.
Chap 6 Conclusion
In this thesis, the effects of nitrogen and fluorine incorporation into different regions of
pMOSFETs have been investigated in detail for the first time. We implant nitrogen and/or
fluorine with different dosages into silicon substrate, poly-silicon gate and source/drain
extension regions.
The electrical characteristics of pMOSFETs with 2.5-nm gate oxide thickness were first characterized. Nitrogen dosage of 1 × 1014 /cm2 in poly-silicon gate will enhance channel
transconductance and suppress the boron penetration effect. But large nitrogen dosage in
poly-silicon gate will result in poly-depletion effect and reduce transconductance. Therefore,
the dosage of nitrogen implantation needs optimization. We found that devices with nitrogen
in source/drain extension region have a better immunity to threshold voltage roll-off. We have
also shown that fluorine in poly-silicon gate can reduce the transconductance.
The reliability of surface channel p+-gate pMOSFETs have been evaluated from the
viewpoint of BT instability. We found that devices with nitrogen at source/drain extension
regions enhance threshold voltage shift due to nitrogen diffuse into channel region during
RTA process, which decreases the active energy (Ea) of NBTI. Moreover, nitrogen and
fluorine incorporation into poly-gate were discussed. This method can reduce interface-trap
density and is useful for NBTI immunity.
The dynamic NBTI effect for all devices is investigated for a real operation of
pMOSFETs in CMOS. We found the threshold voltage shift decreased at the same condition.
This is because that the dangling bond will be repaired by hydrogen-related species during
positive voltage applying. Under this operation, it significantly prolongs the pMOSFETs
lifetime as compared to traditional static NBTI. The resultant DNBTI for pMOSFETs is
similar to NBTI for different nitrogen and/or fluorine implantations.
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Fig. 2-1 the sketch of conditions
Bulk silicon implantation：
F+ , 1 × 1014 /cm2 , 15 keV
Gate implantation：
F+ , 1 × 1014 /cm2 , 15 keV N2, 1 × 1014 /cm2 , 15 keV N2, 1 × 1015 /cm2 , 15 keV
S/D implantation：
F+ , 1 × 1014 /cm2 , 15 keV N2, 1 × 1014 /cm2 , 15 keV N2, 1 × 1015 /cm2 , 15 keV
Gate split
Table 2-1 Split conditions
Pulse Generator
P+-poly Vr Gate
P+ source
P+ drain
DC Ammeter
Fig. 3-1 Basic experimental setup of charge pumping measurement
Gate Length (µm)
Fig. 3-2 Threshold voltage roll off with different poly-silicon gate and bulk-Si implantation
Gate Length (µm)
0 2 4 6 8 10 12
Threshold Voltage (V)
-1.00 -0.95 -0.90 -0.85 -0.80 -0.75 -0.70
control
B(F) F+ implantation 1E14 S/D(N) N2 implantation 1E14 B(F) F+ implantation 1E14 S/D(N*) N2 implantation 1E15 S/D(F) F+ implantation 1E14 S/D(N*) N2 implantation 1E15
Fig. 3-3 Threshold voltage roll off with different source/drain and bulk-Si implantation
W / L = 10 µm / 0.5 µm
Split
control B(F)
B(F),G(N)
B(F),G(N*)
G(N*)
Transconductance × T
ox(S × n m)
170x10-6 180x10-6 190x10-6 200x10-6 210x10-6 220x10-6 230x10-6 240x10-6
Fig. 3-4 Transconductance with different poly-silicon gate and bulk-Si
Fig. 3-4 Transconductance with different poly-silicon gate and bulk-Si