Simulation Result and Discussion

The calculated hole gate direct tunneling currents for various stress conditions are illustrated in Fig. 3.2.2.1 for both (001) and (110) surfaces. Besides that, the contributions of individual components are given in Fig. 3.2.2.2 to 3.2.2.5. We sum up the inversion carrier density of each subband and average the transmission probability as described below: experimental fitting as addressed later, we found that for the polysilicon gate as shown in Fig. 3.2.2.6, the value of 𝑚_{𝑝𝑜𝑙𝑦;𝑆𝑖,⊥}associated with the group velocity, Eq.(3.2.10), should be corrected as 0.3 m0, which is much smaller than the (110) H1 quantization effective mass. The corrected group velocity is written as below:

𝑉_𝑆𝑖,⊥^𝑖,𝑣(𝐸 + 𝑞|𝐸_𝑜𝑥|𝑇_𝑜𝑥) = √2 ((𝐸_𝑖,𝑣− 𝐸_𝑣⁰) + 𝑞|𝐸_𝑜𝑥|𝑇_𝑜𝑥)

𝑚_{𝑝𝑜𝑙𝑦;𝑆𝑖,⊥}^𝑖 (3.2.2.2)

where 𝐸_𝑜𝑥 and 𝑇_𝑜𝑥 refer to the oxide field and oxide thickness, respectively.

Obviously, the (110) Ig is 6~10 times lower than (001) one. This can be attributed to the reflection part of transmission probability as shown in Fig. 3.2.2.5. Moreover, we have stated that such Ig difference is unnoticeable in metal-gate devices due to negligible reflection term T_𝑖,𝑣^𝑅 , which can be easily noticed in Fig. 3.2.2.7. Also shown is the comparison of experimental and calculated hole gate direct tunneling current change versus stress. The bias conditions and process parameters in the calculation are close to

14

the experiment ones. Apparently, both polysilicon gate and metal gate cases yield satisfactory fitting of strain altered Ig data as published in [2], [5] and [19]. The large slope of (110) Ig change versus stress is mainly due to the sensitive dependence on stress as illustrated in Fig. 3.2.2.2 to 3.2.2.5. In Fig. 3.2.2.7, we add the (110) case of no correction for the effective mass in the reflection term. There occurs a large discrepancy, unless a correction on 𝑚_{𝑝𝑜𝑙𝑦;𝑆𝑖,⊥} has been made. This trend remains the same even when we extend our simulation to higher stress of up to -3GPa, which is shown in Fig.

3.2.2.8. In addition, this is the first time to demonstrate that at higher stresses, the rate of Ig change gets slow for both (100) and (110) cases. In order to corroborate this projection, we again add into the inset of the figure the comparison of corresponding mobility enhancement values with those of Packan et. al [20]. Our simulation results are obtained through sophisticated simulations in Fig. 1.1 in combination with a Kubo-Greenwood formula. A good agreement is reached in our simulation for both (001) and (110) surface. We have also produced a reasonable fitting of available experimental Ig-Vg curves in (110) sidewall-surface p-FinFETs with and without the stress from [2], which is shown in Fig. 3.2.2.9. The hole gate direct tunneling current that dominated in (110) sidewall of FinFET was well described by our simulation.

Moreover, calculated hole gate direct tunneling currents for both (001) and (110) p-MOSFETs with polysilicon, FUSI and metal gates are illustrated in Fig. 3.2.2.10 and Fig. 3.2.2.11. Fig 3.2.2.12 shows the comparison of hole gate direct tunneling current change versus stress for both (001) and (110) p-MOSFETs among polysilicon, FUSI and metal gates. Clearly, FUSI gates have outstanding control over hole gate direct tunneling current. More specific discussions about FUSI gate will be given in next chapter.

15

Chapter 4

Individual Contributions to 40% Gate Current Reduction in FUSI Gate Strained (001)

p-MOSFETs

4.1 Introduction

Although use of metal gate can eliminate poly-depletion effect, some challenging issues exist in terms of the process integration and the work function control. The key requirement for work function control is to meet the threshold voltage specifications for each application. Fortunately, the fully silicided (FUSI) gate whose property lies between polysilicon gate and metal gate could serve as an alternative to metal gates due to the advantages of good process compatibility with silicon [21], threshold voltage control [22],[23], and even the suppression of hole gate direct tunneling current [24]. Our main purpose in this chapter is to decouple the contributions of the observed 40% gate current reduction in FUSI-gate (001) p-MOSFET with respect to polysilicon one [24]. Initially, the nominal process parameters are obtained by both the gate capacitance Cg fitting and gate current Ig fitting. Then, we separated out individual contributions due to (i) gate work function WF shift; (ii) elimination of poly depletion; (iii) channel stress change, (iv) TR part missing in FUSI gate, and (v) Vth roll-off in FUSI gate, all achieved by means of our eEMA algorithm. The extracted work function values will be justified.

4.2 Parameter Extraction

With the proposed eEMA, the nominal process parameters for both polysilicon gate and FUSI gate p-MOSFETs are obtained as shown in Fig. 4.2.1 and Fig. 4.2.2. For CV measurement, the large dimension devices are selected to ensure the quality of the

16

extracted parameters. On the other hand, samples with small dimension are preferred for the investigation of gate leakage current. The extracted process parameters are SiON effective oxide thickness EOT = 1.32nm , n-type substrate doping concentration 𝑁_𝑠𝑢𝑏 = 1.6 × 10¹⁸𝑐𝑚^;3 , permittivity of SiON 𝜀_{𝑆𝑖𝑂𝑁} = 5𝜀₀ , the SiON/Si barrier height 𝑞𝜒_𝑕= 3.8eV, effective electron mass 𝑚_{𝑆𝑖𝑂𝑁} = 0.27𝑚₀, the p⁺ polysilicon dopant concentration and work function for polysilicon gate 𝑁_{𝑝𝑜𝑙𝑦} = 6.5 × 10¹⁹𝑐𝑚^;3 and WF = 5.17eV, respectively. Particularly, the work function for FUSI gate was found to be 5.013 eV.

4.3 Simulation Result and Discussion

The gate capacitance-voltage measurement is done using a large device sample.

Thus, we can suppose no additional longitudinal or transverse stress induced by S/D region, STI or capping layers. However, we found that FUSI gates impose an extra stress of around -460 MPa on the underlying p-MOSFET channel region, which can be directly confirmed by C-V curve in Fig. 4.3.1. We have produced more consistent fittings in weak inversion region if longitudinal channel stress -460 MPa is taken into account in FUSI gates. In contrast to C-V counterpart, the measurement of Ig is done under small device, the corresponding longitudinal channel stress for polysilicon gate and FUSI gate are -1.83 and -2.29 GPa, respectively, as revealed from TCAD results in [24]. Fig. 4.3.2 shows the influence of polysilicon dopant concentration on both CV and Ig. For dopant concentration as high as 1 × 10²³𝑐𝑚^;3, the strong inversion regions in CV behave similarly as metal gate, but the Ig acts differently due to negligible transmission probability across reflection part of the insulator and work function shift.

Besides, around 6% of Ig difference occurs between -1.83 GPa and -2.29 GPa, which is too small to be observed even in the log-scale, as shown in Fig. 4.3.3. This phenomenon is quite consistent with our simulation result in previous chapter, Fig.

17

3.3.2.8, where the rate of Ig change gets slow at higher stress. Moreover, C-V and Ig-Vg curves both shift tremendously due to various work functions, as shown in Fig.

4.3.4. The carrier reflection part of transmission probability through insulator TR is one of the important issues in FUSI gate that should be discussed. As revealed in Fig. 4.2.1, we find that the TR part may not exist in FUSI gate as like the metal counterpart. The similar discovery in metal gate is mentioned by Li, et al [25]. Finally, the Ig defference between polysilicon gate p-MOSFETs (-1.83 GPa) and fully-silicided (FUSI) ones (-2.29 GPa) can be quantitatively interpreted, as depicted in Fig. 4.3.5: most of the hole gate direct tunneling current changes are due to gate materials through either WF shift (-95%) or poly depletion (+62%), TR part missing(-26%), +24% for Vth roll-off in FUSI gate (0.1 Volt, while having only -6% change from stress. We further demonstrate that the overall Ig change between polysilicon and FUSI gates is around 41% (from 8.2 to 4.8 A/cm²) if we sum all the contributions. The comparisons of work function of Ni FUSI with those of [26] and [27] are shown in Fig. 4.3.6. It is worth noticing that the addition of dopants such as B and P to polysilicon before silicidation may cause significant shifts in the work function of silicided [27], especially when the silicide is Si-richer. In contrast, the change is negligible in Ni-rich silicides. As a result, we strongly believe that the extracted work function from our eEMA is reasonable.

18

Chapter 5 Conclusion

We have proposed the enhanced version of effective mass approximation algorithm (eEMA). The validity of eEMA has been confirmed through the comparison between the conventional EMA, the enhanced EMA and the sophisticated six-band k.p. We have shown that conventional hole effective masses may lead to unacceptable error. Only with bias and stress dependencies taken into account can accurate calculation of gate capacitance and hole gate direct tunneling current be obtained. The hole gate direct tunneling current in both (001) and (110) strained p-MOSFETs have already been simulated under various longitudinal compressive stress. Moreover, the contributions of hole gate direct tunneling current have been distinguished and have been further discussed, especially the transmission probability of across reflection part of the insulator due to its substantial impact on resulting gate current. Satisfactory agreements could be achieved as compared with existing experimental data of strain-induced gate direct tunneling current change under polysilicon and metal gates.

In addition, the simulated result from eEMA has successfully fitted the experimental data of p-FinFETs with and without stress. Finally, we have demonstrated the potential application on FUSI gate case in terms of individual contributions of work function shift, polysilicon depletion elimination, and increased channel compressive stress magnitude.

19

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[21] Hidenobu Fukutome, Kimihiko Hosaka, Kazuo Kawamura, Hiroyuki Ohta, Yasunori Uchino, Shinichi Akiyama, and Takayuki Aoyama, “Sub-30-nm FUSI CMOS transistors fabricated by simple method without additional CMP process,” IEEE Trans. Electron Devices, vol. 29, no. 7, pp. 765-767, July 2008 [22] E. P. Gusev, C. Cabral, B. Linder, Y. H. Kim, K. Maitra, E. Cartier, H.

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[25] F. Li, S. P. Mudanai, Y. Y. Fan, L. F. Register, and S. K. Banerjee, “Physically based quantum-mechanical compact model of MOS devices substrate-injected tunneling current through ultrathin (EOT 1nm) SiO2 and high-κ gate stacks,”

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23

Table I The extracted parameters for Fig. 4.2.1 and 4.2.2.

Gate

Material N_sub (cm^-3) N_poly (cm^-3) EOT (nm)

Long. Stress σ (GPa)

m_SiON (m₀)

Barrier

Height (eV) 𝜀_{𝑆𝑖𝑂𝑁} WF (eV) P⁺ Poly

1.6 × 10¹⁸

6.5 × 10¹⁹

1.32

-1.83

0.27 3.8 5

5.17

FUSI 1 × 10²³ -2.29 5.013

24

Table II. Hole band, hole scattering and physical parameters used in this work.

Parameter ^This

Work Parameter This

Work

γ₁ 4.285 Optical energy



(meV) 61.2

γ₂ 0.339

Crystal density

 (g cm ) / ³ 2.329

γ₃ 1.446 Sound velocity

ul (m/s) 9040

a (eV) 2.46 Optical phonons

Dop (10⁸ eV/cm) 6 b (eV) -2.1 Acoustic phonons

Dac (eV) 4.5

d (eV) -4.8 Surface Roughness Amplitude

 (10^-8 cm) 2.6

Δ (eV) 0.044

The Correlation Length of

Surface Roughness

 (10^-8 cm)

0.5

𝑆₁₁(10^;12𝑚²/𝑁) 7.68 𝑆₁₂(10^;12𝑚²/𝑁) -2.14 𝑆₄₄(10^;12𝑚²/𝑁) 12.6

25

E_V E_C

Given a surface field Fs⁰ Then, initial V⁰(z)= Fs⁰* z E_hole

0

Six-band k･p Schrödinger Equation Solver with

Triangular Potential

1. DOS Mass <m^v_DOS>

2. Quantization Mass m^v_QN

EMA Oriented Schrodinger-Poisson Iteration Solver

with Fs ≈ Fs⁰

26

Fig. 2.2 The device structures for (001) and (110) p-MOSFETs. The channel direction and applied stress direction are clarified. Here, only the favorable longitudinal compressive stress is under study.

Long. Comp.

Stress

n-type

W L

(001) wafer

<110> channel

Long. Comp.

Stress

n-type

W L

(110) wafer

<-110> channel

27

Hole Effec tive Mass ( m

0

) _m

^H1

QN

<m

^H1_DOS

>

bending. The heavy, light, and split-off holes, for each subband energy, are mixed

due to the coupling effect from the surface quantum confinement or the strain

effect [7]. Therefore, we group the subband energies mainly according to the three

lowest bulk bands, 𝐸

₁⁰

(H1), 𝐸

₂⁰

(H2), and 𝐸

₃⁰

(H3).

28

Hole Effec tive Mass ( m

0

) _m

^H2

QN

<m

^H2_DOS

>

Long. -1 GPa

no stress

Fig. 2.4.2 The resulting (001) effective masses for H2 bulk band. The orange

dashed lines refer to the constant effective masses as in unstressed conditions.

29

Hole Effec tive Mass ( m

0

)

no stress

Fig. 2.4.3 The resulting (001) effective masses for H3 bulk band.

30

constant mass Long. -3 GPa

Long. -1 GPa Long. -3 GPa

|V

_s

(V)|

Hole E ffec tive Mas s (m

0

)

no stress

Long. -1 GPa

Fig. 2.4.4 The resulting (110) effective masses for H1 bulk band. Only H1 and

H2 bulk bands are shown in (110) case here because of their high occupation in

the subband energies. Note that (110) 𝑚

_𝑄𝑁^𝐻1

is stress sensitive.

31

Hole Effec tive Mass ( m

0

)

m

^H2_QN

<m

^H2_DOS

>

Long. -3 GPa Long. -1 GPa

no stress

Fig. 2.4.5 The resulting (110) effective masses for H2 bulk band.

32

1.0 1.1 1.2 1.3 1.4 1.5

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

Fermi level Bulk band H1 Bulk band H2 Bulk band H3 Solid Lines = fully-iterated

Solid Symbols = eEMA

Open Symbols = constant EMA (001) w/o stress

V

_S

(V)

Sub band E nergy (eV)

Fig. 2.4.6 The comparison of subband energy of (001) without stress among

fully-iterated, eEMA and constant EMA.

33

1.0 1.1 1.2 1.3 1.4 1.5

0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

Fermi level Bulk band H1 Bulk band H2 Bulk band H3 Solid Lines = fully-iterated

Solid Symbols = eEMA

Open Symbols = constant EMA (001) Long. -1GPa

V

_S

(V)

Sub band E nergy (eV)

Fig. 2.4.7 The comparison of subband energy of (001) under longitudinal

compressive stress 1 GPa among fully-iterated, eEMA and constant EMA.

34

1.0 1.1 1.2 1.3 1.4

-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

Fermi level Bulk band H1 Bulk band H2 Bulk band H3

Solid Lines = fully-iterated Solid Symbols = eEMA

Open Symbols = constant EMA (001) Long. -3 GPa

V

_S

(V)

Sub band E nergy (eV)

Fig 2.4.8 The comparison of subband energy of (001) under longitudinal

compressive stress 3 GPa among fully-iterated, eEMA and constant EMA.

35

1.0 1.1 1.2 1.3 1.4

0.0 0.1 0.2 0.3 0.4 0.5 0.6

Fermi level Bulk band H1 Bulk band H2 Bulk band H3

Sub band E nergy (eV)

Solid Lines = fully-iterated Solid Symbols = eEMA

Open Symbols = constant EMA (110) w/o stress

V

_S

(V)

Fig. 2.4.9 The comparison of subband energy of (110) without stress among

fully-iterated, eEMA and constant EMA.

36

1.0 1.1 1.2 1.3

0.0 0.1 0.2 0.3 0.4 0.5 0.6

Fermi level Bulk band H1 Bulk band H2 Bulk band H3

V

_S

(V)

Sub band E nergy (eV)

Solid Lines = fully-iterated Solid Symbols = eEMA

Open Symbols = constant EMA (110) Long. -1GPa

Fig. 2.4.10 The comparison of subband energy of (110) under longitudinal

compressive stress 1 GPa among fully-iterated, eEMA and constant EMA.

37

0.8 0.9 1.0 1.1 1.2

-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6

Fermi level Bulk band H1 Bulk band H2 Bulk band H3

Solid Lines = fully-iterated Solid Symbols = eEMA

Open Symbols = constant EMA (110) Long. -3 GPa

V

_S

(V)

Sub band E nergy (eV)

Fig. 2.4.11 The comparison of subband energy of (110) under longitudinal

compressive stress 3 GPa among fully-iterated, eEMA and constant EMA.

38

-2 -1 0 1 2

0.0 0.4 0.8 1.2 1.6 2.0

(m0) mQN <mDOS>

H1 0.27 1.13

H2 0.21 0.67

H3 0. 25 0.94

constant EMA with fully-iterated

eEMA

(001) p-MOSFET N_D= 1e17 cm^-3 N_poly= 1e20 cm^-3 T_ox= 1.9 nm

V

_G

(V) Ca pacitance (  F/ cm

2

)

Fig. 3.1.1 The comparison of calculated non-stress (001) gate capacitance

versus gate voltage from the constant EMA and enhanced EMA with the

sophisticated six-band k·p results.

39

-2 -1 0 1 2

0.0 0.4 0.8 1.2 1.6 2.0 2.4

(m0) mQN <mDOS>

H1 0.59 0.12

H2 0.214 0.356

H3 0.212 0.248

constant EMA with fully-iterated

eEMA

(110) p-MOSFET N_D= 1e17 cm^-3 N_poly= 6.5e19 cm^-3 T_ox= 1.3 nm

V

_G

(V) Ca pacitance (  F/ cm

2

)

[6]

Fig. 3.1.2 The comparison of calculated non-stress (110) gate capacitance

versus gate voltage from the constant EMA and enhanced EMA with the

sophisticated six-band k·p results.

40

0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0

10^-2 10^-1 10⁰ 10¹ 10² 10³

eEMA

Temp. = 300 K N_D= 1e17 cm^-3 N_poly= 6.5e19 cm^-3 T_ox = 1.3 nm m_oxh = 0.38 m₀

J

G

( A/cm

2

)

V

_G

(V)

No Stress Long. -1 GPa Long. -3 GPa

(110) (001)

Fig. 3.2.2.1 The calculated hole gate direct tunneling current density for (001) and (110)

p-MOSFETs under the longitudinal stress conditions of 0, -1, and -3 GPa. It is contributed by

four parts: 1) 𝐹

_𝑖,𝑣

impact frequency of hole wave packet on interface, 2) 𝑛

_𝑖,𝑣

(𝐸)inversion

carrier density per energy, 3) 𝑇

_𝑖,𝑣^𝑊𝐾𝐵

(𝐸) WKB part of transmission probability through

insulator, and 4) 𝑇

_𝑖,𝑣^𝑅

(𝐸) reflection part of transmission probability through insulator.

41

0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0

10¹³ 10¹⁴

No Stress Long. -1 GPa Long. -3 GPa

V

_G

(V)

< F

i,v

> ( sec

-1

)

(110) (001)

Fig. 3.2.2.2 The contribution of the averaged impact frequency of hole

wave packet on interface for (001) and (110) p-MOSFETs under the

longitudinal stress conditions of 0, -1, and -3 GPa.

42

0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0

1x10¹³ 2x10¹³ 3x10¹³

No Stress Long. -1 GPa Long. -3 GPa

V

_G

(V)

 n

i,v

( cm

-2

)

(110) (110)

Fig. 3.2.2.3 The contributions of the total inversion carrier density for

(001) and (110) p-MOSFETs under the longitudinal stress conditions of 0,

-1, and -3 GPa.

43

0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0

10^-8 10^-7

No Stress Long. -1 GPa Long. -3 GPa

V

_G

(V)

< T

WKB i,v

>

(110) (001)

Fig. 3.2.2.4 The contributions of the average WKB transmission

probability through insulator for (001) and (110) p-MOSFETs under the

longitudinal stress conditions of 0, -1, and -3 GPa.

44

Fig. 3.2.2.5 The contribution of the average reflection part of transmission probability through insulator for (001) and (110) p-MOSFETs under the longitudinal stress conditions of 0, -1, and -3 GPa.

0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -3.0

0 1 2 3 4

(001)

w/o m_Si-poly Corr.

w/i m_Si-poly Corr.

No Stress Long. -1 GPa Long. -3 GPa

V

_G

(V)

< T

R i,v

>

(110)

45

E

_1,1

E

_2,1

(110) p-MOSFET

n-type substrate p ⁺ -poly

v

^i.v_Si,┴

(m

_{poly-Si, ┴}

)

T

_ox

E

⁰₁

v

^i.v_Si,┴

(m

^v_QN

)

Fig. 3.2.2.6 Schematic of energy band diagram of (110) p-MOSFET to show

the effective mass correction in p+-poly gate region. The two group velocities

are associated with the effective masses labeled.

46

0.00 -0.02 -0.04 -0.06 -0.08 -0.10 -0.12

Fig. 3.2.2.7 The comparison of experimental and calculated hole gate direct

tunneling current change versus stress. The bias conditions and process

parameters in the calculation are close to the experimental ones, where |V

G

|~1V

for polygate and |V

_G

|~1.6V for metal gate.

47

Fig. 3.2.2.8 The calculated hole gate direct tunneling current change as in Fig. 3.3.2.7 but with the stress range largely widened. The inset shows simulated mobility enhancement and its comparison with [20].

48

0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 0.0

0.1 0.2 0.3

w/ 0.1% Long. Strain

w/o Strain Sim. Para.:

N_D = 1.7e17 cm^-3 T_SiON =1.3 nm m_SiON= 0.24 m₀

_SiON = 5

_h(SiON) = 3.8 eV WF = 4.97 eV

| V

_G

(V) |

| I

G

(  A ) |

H_Fin= 0.05 m L_G = 0.5m

Exp. (110) p-FinFET from Ref. [2]

Sim. (110) p-MOSFET from eEMA

Fig. 3.2.2.9 The comparison of calculated hole gate direct tunneling current for p-FinFET with those measured from (110) sidewall surface p-FinFET [2].

49

Fig. 3.2.2.10 The calculated hole gate direct tunneling current density for (001) p-MOSFETs with polysilicon, FUSI and metal gates under the longitudinal stress conditions of 0 and -2.5 GPa.

-0.5 -1.0 -1.5 -2.0 -2.5 -3.0

10

¹

10

²

10

³

10

⁴

J

G

( A /cm

2

)

V

_G

(V)

Poly-Si Gate FUSI Gate Metal Gate

ND=1.7e17 cm-3 Npoly=1e20 cm-3 FUSI WF=5.013eV Metal WF=4.97eV Tox=1.3nm moxh=0.38m0 solid : w/o stress

open: -2.5GPa

(001) p-MOSFET

50

Fig. 3.2.2.11 The calculated hole gate direct tunneling current density for (110) p-MOSFETs with polysilicon, FUSI and metal gates under the longitudinal stress conditions of 0 and -2.5 GPa.

-0.5 -1.0 -1.5 -2.0 -2.5 -3.0

10

¹

10

²

10

³

10

⁴

ND=1.7e17 cm-3 Npoly=1e20 cm-3 FUSI WF=5.013eV Metal WF=4.97eV Tox=1.3nm moxh=0.38m0

J

G

( A /cm

2

)

V

_G

(V)

Poly-Si Gate FUSI Gate Metal Gate solid : w/o stress open: -2.5GPa

(110) p-MOSFET

51

Fig. 3.2.2.12 The calculated hole gate direct tunneling current change versus stress for (001) and (110) p-MOSFETs with polysilicon, FUSI and metal gates.

0.0 -0.5 -1.0 -1.5 -2.0 -2.5

0.0 0.1 0.2 0.3 0.4 0.5 0.6

ND=1.7e17 cm-3 Npoly=1e20 cm-3 FUSI WF=5.013eV Metal WF=4.97eV Tox=1.3nm moxh=0.38m0

Long. Stress (GPa)

 I

G

/ I

G

(% )

|V

_G

|~1.3V

Poly-Si Gate FUSI Gate Metal Gate

52

-1.0 -0.5 0.0 0.5 1.0 1.5

0.0 0.5 1.0 1.5 2.0 2.5 3.0

0.0 0.3 0.6

0.00 0.25 0.50

Exp. Poly-Si Gate [24] 0.75

Exp. FUSI Gate [24]

Sim. Poly-Si Gate Sim. FUSI Gate w/i 

Sim. FUSI Gate w/o 

V

_G

(V) Capa ci ta nce (  F/cm

2

)

Fig. 4.2.1 Capacitance-voltage fitting through proposed eEMA on (100)

p-MOSFETs with polysilicon and FUSI gates. The experimental data is measured

under large devices. FUSI imposes an extra compressive stress ~460 MPa on the

underlying p-MOSFET channel region. Table I shows the extracted parameters.

53

Solid symbols indicate the experimental data and open symbols with line indicate the calculated one. The gate overdrive is used to eliminate Vth roll-off appearing in FUSI gate as shown in insert, so both the inversion conditions are same:

Vth(Lmask=1um) for the ideal calculation results and Vth(Lmask=0.036um) for

the experimental results.

54

Exp. CV from [24] poly-gate Exp. CV from [24] FUSI-gate

Sim. CV from poly-gate eEMA @ No Stress

3.0 Exp. CV from [24] poly-gate Exp. CV from [24] FUSI-gate

Sim. CV from poly-gate eEMA @ No Stress

compressive stress 460 MPa considered on FUSI gate, which fitted perfectly.

55

Sim. CV from eEMA poly gate Sim. CV from eEMA metal gate

N_poly = 1 x 10¹⁹ cm^-3

Sim. Ig from eEMA poly gate Sim. Ig from eEMA metal gate

N_poly = 1 x 10¹⁹ cm^-3

Fig. 4.3.2 Impact of polysilicon dopant concentration on (a) capacitance-voltage

curve and (b) Ig versus Vg . 𝑁

_𝑠𝑢𝑏

= 1 × 10

¹⁸

𝑐𝑚

^;3

, 𝑇

_𝑜𝑥

= 1.3𝑛𝑚 , 𝑚

_𝑜𝑥𝑕

=

0.37𝑚

₀

, Stress = Long. −1.83 GPa.

56

(a)

(b)

Too small to see the change (~6% between -1.83 and -2.29 GPa )

Fig. 4.3.3 Impact of Longitudinal compressive stress on (a) capacitance-voltage curve and (b) Ig versus Vg . 𝑁

_𝑠𝑢𝑏

= 1 × 10

¹⁸

𝑐𝑚

^;3

, 𝑇

_𝑜𝑥

= 1.3𝑛𝑚 , 𝑚

_𝑜𝑥𝑕

=

Sim. CV from eEMA w/o stress

Sim. CV from eEMA w/i Long. -1.83 GPa

Sim. CV from eEMA w/o stress

Sim. CV from eEMA w/i Long. -1.83 GPa Sim. CV from eEMA w/i Long. -2.29 GPa

V

_G

(V)

J

g

( A/cm

2

)

57

(a)

(b)

Fig. 4.3.4 Impact of work function shift on (a) Capacitance-voltage curve and (b)

Ig versus Vg . 𝑁

_𝑠𝑢𝑏

= 1 × 10

¹⁸

𝑐𝑚

^;3

, 𝑇

_𝑜𝑥

= 1.3𝑛𝑚 , 𝑚

_𝑜𝑥𝑕

= 0.37𝑚

₀

,

58

Consider V_th roll-off

Fig. 4.3.5 The calculated hole gate direct tunneling currents for polysilicon- and

FUSI-gate p-MOSFETs and the comparison with two data points [24]. The inset

depicts the five main contributions for the observed hole gate direct tunneling

current difference.

59

4.0 4.4 4.8 5.2

Silicon rich Metal rich Ni

₃

Si

Ni

₂

Si Ni

₃

Si

₂

NiSi

NiSi

₂

Exp. extracted (This work) Sim. undoped [26]

Exp. Boron doped Exp. undoped

Exp. Phosphorus doped

FUSI Gate WF (e V)

[27]

Fig. 4.3.6 The comparison of work function of Ni FUSI gates among this

work, [26] and [27]. The additional dopants to polysilicon before silicidation

result the shifts in work function.

在文檔中 新穎六層k•p模擬器用於受應力(001)及(110)Ｐ型複晶矽，全矽化及金屬閘極Ｐ通道金氧半場效電晶體之閘極電洞穿隧電流 (頁 26-0)