Specification of Energy-Efficient TCAM Macro

The size of the TCAM macro is 256-word x 40-bit indicating 256x40 TCAM cells are utilized, and the TCAM array is divided into 16 banks. Each TCAM cell is composed of two SRAM cells, the storage cell and the don’t-care cell. In this TCAM

macro, 8-bit address signals, Addr [7:0], are used to access one of the 256 entries in the read/write operation. Therefore, Addr [7:4] indicate the 16 banks in the TCAM array, and Addr [3:0] point toward 16 words in the bank. In addition, each TCAM entry contains 40-bit TCAM cells. Accordingly, the bit-width of the write-in data (In [39:0]), read-out data (DOUT [39:0]) and search data (Sin [39:0]) are all 40-bit. During the search operation, all 256 entries are compared to the search data within 1 cycle, and 256 comparison results are generated simultaneously as the search outputs (SOUT [255:0]).

The input and output pins of this TCAM macro are listed in Table 5.1 and Table 5.2.

Table 5.1 Descriptions of input pins.

Input Pin Name Description

Vdd, Gnd Power pins

Addr [7:0] 8-bit address signals for accessing one of the 256 entries (words) during the read operation or the write operation

MODE

MS/MD selection (accessing the storage cells or the don’t-care cells) in the selected entry during the read operation or the write operation

In [39:0] Data input for the write operation Sin [39:0] Search input for the search operation

CEN Chip Enable, the three operations, read/write/search, are activated when CEN is high

SEN

Search enable, the search operation is activated when SEN is high. And the read/write operations are activated when SEN is low.

WEN

Read/Write selection, the write operation is activated when WEN is high. And the read operation is activated when WEN is low.

FLAG

Readout Flag, if the flag is low the data in the storage cell will be disturbed if the don’t-care cell on the lowest entry in the same bank (in the same column) is true. The readout data will be unknown while the flag is low.

Table 5.2 Descriptions of output pins.

Output Pin Name Description

DOUT [39:0] 40-bit read-out data

SOUT [255:0] 256-bit search output while comparing 256 entries in a search operation

Due to shared BL/DL, the read or write operation cannot be completed within one cycle. An extra bit, Mode, is utilized to access the storage cells or the don’t-care cells in a TCAM entry. If Mode is high, the don’t-care cells are selected to perform read/write operation. On the other hand, if Mode is low, the storage cells are selected. For various applications of TCAM, our design has another extra control signal, Flag. Based on the continuous don’t-care X pattern and pre-fix pattern, the Flag signal is designed to destroy the storage data while the don’t-care data is 1 and the storage data will not be read. When Flag is low for some application without read operation, the datum in the storage cell will be destroyed if the don’t-care cell on the lowest entry in the same bank (in the same column) is true. In a TCAM cell, the destroyed storage datum will not affect the search functionality because the don’t-care cell is true based on the continuous don’t-care X pattern. In contrast, when Flag is high, the data stored in the storage cells will be robust enough to prevent from disturbance. Then the read data can be propagated through ripple bit-line scheme successfully.

Generally, the TCAM macro is operated in three modes: Write Mode, Read Mode, and Search Mode. In the write and read operations, the functionality of the TCAM macro is operated like an ordinary memory. That is to say, data is manipulated in the TCAM array as the same way in the SRAM array. Different from the SRAM, the TCAM array has the extra operation mode, Search Mode. In the search operation, the input data sent into TCAM array and are compared with all the stored data in the

TCAM simultaneously. After that, all rows which match with input data are sent to the address priority encoder. When multiple matched rows pass through the address priority encoder, an appropriate address for the longest prefix is sent to the output. Thus, in the TCAM architecture, large amount of comparison operations are active to identify all data stored in the TCAM array during a search operation.

The three operations are controlled by the three signals (CEN, SEN, WEN). When CEN is low, then the TCAM macro is in standby mode. The priority of these three

control signals is CEN > SEN > WEN. Table 5.3 lists the truth table of the three modes.

Besides, the timing diagrams of corresponding signals for different operations are shown in Fig. 5.1, Fig. 5.2 and Fig. 5.3.

Table 5.3 Truth table of three modes.

Operation CEN SEN WEN

Standby 0 X X

Search 1 1 X

Write 1 0 1

Read 1 0 0

CLOCK

WEN

MODE

wen_in mode_in

External signalInternal signal

Write Cycle

IN[39:0]

Addr2[7:0]

IN₂[7:0]

ADDR[7:0]

addr_in data_in[39:0]

Addr2[7:0]

IN2[7:0]

CLOCK

pre-chargeBL Read Cycle

Addr4[7:0]

A4[7:0]

External signalInternal signal

DOUT[39:0] Dout4[7:0]

Fig. 5.2 Timing diagram of reading storage/don’t-care cells.

CLOCK

Fig. 5.3 Timing diagram of search operation.