Summary

By the compare of the samples which has the best capacitance in their own gas, we can realize the most suitable treatment condition which both has the best capacitance and lower leakage current. Hence, we significantly find a relative optimum condition among above discussion. It is proved that without thick oxidation layer, it can also reach the smallest leakage current when there is suitable time treatment.

If we take a look at all the samples, we find that most of the N², N²O, and NH³

the N element and F element can fix the interface and promote the electrical properties include of C-V curve and J-V curve. As for the Hf02 type of material, oxygen radical can cause growth in the interfacial layer, therefore by comparing with the N20 plasma treatment's sample, it shows a lower C value. Just because the oxidation phenomenon, the films will become thicker so that the plasma damage will not easily affect the leakage current profile.

Chapter 4

Reliability of Al/HfAlO(HfO ² )/Si MIS Capacitors

4.1 Hysteresis

The name of Hysteresis was borrowed from electromagnetics. It is means that when a ferromagnetic material is magnetized in one direction, it will not relax back to zero magnetization when the applied magnetizing field is removed. It must be driven back to zero by the additional opposite direction magnetic field. If an alternating magnetic field is applied to the material, its magnetization will trace out a loop called a hysteresis loop [34].

The hysteresis phenomenon is similar to the C-V curve in the MIS capacitor device. When we apply a voltage in reverse, it will not fit the original C-V curve measured previously. It is due to the interface traps which can trap charges to have impact on the flat band voltage and C-V curve. [23] Fig. 4-1 shows the hysteresis of p-type HfAlOgate dielectrics treated without PDA, plasma treatment and PNA and the hysteresis is 98 mV. Fig. 4-2 shows the hysteresis of p-type HfAlOgate dielectrics treated with N² plasma 30 sec plus CF4 plasma treatment for 60 sec process time.

Hysteresis of p-type HfAlOcapacitors is changed with the plasma treatment and its value is 7mV. The hysteresis is suppressed by means of the fixing ability at the interface. This means that fluorine incorporation into the HfO2 gate dielectrics to strengthens the HfO2 thin film.

Figure 4-3 shows the hysteresis of p-type HfAlOgate dielectrics treated with NH3 plasma 30sec plus CF4 plasma treatment for 60 sec process time. The tendency of hysteresis is similar with the case of N² plasma treatment and it’s value is 19 mV.

Fig. 4-4 shows the hysteresis of p-type HfAlO gate dielectrics treated with N2O plasma 30 sec and CF4 plasma treatment for 60 sec process time and its value is 41 mV. It also shows a likely tendency. As a consequence, the plasma treatment can improve the reliability of hysteresis for all the different optimal plasma gas treatment.

Among these samples, we can find that the hysteresis of N2 plasma treatment for 30 sec is the smallest but the other values are larger.

Figure 4-5 shows the hysteresis of p-type HfO2 gate dielectric without any treatment and the hysteresis is 32 mV. Fig. 4-6 shows the hysteresis of p-type HfO2

gate dielectrics with N² plasma 60 sec plus CF4 plasma treatment for 60 sec process time. The hysteresis voltage is 8mV and also small than the origin.

Figure 4-7 shows the hysteresis of p-type HfO2 gate dielectrics (MOCVD) with NH³ plasma 30sec plus CF4 plasma treatment for 60 sec process time. The hysteresis voltage is 11mV.Fig. 4-8 shows the hysteresis of p-type HfO2 gate dielectrics (MOCVD) with N²Oplasma 30 sec and CF4 plasma treatment for 60 sec process time.

The hysteresis voltage is 9mV, so nitridation and fluorination could decrease the trap density and let the thin film sustain high thermal stress.

Therefore, we can speculate that the sample without plasma treatment which is not very good at quality of interface oxide layer so that the charge was be trapped at the interface and flat band shift introduce hysteresis.

4.2 Stress Induced Leakage Current (SILC)

In order to investigate the reliability of MIS capacitor device, the stress induced leakage current is a common experiment. The mechanism about SILC is the stress induced trap density in the bulk in thin film. The trap density introduce new leakage path. Fig. 4-9 shows the SILC curve of p-type HfAlOgate dielectrics treated with N2

plasma 30sec and CF4 plasma treatment for different process time. After the stress of 5V constant voltage for 120 second, it is observed the leakage shift than before. The degree of leakage current degradation can be judged for the reliability of MIS capacitor. From Fig. 4-9, it displays the improvement of SILC compared with the capacitor of the original sample. Almost most samples are observed smaller increasing of leakage current after SILC than original sample. On the other hand, it is also noticed that the SILC of 90 sec treated sample become worse due to the plasma damage.

Figures 4-10 and 4-11 display the SILC curve of p-type HfAlOgate dielectrics treated with NH3 plasma plus CF4 treatment and N2O plasma plus CF4 treatment respectively. In Fig. 4-10, it is also noticed that the SILC of 120 sec treated sample become worse due to the plasma damage. In Fig. 4-11, it is observed that the SILC of 90 sec treated sample become lower due to the interfacial layer growth by plasma radicals. They all show the distinct improvement as long as they are treated with CF4

plasma treatment for 60sec.

Figure 4-12 shows the SILC curve of p-type HfO2 gate dielectrics treated with N2 plasma 60sec plus CF4 plasma for different process time. First, we use constant voltage (5V) for 120 sec to stress the thin film. After the stress of constant voltage

4-12, it is considered that the SILC of sample (600℃-30 sec + N2 plasma treatment 60 sec + CF4 plasma treatment 60 sec + 600℃-30 sec) which has the better C-V curve and the lowest leakage shows a small degradation. On the other hand, it is also can be noticed that the SILC of the samples treated with CF4 90sec is large due to plasma damage.

Figure 4-13 display the SILC curve of p-type HfO2 gate dielectrics treated with NH³ plasma 90sec plus CF4 plasma for different process time. First, we use (5V) for 120 sec to stress the samples. In Fig. 4-13, it was indicated that the SILC of the sample (600 ℃- 30 sec + NH3 plasma treatment 90sec+ CF4 plasma treatment 60sec + 600℃-30 sec) was lower than the sample treated with CF4 120 sec. The reason why the SILC of the sample treated with CF4 120sec is larger than origin may be etching caused by too many fluorine radicals. The leakage current of other samples after stress were larger than no stress samples. So, suitable nitridation and fluorination can decrease the SILC degradation effectively.

Figure 4-14 display the SILC curve of p-type HfO2 gate dielectrics treated with N2O plasma 90sec plus CF4 plasma for different process time. In Fig. 4-14, it was indicated that the SILC of the sample (600 ℃- 30 sec + N2O plasma treatment 90sec+ CF4 plasma treatment 60sec + 600℃-30 sec) was smaller than others. The reason is the same with NH³ sample. So the plasma treatment including of N², NH³, and N2O plus CF4 as source gas can have the reliability of devices to suppress SILC.

4.3 Constant Voltage Stress (CVS)

To study the reliability of Hf-based film, stressing the film with a constant voltage or a constant current are two common methods. The mechanism about CVS is the charge trapping by the interfacial trap density which is caused by stress for long time. Furthermore, the amount of charges cause more interface trap density and from

new leakage path to gain in leakage. In our experiments, we use constant voltage stress (CVS) to test the reliability of Hf-basedfilm. Fig. 4-15 shows gate current shift of p-type HfAlO gate dielectrics treated with N² plasma 30sec and CF4 plasma treatment for different process time as a function of stress time during Vg = 5 V CVS stress. From the condition of 30 sec to 60 sec, the current shift is smaller than others.

Then the current shift begins to become great by the plasma damage at the process time of 90 sec. Fig. 4-16 shows gate current shift of p-type HfAlOgate dielectrics treated with NH3 plasma and CF4 plasma treatment for different process time as a function of stress time during Vg = 5 V CVS stress. It has similar behavior about the trend compared with N2 plus CF4 sample. Fig. 4-17 shows gate current shift of p-type HfAlO gate dielectrics treated with N²O plasma and CF4 plasma treatment for different process time as a function of stress time during Vg = 5 V CVS stress. While the 60-sec treated sample presents the lowest current shift, the 120 sec treated sample become to be destroyed by the plasma damage.

Figure 4-18 shows gate current shift of p-type HfO2 gate dielectrics treated with N2 plasma treatment 60 sec and CF4 plasma for different process time during CVS with Vg = 5 V. It indicated that the thin film with N2 plasma treatment 60 sec which current shift was smaller than the original one. We can observe that the leakage shift of the sample with CF4 plasma 90 sec is larger than others except for origin. It may be caused by etching the Hf-based thin film with many fluorine radicals.

Figure 4-19 shows gate current shift of p-type HfO2 gate dielectrics treated with NH3 plasma treatment 90 sec and CF4 plasma for different process time during CVS with Vg =5 V. It indicated that the thin film with NH3 plasma treatment plus CF4 60 sec which current shift was smaller than the original one. The reason is the same with the sample treated by N² plasma.

Figure 4-20 shows gate current shift of p-type HfO2 gate dielectrics treated with N2O plasma treatment 90 sec and CF4 plasma for different process time during CVS with Vg = 5 V. It indicated that current shift of the thin film with CF4 plasma treatment 60 sec was smaller than the original one. The samples with CF4 plasma treatment 90 sec and 120 sec also had smaller current shift. Therefore, the growth of the interfacial layer may be caused by oxygen and fluorine radicals. The gate leakage shift level of the samples with or without nitridation and fluorination different about 2 orders, so nitridation and fluorination process could decrease the trap density effectively. Perhaps, one of the ways to improve the reliability of the gate dielectrics, is by incorporating N and F atoms in the thin film.

Chapter 5

Conclusions and Future work

5.1 Conclusions

In this thesis, we used the post-deposition annealing, plasma treatment and post-nitridation to enrich the Hf-basedfilm quality. The plasma treatment conditions are N2, NH3, and N2Oplasma plus CF4 plasma for 30 sec, 60 sec, 90 sec, 120 sec respectively. Several important phenomena were observed and summarized as follows.

First of all, improvement in the electrical characteristics of Al/Ti/HfAlO(HfO2)/Si MIS capacitors using plasma treatment has been demonstrated in this thesis. Most of the plasma treatment samples can promote the electrical characteristics and reliability until the plasma damage or the growth of interfacial layer happened. Among these treatments, the samples using N2, NH3 and N2Oplasma plus CF4 plasma all for 60 sec represent significantly great improvement, such as good capacitance, reduced leakage current (about 2 order reduction). It is observed that the formation of interfacial layer has been suppressed and the weak structure of interface has been repaired by N², NH³ and N2Oplasma plus CF4 plasma respectively. Besides, the sample treated by N2, NH3, and N²Oplasma all for 60 sec also show excellent promotion about reliability issue, such as smaller hysteresis, less SILC and better CVS curve. These results were ascribed to the good interface quality. On the one hand, the N²O plasma treatment has the lower leakage current than other plasma for HfO2. The reason is that the samples using N Oplasma and CF plasma treatment will introduce oxygen bonding to form

additional interfacial layer so that the capacitance will be lower. On the other hand, the thicker oxidation layer generates a good resistance against leakage current. Finally, in this thesis, the key points we focus on are both the improvement of capacitance and leakage current.

F in the oxygen vacancies of HfO2 will cause the leakage current decrease. The results show that fluorine atoms were accumulate into the HfO2 dielectrics to form Hf–F bonding by CF4 plasma, resulting in the reduction of gate leakage current, charge trapping, and the hysteresis. This means that fluorine incorporation into the HfO2 gate dielectrics to strengthens the HfO2 thin film. After CF4 plasma treatment, the fluorine atoms were incorporated into the interfacial layer (HfO²–Si interface) resulting in less charge trapping. It is indicated that fluorine atoms almost entirely distributed in the surface of the Si substrate and the interface between the Al/Ti gate and the HfO2 thin film. The fluorine atoms would first accumulate at the surface of the HfO² thin film and then diffused through the HfO² thin film to terminate the dangling bond and accumulate at the interfacial layer between the HfO2 thin film and the Si substrate. After the incorporation of fluorine atoms, the Hf–F bonding formation led to the reduction of charge trapping. With F passivation, Vth instability was improved and the stress-induced leakage current decreased greatly. They showed that F incorporation decreased the flatband voltage (Vfb) shift and suppressed the interface state generation.

5.2 Future work

1. The reason of leakage current mechanism：

We must try to research the mechanism for leakage current with SE, FP, F-N tunneling effect in Hf-based thin film further. Therefore, we can realize the mechanism of leakage and effectively prevent leakage problem.

2. Material Analysis：

We can use some material analysis methods such as TEM, SIMS, AFM to know the thin film composition precisely and verify the phenomenon observed from C-V and J-V curve, SILC, CVS etc.

3. Devices fabrication with the above results：

The optimum condition will be used to manufacture MOS device in the future.

Table

Table 1-1 The time of intel corporation found a solution for high-k and metal gate to keep continuation of Moor’s Law

Table 1-2: Material requirements of high-k dielectrics

Table 1-3 Comparison of relevant properties for various high- k candidates [32].

aCalculated by Robertson.

bMono.=monoclinic.

cTetrag.=tetragonal.

Table 2-1 Comparison of deposition techniques: Sputter, ALCVD, and MOCVD [53].

Figure-chapter 1

Figure 1-1 Illustration of Moore’s law: number of transistors integrated in the different generations of Intel’s microprocessors vs. the production year of these circuits.

Figure 1-2 Trend of device scaling: Transistor physical gate length will reach

~ 15nm before end of this decade and ~ 10nm early next decade.

Fig. 1-3 With the marching of technology nodes, gate dielectric has to be shrunk and five silicon atoms thick of gate dielectric is predicted for 2012.[2]

Fig. 1-4 Measured and simulated Ig-Vgcharacteristics under inversion condition for nMOSFETs. The dotted line indicates the 1A/cm² limit for the leakage current. [3]

Fig. 1-5 Conduction mechanism in oxide for the MOS structure.

Figure 1-6 (a) Energy band chart of NMOS device (b) The influence of poly-Si depletion for capacitance density.

Fig. 1-7 High-k+ metal gate transistors provide significant performance increase and leakage current reduction , ensuring continuation of moor’s law.

Figure 1-8 Power consumption and gate leakage current density comparing to the potential reduction in leakage current by an alternative dielectric exhibiting the same equivalent oxide thickness [5].

(a) Schottky Emission (SE)

(b) Frenkel-Poole Emission (FP)

(c) Fowler-Nordheim Tunneling (F-N)

Figure 1-9 (a) Schottky Emission (SE) (b) Frenkel-Poole Emission (FP) (c)Fowler-Nordheim Tunneling (F-N) current transport mechanism.

Figure 1-10 schemes of important regions in gate stack of a field effect transistor

Figure 1-11 Vo induction is from charge compensation in the case of N doping in HfO2. (a) N-doped HfO2 shows p-type semiconductor, if Vo does not appear. Vacant states appear at the top of VB. (b) Band gap recovery by NsVoNs complex structure creation in the case of a small amount of N. (c) Vo-related gap level appears in HfO2.

This level is occupied, and behaves as a donor to N-doped HfO2.

Figure 1-12 A large amount of N induces a large amount of Vo. The Vo–Vo interactions increase with the increase in amount of Vo. CB offset is deteriorated by Vo–Vo interactions. VB offset is deteriorated by Ns–Ns interactions via oxygen atoms.

Figure 1-13 Schematic view of the density of states around the band gap of N-doped HfO2, F- and N-doped HfO2, and F-doped HfO2. (a) N-doped HfO2 shows p-type semiconductor, if Vo does not appear. Vacant states appear at top of VB. (b) Band gap recovery by Fs–Ns pair. (c) No related gap level appears in Fs in HfO2.

Figure-chapter 2

Fig. 2-1 Schematic diagram of MOCVD system structure.

Fig. 2-2 The ICP plasma system that was used in this experiment.

Fig.2-3 (1)Si substrate RCA clean (2)3 nm HfAlO was deposited on the sub-Si by MOCVD.

Fig.2-4 (1) PDA by RTA (2) Plasma treatment (3) PNA by RTA

Fig.2-5 20 nm Ti was deposited on the HfAlO layer by dual e-gun evaporation system .

Fig.2-6 400 nm Al was deposited on the Ti layer as top electrode by dual e-gun evaporation system.

Fig.2-7 Undefined Al was removed by wet etching .

Fig.2-8 Undefined Ti was removed by wet etching (1%HF).

Fig.2-9 Al was deposited on the back side of sub-Si as bottom electrode by dual e-gun evaporation system.

Fig. 2-10 MOS diode capacitance structure

Fig. 2-11 The energy band plot and electric charges distribution of MOS diode capacitance under bias voltage.

Fig. 2-12 The capacitance-voltage curve of three different conditions

Figure-chapter 3

Fig.3-1 The capacitance-voltage (C-V) characteristics of HfAlO gate dielectrics treated with N² plasma 30 sec and CF4 treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-2 The capacitance-voltage (C-V) characteristics of HfAlO gate dielectrics treated with NH³ plasma 30sec and CF4 treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-3 The capacitance-voltage (C-V) characteristics of HfAlO gate dielectrics treated with N²Oplasma 30 sec and CF4 plasma treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-4 The capacitance-voltage (C-V) characteristics of HfO² gate dielectrics treated with N² plasma 60 sec and CF4 plasma treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-5 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with NH3 plasma 90sec and CF4 plasma treatment for different process time.

-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-6 The capacitance-voltage (C-V) characteristics of HfO2 gate dielectrics treated with N2O plasma 90sec and CF4 plasma treatment for different process time.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-7 The capacitance-voltage (C-V) characteristics of HfAlO gate dielectrics treated with N² ,NH³,N²O plasma treatment and CF4 plasma at optimal condition.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

Fig.3-8 The capacitance-voltage (C-V) characteristics of HfO² gate dielectrics treated with N² ,NH³,N²O plasma treatment and CF4 plasma at optimal condition.

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 0.0

2.0x10

^-7

4.0x10

^-7

6.0x10

^-7

8.0x10

^-7

1.0x10

^-6

1.2x10

^{-6 origin}

800⁰C-60sec

800⁰C-60sec+N₂-30sec+600⁰C-60sec 800⁰C-60sec+NH₃-30sec+600⁰C-60sec 800⁰C-60sec+N₂O-30sec+600⁰C-60sec

Capacitan ce (F /cm 2 )

Voltage(V)

Fig.3-9 The capacitance-voltage (C-V) characteristics of HfAlO gate dielectrics treated with N² plasma treatment, NH³ plasma treatment and N²O plasma treatment all for 30 sec.

Fig.3-10 The capacitance-voltage (C-V) characteristics of HfO² gate dielectrics treated with N² plasma treatment, NH³ plasma treatment and N²O plasma treatment.

-2.0 -1.5 -1.0 -0.5 0.0

Fig.3-11 The J-V characteristics of p-type HfAlOcapacitors treated with N² plasma 30 sec and CF4 treatment for different process time from 0 V to -2 V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig.3-12 The J-V characteristics of p-type HfAlOcapacitors treated by NH³ plasma 30sec and CF4 plasma treatment for different process time from 0 V to -2 V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig.3-13 The J-V characteristics of p-type HfAlOcapacitors treated by N²Oplasma 30sec and CF4 plasma with different process time from 0 V to -2 V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig.3-14 The J-V characteristics of p-type HfO² capacitors treated with N² plasma 60 sec and CF4 plasma treatment for different process time from 0 V to -2 V.

-2.0 -1.5 -1.0 -0.5 0.0

Fig.3-15 The J-V characteristics of p-type HfO² capacitors treated with NH³ plasma

Fig.3-15 The J-V characteristics of p-type HfO² capacitors treated with NH³ plasma

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