Chapter 2 System Platform
2.3 Channel Model
2.3.5 System Clock Offset
The clock drift means the different between the sampling frequency of the digital to analog converter (DAC) and the analog to digital converter (ADC). Because of sampling frequency offset, even if the initial sampling point is optimized, the following sampling points will still slowly shift with time. This model is using compress sinc waveform to cause the clock drift effect, and its effect can be written as
( s) preADC( s) *sin ( s n)
where RpreADC represents the ADC original output signal,Δ represents shift sampling Ts period and to get R nT signal by convoluting the ADC original output signal and shifted ( s) sinc waveform. Figure 2-10 shows the clock drift model effect. Initial can samples at optimum sampling points, then slightly incorrect sampling instants will cause the SNR degradation.
Figure 2-10: The sinc waveform of clock drift model effect
1500 1510 1520 1530 1540 1550 1560 1570 1580 0.06
0.07 0.08 0.09 0.1 0.11 0.12
Time (ns)
amplitude (mA)
Instantanous Impulse Response of Sample Clock Offset SCO 0 ppm SCO 400 ppm SCO 1000 ppm SCO 10000 ppm
Chapter 3
Proposed algorithm
3.1 Timing synchronization introduction
The interface between RF and Baseband data are Digital to Analog Converter (DAC) in the transmitter and Analog to Digital Converter (ADC) in the receiver side. The ADC is the first stage of baseband, so it dominates the receiving signal to noise ratio (SNR). To get the highest input SNR, the ADC is hoped to sample at the eye open position where it has the maximum signal power. However, the initial sampling phase could be anywhere in the eye diagram, so timing synchronization is necessary. The ADC has two kinds of clock source:
free running clock and phase lock loop (PLL) output clock. With free running clock, this method also called non-synchronous sampling or fix sampling and there clock frequency and phase are fixed. Once timing error was estimated, the compensation would be performed with the interpolator. With PLL output clock, is also called synchronous sampling or dynamic sampling, the receiver detect the timing error and adjusts its frequency and phase to compensate the error. It is a needed to maintain synchronization while the accuracy and stability of the original clock reference in the receiver is not ideal. Figure 3-1 illustrates the block diagram of dynamic sampling. The clock source is the ADDLL output. ADDLL (All-digital delay lock loop) would adjust the sampling clock frequency and phase directly once the timing error is estimated [12], [13], [14], [15].
ADC
clock
Demodulation
Error estimate ADDLL
Figure 3-1 The block diagram of dynamic sampling
In this thesis, dynamic sampling method is chosen to compensation the error phase.
Before timing synchronization, the ADC in the receiver samples the input signal with the
initial phase and then makes the sample clock phase sample correct on the eye open position.
The synchronization flow is shown in Figure 3-2. The packet synchronization simultaneously perform the correlation and detection distribution in [16], and our algorithm will focus on timing synchronization in this thesis
Figure 3-2 The Synchronization Flow
3.2 Timing synchronization algorithm
3.2.1 Introduction
There are many timing acquisition methods, such as the idea of early-late gate or ML algorithm. All of these methods calculate the correlation power and compare with each other.
Those algorithms find out the largest one and adjust the sampling point to where the largest one is. The correlation is to use one preamble signal with fixed form, then use this preamble signal to perform multiply-add operations. The preamble is constructed based on the L-STF (Legacy Short Training Field) in the 802.11n MIMO system. The cross-correlation formula is
Those methods may suffer some problems in the multi-path channel environment that the sampling point has the largest correlation power may not be the ideal sampling point. In such channel environment, the input signal power maybe degrades or enhances by noise or the summing up the multi-path powers of input signal time delay [8]. Figure 3-3 shows the correlation power affected by multi-path channel in RMS 100ns and 15 taps but without AWGN. In this figure, the correct sampling point is at 22, but the method by select the
maximum correlation power will select at 26 to be the best sampling point. Figure 3-4 shows the correlation power effect by multi-path channel in RMS 100ns, 15 taps and AWGN with SNR 18dB. In this figure, the correct sampling point is at 22, but the method by select the maximum correlation power will select at 29 to be the best sampling point.
Figure 3-3 Input signal effect by multi-path with no AWGN
Figure 3-4 Input signal effect by multi-path with AWGN in SNR 18dB
3.2.2 Proposed algorithm
The one of idea which we will be used was proposed in [16]. In that, we can adjust the sampling point by use the front boundary and rear boundary of the boundary which is corresponded to with the input signal. The conception of this idea can be explained with a simple example shown in Figure 3-5.
Figure 3-5 Illustration boundary idea
As a real plane like Figure 3-5, the sample point is shifted with time from the left to the right. And the value is sampled from 0.9 to 2.2 through the value 1 and 2. In those value, the sample point at closed to 1 and 2, such as sample point A and B, can get a closed to 1, such as 0.9 or 1.1. We will determine the sample value at sample point A and B to 1 directly, because they are closed to 1. The same thing is happened when sample point is close to 2. But in the sample point like C and D in the middle of 1 and 2. It’s difficult to judge the sample value. If the position of 1 and 2 are the ideal sample points we want to sample. Then it is nearly correct position to sample at the point A, B, E and F. Hence it has the sample value closed to 1 and 2.
Performing this ideal to determine sample point in the system, there are some things to prepare. First, a set of preamble is needed to perform correlation. The preamble is formed by the repetition of ten L-STS of 16 samples each, as the figure 2-4. Consider the boundary correlation buffer (BCB) fill with ideal short training sequence with a cyclic shift like the equation(3.3). symbol boundary detection scheme in the system platform. The architecture is like the Figure 3-6. Performing the correlation between the input signal and BCB like the equation (3.1), we can get a set of correlation power. By compare the correlation power with P1 andP3, we can adjust to the ideal sample point. The phase error and the correlation power betweenP1, P2 and P3 are shown in Figure 3-7
Figure 3-6 Cross-correlation architecture
Correlation
Figure 3-7 Correlation power between Pi and Phase error
Another idea we used was proposed in [15], that tell us how to execute 1x sampling rate acquisition algorithm. Figure 3-8 show the step which sample at different phase in each sampling time. In step1, we sample the input signal at initial phase; step 2 sample the input signal atinitial_ phase+120o, and step 3 sample the input signal at initial_phase+240o. In the step 4, we sample the input signal at initial_ phase+60o, because the correlation power relationship is step1>step2>step3. After 4 steps, the way to adjust sampling point to the ideal sampling point is shown in Figure 3-9. In Figure 3-9, it was according to the ratio of the relationship ofP1,P4 and P2 to adjust the final sampling phase. As the Figure 3-9, A and B express different ratio betweenP1,P4 andP2. In the Figure 3-9.1, P2−P4 ≅P2 − , this P1 means sampling point in step4 is correct. In the Figure 3-9.2, P2−P4 > P2− , so need to P1 adjust the sampling point close to the sampling point in step2. In the Figure 3-9.3, is opposite case shown in Figure 3-9.2.
Figure 3-8 Down sample at different phase diagram
Figure 3-9 Correlation ratios in different phase
In the proposed synchronization algorithm, we will combine the two skills mentioned above but with some modification. In this method, we down sample at different sampling phase and calculate correlation power by equation (3.1), but in proposed timing synchronization algorithm, we use boundary correlation buffer (BCB) Q k( )as equation (3.4). [16] is a good timing synchronization algorithm, but this algorithm depend on the correct result of symbol boundary detection. If the result of symbol boundary detection is wrong, this will affect the timing synchronization. So will use not only three shift preamble, but all of the cyclic shift preamble, like the equation (3.4).
The preamble is continuous and repetition data. With shift and arrange preamble in a BCB array, we can determine the input signal corresponds to what preamble is, for example, if input signal corresponds to Q k2( ) means the income input signal now most likely [L−STS(2) L−STS(3) " L−STS B( −1) L−STS B( ) L−STS(1)] and start withL−STS(2). So we will know the input signal starting position correspond to which preamble. Like the step shown in Figure 3-8, and correlation with equation (3.4) by equation (3.1). There is a set of starting position of the preambles in the BCB array. We saved those starting position in an array and called “decision boundary array”. In the “decision boundary array”, we try to find a region called “decision region” which has continuous and the same start position of preamble, because the ideal sampling phase is in this region. The proposed algorithm architecture is shown in Figure 3-11.
The ideal sampling phase is in the “decision region”, and the reason we has explained before. So the “decision boundary array” could be an array like [1 1 ? ? 2 2], and the ideal sample point in the region has continues and the same start position called “decision region”, the array
[
1 1]
and[
2 2]
.After finding the “decision region”, we have already narrowed down the search range.
Then we will try to find ideal sample point in the “decision region”. Up to now, we eliminate those sample point that has the bigger correlation power but not closed to the ideal sampling point. Then we compare those correlation powers in the decision region and choose the one has the maximum correlation power in the decision region. Because the sample point in the
“decision region” are possible to be ideal sample point, but the one with the max correlation power is maximum likely.
Figure 3-10 show the flow chart of proposed algorithm.
Figure 3-10 Flow chart of proposed algorithm
Figure 3-12 distribute this phenomenon in multi-path channel, SNR 18dB. The ideal sample point is located in the _ 1
ini phase+6π , but the maximum power is in the _
ini phase+ . π
In our proposed algorithm, the decision region is _ _ 1 ini phase ini phase 6π
⎡ + ⎤
⎢ ⎥
⎣ ⎦, and
the sampling point we will determine is in the _ 1
ini phase+6π . The sample point we determined is the same with ideal sample point.
Figure 3-11 Proposed algorithm architecture
Figure 3-12 The phenomenon of the proposed algorithm in multi-path channel
Figure 3-13 The phenomenon of the proposed algorithm in Time variance channel Figure 3-13 distribute this phenomenon in time variance channel. The velocity is 120 km/hr, 15 taps, RMS 100ns, SNR 18dB. The ideal sample point is located in
the _ 5
ini phase+6π, but the maximum correlation power is in the ini_phase+ . π
In our proposed algorithm, there will be two decision regions here. One
is _ 1 _ 1 _ 1
6 3 2
ini phase π ini phase π ini phase π
⎡ + + + ⎤
⎢ ⎥
⎣ ⎦ because their boundary
information is the same, 9 and their correlation power is [0.389 0.3345 0.3395]. The other
is _ 2 _ 5
3 6
ini phase π ini phase π
⎡ + ⎤
⎢ ⎥
⎣ ⎦ because their boundary information is the same, 5
and their correlation power is [0.3771 0.3995]. The maximum power in the two decision region is 0.389 and 0.3995, compared with the two maximum correlation power in each decision region. We will choose that decision region which the maximum power and it is 0.3995. The finial sampling point we will determine is in the _ 5
ini phase+6π, this sample point we determined is the same with ideal sample point.
Some expectant situations may happen in this algorithm. In the proposed algorithm, we need to find “decision region” first. How should we do if there are many “decision region”
exist at the same time or there is no any decision region? In the first situation, the way to
choose decision region is finding the maximum correlation power in each decision, and the region has the maximum correlation power between each region is what we want. Then repeat algorithm mentioned above. Figure 3-13 also describe about this.
In the second situation, there are two possible situations but can be recognized as the same situation, cannot find any “decision region” in “boundary decision array”. One is that no continuous and the same start position and another is that have the same start position but not continuous. We solve this problem by comparing the correlation power straightforward, and choosing the one have maximum correlation power. The two situations are shown in Figure 3-14. In Figure 3-14.1 can find two decision regions and we need to specify one. In Figure 3-14.2 we cannot find any decision region in decision boundary array.
Figure 3-14 Exception in this algorithm
Figure 3-15 shows the difference between the sample point which we determined and the ideal sample point. We count total 1500 packets in multi-path channel with 15 taps, RMS 100ns. The RMSE (root mean square error) is 2.653, this shows that in general speaking the difference between the samples points whose we determined and the ideal sample point is 2.653. The equation of RMSE is
RMSE Sampling phase Ideal phase N =
=
∑
− (3.5)And Figure 3-16 shows the difference between the sample point which we determined and the ideal sample point. We count total 1500 packets in time variance channel with 15 taps, RMS 100ns, and velocity 120 km/hr. The RMSE (root mean square error) is 2.653. This show that the difference between the sample point we determined and the ideal sample point is 2.930.
Figure 3-15 Sample difference in Multi-path channel 15 taps RMS 100ns
Figure 3-16 Sample difference in Time variance channel velocity 120 km/hr 15 taps RMS 100ns
Chapter 4
Simulation Result
E use simulation to evaluate the receiver’s performance with the AWGN, Multi-path fading and time variance channel effect. We can express the received signal sample as:
Where the H k is the multipath with time-variant model, the exponential term is CFO ij( ) effect, the sinc part is SCO effect and N k is AWGN. ij( )
4.1 Simulation Platform
MATLAB is chosen as simulation language, due to its ability to mathematics, such as matrix operation, numerous math functions, and easily drawing figures. A MIMO-OFDM system based on IEEE 802.11n Wireless LANs, TGn Sync Proposal Technical Specification, is used as the reference simulation platform. The major parameters are shown in Table 4-1.
Table 4-1 Simulation parameters
Parameter Value
MCS Set 27 / 29
Antenna No. 4*4
Modulation 16 QAM / 64 QAM
Coding Rate 2/3
PSDU Length 1024 Bytes
W
Carrier Frequency 2.4 GHz
Bandwidth 20 MHz
IFFT / FFT Period 3.2 sμ
4.2 Simulation Result
As mention before, the multiphase generator is used to generate 22 phases between one clock cycles. In other word, the phase error 22 means that signal is delay one cycle, and the phase error 0 means that sign is at ideal phase.
With different initial phase errors, after timing synchronization, including coarse and fine timing synchronization, the final phase errors are convergence into 3 phases. As shown in Figure 3-15 and Figure 3-16.
Next we will show the performance under the simulation platform defined in Table 4.1.
First, consider with the 4*4 MIMO-OFDM system with 64 QAM modulation and TGn channel E (RMS=100ns, Tap=15). The performances are shown in Figure 4-1. The legend ideal sample means to get each sample at right phase (phase error 0). This work sample means use the proposed algorithm in section 3.2 with an unknown initial phase errors to get sample. No synchronization sample means without an algorithm to fix the error of an unknown initial phase.
Figure 4-1-(a) shows the required SNR is 19dB, lost about 1 dB when compare with the ideal sampling. Take the SCO effect into consideration, the required SNR with SCO 400 ppm is about 20dB, lost about 2 dB when compare with no SCO effect. Figure 4-1 -(b) shows the proposed algorithm can tolerance SCO effect about 400 ppm.
Then, consider with the 4*4 MIMO-OFDM system in Time Variance channel with 64 QAM modulation and TGn channel E (RMS=100ns, Tap=15). The performances are shown in Figure 4-2 and Figure 4-3. Figure 4-2-(a) shows the required SNR is about 29 dB in Time variance channel with velocity 30km/hr, lost about 1.2 dB when compare with the ideal sampling. Take the SCO effect into consideration, the required SNR with SCO 400 ppm is about 31dB, lost about 3.5 dB when compare with no SCO effect. Figure 4-2-(b) shows the proposed algorithm can tolerance SCO affect about 400 ppm.
Figure 4-3-(a) shows the required SNR is about 31 dB in Time variance channel with velocity 120km/hr, lost about 1.5 dB when compare with the ideal sampling. Take the SCO effect into consideration, the required SNR with SCO 400 ppm is about 32dB, lost about 2 dB when compare with no SCO effect. Figure 4-3-(b) shows the proposed algorithm can tolerance SCO affect about 400 ppm.
(a) PER vs. SNR
(b) PER vs. SCO
(a) PER vs. SNR
(b) PER vs. SCO
Figure 4-2 : The system performance of 4*4 MIMO-OFDM in Time Variance channel 30km/hr with 64 QAM, TGn channel E
(a) PER vs. SNR
(b) PER vs. SCO
Figure 4-3 : The system performance of 4*4 MIMO-OFDM in Time Variance channel 120km/hr with 64 QAM, TGn channel E
Chapter 5
Conclusion and Future work
N this thesis, based on the preamble structure of IEEE 802.11n standard, a synchronization algorithm for IEEE 802.11n WLANs over TGN channels is proposed.
A realistic channel model was employed, which includes the effects of Time variance channel, sampling clock offset, etc. Loss in system performance due to synchronization error was used as a performance criterion.
5.1 Conclusion
We compare other methods with the proposed algorithm in section 3-2. Due to the reason of lack time, we compare two other methods in our system platform. The major improve is in the converge SNR. The comparison is listed in Table 5.1
5.2 Future work
In this thesis, we proposed a method to solve the synchronization problem cause by the multi-path channel. In the time variance channel, it has the same problem like the multi-path channel, but there is still some other problem need to solve. Some other situations can cause synchronization error, like the boundary detection error, Doppler Effect and serious fading by SCO. Otherwise, man-made noise is also a source to affect the accuracy of timing synchronization. Those problems need to be solved in the future.
As to the system, high QAM constellation likes 256-QAM for higher data rate is going to be deployed. Then, more antennas of transmitter and receiver like 8*8 are taken into consideration. Even huge FFT/IFFT (size bigger than 1000) is also a good research topic.
I
[15] [16] This work
Control Factor Phase (32 phases)
Converge Cycle 4 symbols 1 symbols 4 symbols Table 5-1: Comparisons among timing synchronization algorithm
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