Thermal Estimation under Different Technology Size Using Different

Optimization

In this part, we will analyze the results about running the same workload under different technology size through using different compiler optimization.

First, Instead of using customized program, we use 401-Bzip2 of SPECCPU2k6 benchmarks as our workloads and ALPHA 21264 is adopted for our microprocessor architecture when we use Gem5 ISA simulator with CPU frequency setup 2GHz and generate much meaningful power information with sample rate 10000 cycles. The floor plan of ALPHA 21264 is shown in Figure 4.

Because we want to get power and thermal information of theses functional units, Table 1 is shown the type of performance counters we catch to use. For the different technology size of the chip we will use 70 nm to compare with 22 nm. Under these two different size (70 nm and 22 nm) of technology we respectively apply O1 and O2, which are different types of compiler

optimization, to compile Bzip2 to as their workloads and analyze their performance, power information and thermal information. O1 is one type of compiler optimization to minimize the code size and O2 is another one type to maximize speed.

Figure 4 - ALPHA 21264 processor floor plan

Table 1 – performance counters for ALPHA 21264

Performance Counters for ALPHA21264

BRANCH_MISS BRANCH_INSTR BRANCH_RASUSE LSQ_PREG

LSQ_WAKEUP INT_REG FP_REG

INT_ALU FP_ALU ICACHE_miss DCACHE_miss ICACHE_hit DCACHE_hit L2CACHE_miss L2CACHE_hit

Thermal information about integer/floating register, icache/dcache, and integer/floating ALU under 70 nm using O1 and O2 is shown in Figure 5 and another situation of thermal information under 22 nm using O1 and O2 is shown in Figure 6. We can see the different detailed thermal information of each functional unit between different technology sizes. Comparing the result of O1 with O2 under these two technology sizes, we can find that the average temperature of O2 is higher than the result of O1 under both of 70 nm and 22 nm because O2 will maximize speed and it will let the core not only enhance its performance but also its temperature.

Figure 5 – thermal information of functional units when run Bzip2 using O1 and O2 under 70 nm

Figure 6 - thermal information of functional units when run Bzip2 using O1 and O2 under 22 nm

Through observing Figure 7 we can know that O2 has less execution time than O1 and it means O2 has better performance. In Figure 8 and Figure 9 it is shown dynamic power and dynamic energy under 70 nm and 22 nm through using O1 and O2 respectively. Because O2 has better performance, we can get O2 consume much more dynamic power than O1. But if we consider the execution time between O1 and O2 to compute their dynamic energy, we find that O1 accumulate much more dynamic energy consumption than the result of O2 since O1 have to perform more long. Hence, we can get that in traditional way if we optimize the performance, we also can get less power energy consumption so we only need to optimize its speed.

Figure 7 – Execution time under 70 nm and 22 nm using O1 and O2 respectively

Figure 8 – dynamic power under 70 nm and 22 nm using O1 and O2 respectively

Figure 9 - dynamic energy under 70 nm and 22 nm using O1 and O2 respectively

We know that dynamic power almost occupy the whole power consumption in traditional way, so we just need to notice dynamic power consumption. However, if we consider the new generation technology size under 90 nm, we can find that leakage power will occupy a big part of power consumption in the future technology. Figure 10 is shown that the proportion of dynamic power and leakage power under 70 nm and 22 nm using O1 and O2 respectively. Along with the decreasing of technology size, the proportion of leakage power in total power consumption has risen from 50% to 90% among 70 nm and 22 nm. Leakage power consumption will accounts for up to 90 percent of the total power consumption in the future.

Figure 10 – proportion of dynamic power and leakage power under 70 nm and 22 nm using O1 and O2 respectively

Hence, we observe leakage power and energy consumption under 70 nm and 22 nm. Figure 11 and Figure 12 show that O2 not only consume much more leakage power but also leakage energy than the result of O1. Because leakage power consumption will accounts for up to 50 percent of the total power consumption under 90 nm and the difference of leakage power between O1 and

O2 will be much bigger along with the decreasing of technology size, the influence of performance can’t let the leakage energy consumption of O2 to be smaller than the result of O1.

Figure 11 – leakage power under 70 nm and 22 nm using O1 and O2 respectively

Figure 12 - leakage energy under 70 nm and 22 nm using O1 and O2 respectively

Figure 13 and Figure 14 show the results of total power and energy consumption under 70 nm and 22 nm using O1 and O2 respectively. Because of the influence of leakage power and energy, it results in that the total power and energy of O2 is much bigger than the result of O1. In the future, we can’t just ignore the influence of energy consumption since it is not right that if we optimize performance, then it will optimize the energy consumption by increasing speed.

Figure 13 – total power under 70 nm and 22 nm using O1 and O2 respectively

Figure 14 - total energy under 70 nm and 22 nm using O1 and O2 respectively

At last, we will analyze the energy-delay product (EDP) [6] of O1 and O2 under 70 nm and 22 nm. The results are shown in Figure 15. We can see that although the EDP of O2 is better than the result of O1 no matter we use 70 nm or 22 nm, we can see the results in Figure 16. It is shown that the difference of EDP between O1 and O2 is much smaller along with the decreasing of technology size. If the technology size of IC keep reducing in the future, the difference of leakage power and energy consumption between O1 and O2 will be more enormous and the EDP of O1 will be better than the EDP of O2 since the influence of leakage energy on EDP will be much heavier than the delay.

Hence, we can’t just see how to optimize the performance but we have to focus on the influence of leakage power and energy consumption in the next decade compiler design.

Figure 15 – energy delay product under 70 nm and 22 nm using O1 and O2 respectively

Figure 16 – the difference of EDP between O1 and O2 under 70 nm and 22 nm