Validity Check of Software-Based Analysis Method

Meandered CCS TL is a two-dimensional guiding structure composed of straight and bend CCS unit cells with non-uniform cross sections as illustrated in Fig. 2.1(a).

At the top layer of a CCS unit cell contains a central patch and two connecting arms for interconnections with widths of W and S, respectively. At the bottom layer of the unit cell is a mesh ground plan of a W_h x W_h opening with a periodicity of P. The photograph of the layout of the experimental meandered CCS TL in CMOS 0.18µm technology used for validity check is depicted in the right side of Fig. 2.1(b). This structure utilizes the topmost Metal-6 layer for central patches and connecting arms

and the Metal-2 layer for the mesh ground plan. The employed CCS unit cell has a periodicity of 34 µm, a central patch of 10 µm, a connecting arm of 10 µm, and a square opening in the mesh ground plan of 30 x 30 µm, respectively. At the outer border of the bottom layer, the metal width was enlarged to 34 µm to establish a physical connection between the mesh ground plan and the ground-reference pads at Metal-6 layer through VIA 1 to 5 layers. Notably, this CMOS monolithic CCS TL structure occupied an area of 919 x 701 µm² has 234 CCS unit cells with a total length of 7.956 mm.

The small-signal two-port scattering parameters were measured from 1 to 8 GHz after the on-wafer short-open-load-through (SOLT) procedures had been preceded.

Effects introduced by the ground-signal-ground (G-S-G) probing pads had also been removed by the deembedment. Then the effective complex propagation constant and complex characteristic impedance were extracted from the equivalent complex ABCD matrix transferred from the measured two-port scattering parameters [31].

Validity checks of the software-based analysis method were conducted by comparing the extracted propagation characteristics and characteristic impedances from the EM simulation with those from the measurement. Theoretical two-port scattering parameters of a 6x3 two-dimension lattice CCS TL circuit with the same geometrical size of the unit CCS cell are obtained by applying an EM solver (Ansoft^TM HFSS v10.0), using the finite element method. Regarding the physical parameters including layer thickness, relative dielectric constant, and conductivities of the silicon substrate and alumina-metal layers of the particular CMOS 0.18µm technology used for theoretical analysis are shown in the left side of Fig. 2.1(b).

Cross Section A Cross Section B

Cross Section A Cross Section B X

Fig. 2.1 CMOS monolithic 0.18 µm complementary conducting strip transmission line (CCS TL). (a) Straight and bend CCS unit cells. (b) Photograph of the 7.956 mm meandered CCS TL test structure with W equal to S. The right inset illustrates the material parameters.

The data derived form the measurement and simulation are show in solid and dotted lines in Fig. 2.2. For clearness, the complex propagation characteristics (γ=α+jβ) were illustrated as the normalized phase constant (β/k0) and attenuation constant (α/k0), respectively. Through the entire spectrum, the simulated propagation constants were in good agreement with the measured data, as shown in part (a) of Fig. 2.2. The maximum deviation of the normalized phase constant is 0.17 at 1.0 GHz and less than 0.03 from 4 to 8 GHz. Regarding the normalized attenuation constant, the maximum deviation is 0.34 at 1 GHz and continuously get smaller as frequency increased. For example, at 6 and 8 GHz the deviations are reduced to 0.05 and 0.02. Within the C-Band spectrum, from 4 to 8 GHz, the root-mean-square (RMS) values of the normalized phase constants derived from the measurement and simulation are 2.04 and 2.07. The corresponding values of the normalized attenuation constants are 0.36 and 0.42. Part (b) of Fig. 2.2 plots the real (Re(Z_c)) and imaginary (Im(Z_c)) parts of complex characteristics impedance (Zc). The RMS values of real part characteristic impedances derived from the measurement and simulation are 64.86 and 66.78 Ω. The corresponding values of imaginary parts are 10.57 and 11.04 Ω, respectively. In summary, the relative RMS deviations of γ and Zc are 2.65% and 2.99% across the C-Band. The data shown in Fig 2.2, therefore, have demonstrated the software-based analysis method could predict the guiding characteristics of meandered CCS TLs in CMOS 0.18µm technology with a reasonable confidence level, a deviation less than 3 percentages.

(a)

(b)

Fig. 2.2 Measurement and simulation results of equivalent transmission line characteristics of the meandered 0.18 µm CMOS CCS TL in Fig 2.2(b) from 1 to 8 GHz. (a) Normalized attenuation (α/k0) and phase (β/k0) constants. (b) Real (Re(Z_c)) and imaginary (Im(Zc)) parts of characteristic impedance (Zc).

2.2 Comparative Study of CCS TL against Microstrip in Meandered Configuration

Many observations of meandered CCS TLs against microstrips (MS) in printed circuit board (PCB) technology had been reported in [28, 32]. The comparative study performed in this section, rather, emphasized on CMOS monolithic technology for compact microwave integrated circuit integration and guiding properties of meandered CCS TLs with high characteristic impedances (Zc). The particular 0.18 µm CMOS technology applied to this study was identical to that of the validity-check experiment in Section 2.1. In order to have enough impact on guiding properties of meandered CCS TLs, the ground plane opening and the periodicity were enlarged to 40 µm and 44 µm. The width of central patch was varied from 2 µm to 30 µm corresponding to the minimum and maximum permissible width of Metal-6 layer. In additional to the meandered CCS TL cases of equal connecting arm and central patch, the cases of S unequal to W with S = 6 µm and S = 15 µm are also included. Part (a) of Fig. 2.3 indicates a 5 x 3 2D meandered CCS TL of S = 6 µm and W = 20 µm. For a fair comparison, the meandered layout pattern of the microstip is arranged the same as that of the meandered CCS TL, as demonstrated in Fig. 2.3(b). The line width of the microstrip is also set equal to the center patch (W) of the CCS TL. The software-based analysis method is applied to derive the guiding properties, real part of Zc (Re(Zc)), normalized phase constant (SWF), and loss per guiding wave length (dB/λg), of meandered CCS TLs and microstrips at 6.0 GHz. The analyzed results are summarized in Fig. 2.4 and 2.5.

(a)

(b)

Fig. 2.3 Meandered test structures used at the comparative study of CCS TL anagist microstrip in standard CMOS 0.18 µm technology. (a) 5 x 3 2D meandered CCS TLs with W, S, W_h, and P equal to 20, 6, 40 and 44 µm. (b) Meandered microstrip with a 20-µm width.

When W is 2, 10 and 30 µm, the real part of characteristic impedance (Re(Zc)) of the meandered CCS TL of S equal to W, plotted in the solid black square symbol in Fig. 2.4(a), illustrates a 20.95, 19.89, and 12.57 ohm increase of the corresponding meandered microstrips (MS), drawn in the hollow square one. This result shows that the meandered CCS TL of S equal to W possesses a higher characteristic impedance than that of the meandered MS. Compared the meandered CCS TLs of S unequal to W with S equal to W, the increase in Re(Z_c) is average 12.32 and 6.12 ohm when S = 6 µm and S = 15 µm for W varying from 20 µm to 30 µm. As expected, a wider S would results in a wider MS section within the meandered CCS TL introducing a lower value of Zc [28]. Nevertheless, the meandered CCS TL with non equal S and W is a more efficient guiding structure for designing high characteristic impedance and suitable for compact layout integration. Regarding the sensitivity on variations in W, the Zc for meandered CCS TL of S = 6 µm decreased 8.26 ohm when W increased from 8 µm to 15 µm and decreased 6.12 for S = 15 µm and W increased from 20 µm to 30 µm. However, the decreases of Zc for the meandered microstrip against the same variations in W were 20.0 and 8.04 ohm, respectively. These observations indicate that the meandered CCS TL with non equal W and S is less sensitive in lowering Zc due to the meanderings than the meandered microstrip.

Part (b) of Fig. 2.4 plotted the slow wave factors (SWF) of meandered CCS TLs and microstrips against W. As could be observed easily, the SWFs of the meandered CCS TLs of S equal to W are almost insensitive to the change of W across the entire range of interest. The averaged SWF of the particular case is 2.085 with a maximum deviation of only 1.37%. Since a wider S or an equivalent wider MS section would cause a decrease in the effective series inductive component. But a wider W would also results an increase in the effective shut capacitive component (C). Therefore, the

resultant phase constant, proportional to LC , has insignificant changes. However the effective Z_c, proportional to

(

^R+jωL

) (

^G+jωC

)

, would be lowered which had been observed in Part (a) of Fig. 2.4. Moreover, the meandered CCS TLs of S unequal to W show even slower guiding properties than S equal to W. Since their effective series inductive component (L) were not changed due to a fixed size of S. But the effective shunt capacitive part (C) were enlarged with the increase of W. Thus the resultant SWFs exhibit monotonically increases against W. On the contrary, SWFs of the meandered microstrips fall from 1.995 to 1.797 with a decrease rate of 9.9% when W increase from 2 µm to 30 µm. Therefore the meanderings of microstips cause a significant reduction in the SWF. Which reflecting the fact the propagating characteristics of meandering CCS TLs are less susceptible to the meanderings than the meandered microstrips.

Figure 2.5 depicts the loss per guiding wavelength (dB/λg) against Re(Zc). The size of W employed in each structure was also shown beneath the corresponding symbol in the same figure. When Re(Z_c) above 61.24 Ω, the meandered CCS TLs of S unequal to W with S = 6 µm demonstrate lower loss properties than that of the meandered TLs of S equal to W. Since the average metal strip of the first structure is averagely wider than the second one. Besides the first structure also has a shorter guiding wavelength, inversely proportional to the SWF, as explained before. Therefore a better loss characteristic for high-impedance CCS TL of S unequal to W in meandered form could be expected. Compared to meandered microstrips, either meandered CCS TLs of S unequal to W or S equal to W demonstrates lower dB/λg at the same high-characteristic-impedance region. The behind mechanism also relies on a wider metal strip and superior slow wave property. When Re(Z_c) is about 80 ohm, for example, compared to the meandered microstip the reduction ratios of dB/λg for CCS

TLs of S equal to W and S unequal to W are 30.89% and 44.74%, respectively.

For characteristic-impedance below 57.23 ohm, the meandered microstrip has the lowest loss property, but the corresponding SWF and Re(Z_c) are much sensitive to the meanderings, as discussed previously. Base on an equal W, however, meandered CCS TLs of S unequal to W demonstrates not only higher Re(Z_c), better SWF and lower dB/λg than those of meandered CCS TLs of S equal to W. The validity of these facts could be justified through comparing the performance among the first structure of S = 15 µm and the S equal to W cases when W varied from 20 to 30 µm. Following observations could be summarized according to Fig. 2.4 and 2.5: the averaged increase ratios on Z_c and SWF are 16.03% and 7.13%, and reduction ratio on dB/λg is 4.29%, respectively. The mechanism by which the dB/λg decrease by reducing S mainly involves an increase in the effective series inductive component, since the attenuation constant could be approximately expressed asR C L when the effective shunt conductive component is negligible. Besides, the first structure also has a superior SWF property. It is evident that meandered CCS TL of S unequal to W has more advantages than the ones of S equal to W in terms of guiding properties.

(a)

(b)

Fig. 2.4 Transmission line characteristics of meander CCS TL and meandered microstip derived from the software-based analysis method at 6.0 GHz. (a) Real part of characteristic impedance (Re(Z_c)), and (b) slow wave factor (SWF).

Fig. 2.5 Loss per guiding wavelength (dB/λ_g) of meandered CCS TL and meandered microstrip derived from the software-based analysis method at 6 GHz.

2.3 Discussion

In this chapter the guiding characteristics of CMOS 0.18 µm monolithic meandered CCS TL with non equal and equal connecting arm (S) and central patch (W) have been analyzed. The meandered CCS TL compared to the meandered microstrip has at least three advantageous points: (1) less sensitive to lowering characteristic impedance and slow wave factor by meanderings, (2) better loss characteristics for high-impedance lines, (3) higher characteristic impedance value for wide metal strip. Of more interest is the fact that the meandered CCS TL with non equal S and W even shows a better transmission line performance than the one with equal S and W on the same advantageous points.

CHAPTER 3

Approaches of Microwave Active Filters

This chapter investigates an innovating approach of fully monolithic CMOS active filters incorporating meandered complementary-conducting-strips transmission line aimed for filtering functions commonly required by the radio receiver front end.

Conventionally these functions are performed by off-chip SAW filters. Recently, on-chip BAW filters had also been proposed to overcome this impediment with an additional payment of process modifications. However, by introducing integrated active elements compensating or emulating the on-chip passive components, active filters exhibiting good frequency selectivity, low passband attenuation, and small in size show considerable interest. Section 3.1 gives a general overview of active inductor and active resonator techniques traditionally employed in active filter deisgns.

Then a preliminary experiment of a 5 GHz active bandpass filter based on active CCS transmission lines is introduced in Section 3.2.

3.1 Overview on Active Inductor and Active Resonator Techniques

Analog LC-Ladder filter, in 1966, had been discovered to be highly insensitive to component variation [33]. In integrated circuit (IC) technology, planar or stacked spiral inductors are usually applied for implementing large inductances. However, several fundamental problems such as excess series resistance, high-frequency resonances, and mutual coupling limit its usefulness. Therefore, active inductors have been developed to replace the passive ones.

Since the gyrator network has an impedance inversion property. An active gyrator with a capacitive load, therefore, could simulate an active inductor and be

used in realizing inductorless active filters [34]. Monolithic active gyrators could also be constructed with op-amp or transconductor circuits [35]. Overlap capacitance between the input and output of the monolithic CMOS transconductor, however, normally introduces phase lag in the transconductance function and limits the maximum usable frequency of this active inductor [36]. Canceling of this overlap capacitance by a balanced gyrator topology had been successfully applied in the VHF (up to several hundreds of MHz) active filter design [37]. For the use of active gyrator in monolithic microwave integrated circuit, several active notch filter designs had been reported in GaAs technoloy [38-40].

Using a common-source cascode-FET with resistive feedback topology to implement a relatively lossy broadband monolithic GaAs active inductor had been report in [41]. A significant reduction in the series resistance of this active inductor with the use of common-gate cascode-FET feedback arrangement was lately published in [42]. To realize a broadband flat inductive response, however, either configuration requires the two Cgs capacitances of each FETs must be identical to cancel each other out. The required transconductance (g_m) of each FET must larger than (ωCgs)^1.5, and the maximum operating frequency of this active inductor is ideally about one-half of the small-signal unity frequency (ft= gm/2πCgs) of the FET. The related applications in monolithic GsAs tunable narrow-band active filters were reported in [43-46].

As a well-known approach, the negative resistance (-R) circuit could be used to compensate the loss in passive transmission line, lump inductor, or lump capacitor to realize an active filters. For an active LC resonator, the –R circuit is an integral part of the lumped LC resonator to cancel out the dissipative loss. This technique had been used in monolithic CMOS, SiGe, and GaAs technologies [7-8, 19-24, 47-54]. For

spiral inductor usually has a lower resonance frequency and could not provide a broadband flat inductive response. Thus a Q factor tuning circuit has to be adopted within the filtering system [18, 23-24]. In contrary, transmission line is a distributed element and demonstrates a broader and much stable characteristic against frequency.

Therefore monolithic CCS TL is applicable for active filter designs for its advantageous guiding property and less sensitive to meandering as discussed in Chapter 2. The remaining challenge is how to compensate its propagating loss in the CMOS monolithic approach. To date, several design techniques had been developed to integrate the negative resistance circuit with distributed transmission lines in hybrid and GaAs technologies [55-58]. For example, C. Y. Chang et al. had used coupled line resonators and coupled negative resistance to realize a hybrid tunable 200-MHz wide active bandpass filter at 10.5 GHz [55]. M. Ito at al. had implemented a monolithic 2.6-GHz wide active bandpass filter at 65 GHz by applying two CPW transmission line quarter-wave resonators terminated by negative resistances in GaAs technology [56]. To get a clear insight in the restrictions and feasibilities of the negative resistance circuits used both in active LC and transmission-line resonator, some negative resistance circuits commonly appeared in the literature would be surveyed in the following subsection.

Apart from the techniques mentioned above, some bandpass or notch amplifiers have been built by cascading a passive bandpass or notch segment with the low noise amplifier (LNA) [10, 59-61]. However, these filter have restricted frequency selectivity and not applicable for the general filter synthesis methods. Nevertheless, this approach is advantageous for its compactness and design simplicity. In contract, the transverse or recursive typed active bandpass filter usually requires 3-dB coupler, power combiner, and LNAs to perform analog signal processing [62-67]. The general filter synthesis methods could neither be applied to this filter.

3.1.1 Negative Resistance Circuits

In the circuit topologies requiring single active device, the circuit can be in common gate configuration with an inductive feedback, in common-source configuration with a capacitive feedback, or in common-source and common-drain inductive and capacitive series feedback, as shown in Fig. 3.1(a), (b) and (c). In the ideal case, the negative resistance circuit of Fig. 3.1(a) has an input impedance at the source terminal given by

gs

This circuitry is fist introduced in [68] and also called the active inductor. By considering the gate resistance and other parasitics of a real transistor, this circuit could not achieve negative resistance without introducing an additional inductance in the drain terminal. Another drawback is the requirement of large Lfresulted from the high frequency phase shift introduced by the transconductance of a real device [53, 69]. For the ideal case of Fig. 3.1(b), the input impedance at the gate terminal is expressed as

As can be observed, the higher frequency the more transconductance or power consumption is required to generative an equivalent negative resistance. Besides, the C_gs capacitance from the real device has a negative impact on the resulting negative resistance. Which could set inherent limitations for its usefulness in CMOS technology. The negative resistance circuit shown in Part (c) of Fig. 3.1 is also called the active capacitor. This circuit has demonstrated a superior noise performance in hybrid topology [70]. However, the bandwidth of negative resistance usually involves

a tradeoff between the value of Ld and parasitic resistance within the series feedback network at the drain terminal [71]. Which may enhance the design complexities and increase iteration times.

Part (d) of Fig.3.1 illustrates the coupled-inductor negative resistance circuit. The ideal effective input impedance seen at the primary inductor could be expressed as

)

where Ae^jθ is the current ratio between the primary and secondary inductor, and M is the mutual inductance between the two inductors. When θ equals to 90⁰ or 270⁰, a negative resistance is generated and could be used to cancel the series resistance R1 of the primary inductor L1. This technique has been applied in CMOS technology for several active bandpass filters design [7, 19]. Notably, the capacitive coupling between the two inductors could cause phase difference in Ae^jθ and additional capacitive loss. Besides, CMOS on-chip transformer also suffers from the substrate loss [7]. In other words, this negative resistance circuit also has to compromise with the parasitic effects of on-chip inductive lump components.

In contrast, the small-signal resistance at the drain terminal of a Λ-type MOSFET, as illustrated in Fig. 3.2 (a), is inherently negative requiring no inductive component.

Since under proper biasing conditions, the slop of its source-drain current (IDS) is inversely proportional to the increase of the source-drain voltage (VDS). The detailed physics of this voltage-controlled single-ended negative resistance device had been reported in [72]. For high frequency applications the bandwidth and tuning capability of a Λ-type MOSFET realized in a typical 0.18 µm CMOS technology is further investigated through circuit simulation. The transistor size (width/length) of N1, N2

and N2 NMOS are 0.5/0.18, 0.35/0.18, and 1.88/0.18 µm, and the VD potential of the

and N2 NMOS are 0.5/0.18, 0.35/0.18, and 1.88/0.18 µm, and the VD potential of the

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