40 Chapter 10 Virtual Memory
10.3 A certain computer provides its users with a virtual-memory space of 232bytes. The com-puter has 218 bytes of physical memory. The virtual memory is implemented by paging, and the page size is 4096 bytes. A user process generates the virtual address 11123456.
Explain how the system establishes the corresponding physical location. Distinguish be-tween software and hardware operations.
Answer: The virtual address in binary form is
0001 0001 0001 0010 0011 0100 0101 0110
Since the page size is 212, the page table size is 220. Therefore the low-order 12 bits “0100 0101 0110” are used as the displacement into the page, while the remaining 20 bits “0001 0001 0001 0010 0011” are used as the displacement in the page table.
10.4 Which of the following programming techniques and structures are “good” for a demand-paged environment ? Which are “not good”? Explain your answers.
a. Stack
b. Hashed symbol table c. Sequential search d. Binary search
e. Pure code f. Vector operations g. Indirection Answer:
a. Stack—good.
b. Hashed symbol table—not good.
c. Sequential search—good.
d. Binary search—not good.
e. Pure code—good.
f. Vector operations—good.
g. Indirection—not good.
10.5 Assume we have a demand-paged memory. The page table is held in registers. It takes 8 milliseconds to service a page fault if an empty page is available or the replaced page is not modified, and 20 milliseconds if the replaced page is modified. Memory access time is 100 nanoseconds.
Assume that the page to be replaced is modified 70 percent of the time. What is the maxi-mum acceptable page-fault rate for an effective access time of no more than 200 nanosec-onds?
Answer:
0.2sec = (1;P)0.1sec + (0.3P)8 millisec + (0.7P)20 millisec 0.1 = ;0.1P + 2400 P + 14000 P
0.1 ' 16,400 P P ' 0.000006
Answers to Exercises 41
10.6 Consider the following page-replacement algorithms. Rank these algorithms on a five-point scale from “bad” to “perfect” according to their page-fault rate. Separate those al-gorithms that suffer from Belady’s anomaly from those that do not.
a. LRUreplacement b. FIFOreplacement
c. Optimal replacement d. Second-chance replacement Answer:
Rank Algorithm Suffer from Belady’s anomaly
1 Optimal no
2 LRU no
3 Second-chance yes
4 FIFO yes
10.7 When virtual memory is implemented in a computing system, there are certain costs asso-ciated with the technique and certain benefits. List the costs and the benefits. Is it possible for the costs to exceed the benefits? If it is, what measures can be taken to ensure that this does not happen?
Answer: The costs are additional hardware and slower access time. The benefits are good utilization of memory and larger logical address space than physical address space.
10.8 An operating system supports a paged virtual memory, using a central processor with a cycle time of 1 microsecond. It costs an additional 1 microsecond to access a page other than the current one. Pages have 1000 words, and the paging device is a drum that rotates at 3000 revolutions per minute and transfers 1 million words per second. The following statistical measurements were obtained from the system:
1 percent of all instructions executed accessed a page other than the current page.
Of the instructions that accessed another page, 80 percent accessed a page already in memory.
When a new page was required, the replaced page was modified 50 percent of the time.
Calculate the effective instruction time on this system, assuming that the system is run-ning one process only, and that the processor is idle during drum transfers.
Answer:
effective access time = 0.99(1sec + 0.008(2sec) + 0.002(10,000sec + 1,000sec) + 0.001(10,000sec + 1,000sec)
= (0.99 + 0.016 + 22.0 + 11.0)sec
= 34.0sec
10.9 Consider a demand-paging system with the following time-measured utilizations:
CPUutilization 20%
Paging disk 97.7%
OtherI/Odevices 5%
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Which (if any) of the following will (probably) improve CPUutilization? Explain your answer.
a. Install a fasterCPU.
b. Install a bigger paging disk.
c. Increase the degree of multiprogramming.
d. Decrease the degree of multiprogramming.
e. Install more main memory.
f. Install a faster hard disk or multiple controllers with multiple hard disks.
g. Add prepaging to the page fetch algorithms.
h. Increase the page size.
Answer: The system obviously is spending most of its time paging, indicating over-allocation of memory. If the level of multiprogramming is reduced resident processes would page fault less frequently and theCPUutilization would improve. Another way to improve performance would be to get more physical memory or a faster paging drum.
a. Get a fasterCPU—No.
b. Get a bigger paging drum—No.
c. Increase the degree of multiprogramming—No.
d. Decrease the degree of multiprogramming—Yes.
e. Install more main memory—Likely to improveCPUutilization as more pages can remain resident and not require paging to or from the disks.
f. Install a faster hard disk, or multiple controllers with multiple hard disks—Also an improvement, for as the disk bottleneck is removed by faster response and more throughput to the disks, theCPUwill get more data more quickly.
g. Add prepaging to the page fetch algorithms—Again, theCPU will get more data faster, so it will be more in use. This is only the case if the paging action is amenable to prefetching (i.e., some of the access is sequential).
h. Increase the page size—Increasing the page size will result in fewer page faults if data is being accessed sequentially. If data access is more or less random, more paging action could ensue because fewer pages can be kept in memory and more data is transferred per page fault. So this change is as likely to decrease utilization as it is to increase it.
10.10 Consider the two-dimensional arrayA: int A[][] = new int[100][100];
whereA[0][0]is at location 200, in a paged system with pages of size 200. A small pro-cess is in page 0 (locations 0 to 199) for manipulating the matrix; thus, every instruction fetch will be from page 0.
For three page frames, how many page faults are generated by the following array-initialization loops, usingLRUreplacement, and assuming page frame 1 has the process in it, and the other two are initially empty:
Answers to Exercises 43
a. for (int j = 0; j < 100; j++) for (int i = 0; i < 100; i++) A[i][j] = 0;
b. for (int i = 0; i < 100; i++) for (int j = 0; j < 100; j++) A[i][j] = 0;
Answer: o answer.
10.11 Consider the following page reference string:
1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6.
How many page faults would occur for the following replacement algorithms, assuming one, two, three, four, five, six, or seven frames? Remember all frames are initially empty, so your first unique pages will all cost one fault each.
LRUreplacement
FIFOreplacement
Optimal replacement Answer:
Number of frames LRU FIFO Optimal
1 20 20 20
2 18 18 15
3 15 16 11
4 10 14 8
5 8 10 7
6 7 10 7
7 7 7 7
10.12 Suppose that you want to use a paging algorithm that requires a reference bit (such as second-chance replacement or working-set model), but the hardware does not provide one. Sketch how you could simulate a reference bit even if one were not provided by the hardware, or explain why it is not possible to do so. If it is possible, calculate what the cost would be.
Answer: You can use the valid/invalid bit supported in hardware to simulate the refer-ence bit. Initially set the bit to invalid. On first referrefer-ence a trap to the operating system is generated. The operating system will set a software bit to 1 and reset the valid/invalid bit to valid.
10.13 You have devised a new page-replacement algorithm that you think may be optimal.
In some contorted test cases, Belady’s anomaly occurs. Is the new algorithm optimal?
Explain your answer.
Answer: No answer.
10.14 Suppose that your replacement policy (in a paged system) is to examine each page regu-larly and to discarding that page if it has not been used since the last examination. What would you gain and what would you lose by using this policy rather thanLRUor second-chance replacement?
Answer: No answer
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10.15 Segmentation is similar to paging but uses variable-sized “pages.” Define two segment-replacement algorithms based onFIFOandLRUpage-replacement schemes. Remember that since segments are not the same size, the segment that is chosen to be replaced may not be big enough to leave enough consecutive locations for the needed segment. Con-sider strategies for systems where segments cannot be relocated, and those for systems where they can.
Answer:
FIFO. Find the first segment large enough to accommodate the incoming segment. If relocation is not possible and no one segment is large enough, select a combination of segments whose memories are contiguous, which are “closest to the first of the list”
and which can accommodate the new segment. If relocation is possible, rearrange the memory so that the first N segments large enough for the incoming segment are contiguous in memory. Add any leftover space to the free-space list in both cases.
LRU. Select the segment that has not been used for the longest period of time and that is large enough, adding any leftover space to the free space list. If no one segment is large enough, select a combination of the “oldest” segments that are contiguous in memory (if relocation is not available) and that are large enough. If relocation is available, rearrange the oldest N segments to be contiguous in memory and replace those with the new segment.
10.16 A page-replacement algorithm should minimize the number of page faults. We can do this minimization by distributing heavily used pages evenly over all of memory, rather than having them compete for a small number of page frames. We can associate with each page frame a counter of the number of pages that are associated with that frame. Then, to replace a page, we search for the page frame with the smallest counter.
a. Define a page-replacement algorithm using this basic idea. Specifically address the problems of (1) what the initial value of the counters is, (2) when counters are in-creased, (3) when counters are dein-creased, and (4) how the page to be replaced is selected.
b. How many page faults occur for your algorithm for the following reference string, for four page frames?
1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2.
c. What is the minimum number of page faults for an optimal page-replacement strat-egy for the reference string in part b with four page frames?
Answer:
a. Define a page-replacement algorithm addressing the problems of:
i. Initial value of the counters—0.
ii. Counters are increased—whenever a new page is associated with that frame.
iii. Counters are decreased—whenever one of the pages associated with that frame is no longer required.
iv. How the page to be replaced is selected—find a frame with the smallest counter.
UseFIFOfor breaking ties.
b. 14 page faults c. 11 page faults
Answers to Exercises 45
10.17 Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 milliseconds. Addresses are translated through a page table in main memory, with an access time of 1 microsecond per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added an associative memory that reduces access time to one memory reference, if the page-table entry is in the associative memory.
Assume that 80 percent of the accesses are in the associative memory and that, of the remaining, 10 percent (or 2 percent of the total) cause page faults. What is the effective memory access time?
Answer:
effective access time = (0.8)(1sec)
+ (0.1)(2sec) + (0.1)(5002sec)
= 501.2sec
= 0.5 millisec
10.18 Consider a demand-paged computer system where the degree of multiprogramming is currently fixed at four. The system was recently measured to determine utilization ofCPU and the paging disk. The results are one of the following alternatives. For each case, what is happening? Can the degree of multiprogramming be increased to increase the CPU utilization? Is the paging helping?
a. CPUutilization 13 percent; disk utilization 97 percent b. CPUutilization 87 percent; disk utilization 3 percent
c. CPUutilization 13 percent; disk utilization 3 percent Answer:
a. Thrashing is occurring.
b. CPUutilization is sufficiently high to leave things alone, an increase degree of mul-tiprogramming.
c. Increase the degree of multiprogramming.
10.19 We have an operating system for a machine that uses base and limit registers, but we have modified the machine to provide a page table. Can the page tables be set up to simulate base and limit registers? How can they be, or why can they not be?
Answer: The page table can be set up to simulate base and limit registers provided that the memory is allocated in fixed-size segments. In this way, the base of a segment can be entered into the page table and the valid/invalid bit used to indicate that portion of the segment as resident in the memory. There will be some problem with internal fragmentation.
10.20 What is the cause of thrashing? How does the system detect thrashing? Once it detects thrashing, what can the system do to eliminate this problem?
Answer: Thrashing is caused by underallocation of the minimum number of pages re-quired by a process, forcing it to continuously page fault. The system can detect thrashing by evaluating the level ofCPUutilization as compared to the level of multiprogramming.
It can be eliminated by reducing the level of multiprogramming.
10.21 Write a program that implements the FIFO and LRU page-replacement algorithms pre-sented in this chapter. First, generate a random page-reference string where page num-bers range from 0..9. Apply the random page-reference string to each algorithm and
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record the number of page faults incurred by each algorithm. Implement the replacement algorithms such that the number of page frames can vary from 1..7. Assume that demand paging is used.
Answer: Please refer to the supporting Web site for source code solution.