Why LTPS TFTs…

In recent years, with the flat-panel display technology development, flat-panel displays have replaced the traditional cathode ray tube (CRT) application for many aspects. Liquid crystal display (LCD) is one of the popular displays. Especially, thin film transistor liquid crystal display (TFT-LCD) is the most common display at present. According to the manufacture technique of thin film transistor (TFT), the TFT-LCD is categorized into amorphous-silicon (a-Si) TFT and low-temperature poly-silicon (LTPS) TFT and high- temperature poly-silicon (HTPS) TFT.

Among these TFTs, LTPS has been widely investigated as a material for mobile applications such as digital cameras and note book computers. In polysilicon film, the carrier mobility larger than 10 cm²/Vs can be easily achieved, that is about 100 times larger than that of the conventional a-Si TFTs and fast enough to make peripheral driving circuit including n- and p-channel devices. This enables the monotheistic fabrication of peripheral circuit and TFT array on the same glass substrate, bringing the era of system-on-glass (SOG) technology [1]. They also have been applied into some memory devices such as dynamic random access memories (DRAMs), static random access memories (SRAMs), electrical programming read

only memories (EPROMs), electrical erasable programming read only memories (EEPROMs), linear image sensors, thermal printer heads, photo-detector amplifier, scanner, neutral networks. In the future, the application fields of LTPS TFTs will not be limited to displays but will be expanded to other electronic devices, such as LSIs, printers andsensors.

1-2. LTPS TFTs Variation

The LTPS TFTs suffer from bad uniformity. The poly-Si material is a heterogeneous

material made of very small crystals of silicon atoms in contact with each other constituting a solid phase material. These small crystals are called crystallites or grains. The presence of these crystallites that have any type of orientation means a break in the crystal from one crystallite to the other. Because the material remains solid, the atoms at the border of a crystallite are also linked to the neighbor crystallite ones. However, these atom bonds are disoriented in comparison with a perfect lattice of silicon. This border is called a grain boundary. Owing to the existence of grain boundary, the variation of poly-Si TFT is intrinsic.

Currently, the formation of the crystallites in polysilicon is achieved by solid phase crystallization (SPC), excimer laser crystallization (ELA), or metal-induced lateral crystallization (MILC). None of the methods can control the growth of grain to be identical.

Due to the variety of the grain boundary, each TFT has different trap states distribution in the poly-Si film.

Thus, the TFT characteristics can be distinguished even fabricated with the same process and LTPS TFTs always have different characteristic. Figure 1-1 shows the variation of the transfer characteristics of Id-Vg curve and Figure 1-2 shows the variation of the transfer characteristics of Id-Vd curve. Figure 1-3 shows the different TFTs with various amounts of grain boundaries existing in the channel. The disadvantage of the variation for LTPS TFTs must be investigated.

1-3. Simulation Method Review

There are two major methods of simulation to analyze circuit performance, which are the worst-case and Monte Carlo analysis as described below.

1-3-1. Worst-Case Method [2]

Worst-case analysis is the most commonly used technique in industry for considering manufacturing process tolerances in the design of integrated circuits. These approaches are relatively inexpensive compared to the yield maximization approaches in terms of computational cost and designer effort, and they also provide high parametric yields. At any design point, uncontrollable fluctuations in the circuit parameters cause circuit performance to device from their nominal design values. The goal of worst case analysis is to determine the worst values that the performance may have under these statistical fluctuation. In addition to finding the worst-case values of the circuit performance, this analysis also finds the corresponding worst-case values of noise parameters. A noise parameter is treated as a random variable. Any random variable is characterized by probability density function (and by a mean and a standard deviation which depends on the density function), as shown in Fig.

1-4. The worst-case noise parameter vector is used in circuit simulation to verify whether

circuit performances are acceptable under these conditions. Similar to worst-case analysis, one can also perform best-case analysis. In fact, industrial designs are often simulated under best, worst, and nominal noise parameter conditions, which provide designers with quick estimates of range of variation of circuit performances.

1-3-2. Monte Carlo Method

Yield, expressed as a multi-dimensional integral, can be evaluated numerically using either the quadrature-based, or Monte Carlo based methods. The quadrature-based methods have computational costs that explode exponentially with the dimensionality of the statistical space. Monte Carlo methods, on the other hand, are less sensitive to the dimensionality. The Monte Carlo method is a computer simulation of real distributions of random noise parameters, and it is the simplest, most reliable and accurate of all methods used in practice.

However, for high accuracy it requires a large number of sample points. Typically, hundreds of trials are required to obtain reasonable accurate yield estimation. For nonlinear and/or time domain circuit analysis, this is computational expensive. Hence, a fundamental problem to solve is to increase the efficiency of the Monte Carlo method and its accuracy, measured by the variance of the yield estimation.

1-4. Why Ring Oscillator

The previous sections have noted the importance of the knowledge of LTPS TFT device variations. By obtaining a better understanding of these variation sources and how they are correlated with other physical parameters, variation models can be developed which would be beneficial not only for optimal circuit performance, but for the assurance of the circuit’s functionality. Therefore, experiments and tests first have to be conducted on the process to provide useful data that would lead to the better knowledge of these variation sources.

The fundamental goal of this thesis is to develop a test methodology that can extract and

measure variation within a LTPS TFT process. A ring oscillator test key is therefore implemented containing numerous test structures that can correlate certain device variations.

The ring oscillator is chosen out here owing to its output frequency not only can be made sensitive to device parameter but also a direct circuit-level timing parameter that can be easily measured. Besides, it deserves to be mentioned that standard CMOS digital logic circuit performance can be generalized relatively effectively by ring oscillator (RO) frequency. By measuring the frequencies at which these test structures oscillate, valuable information can be obtained that can effectively characterize device variation in a given process.

The use of ring oscillators to detect variation is not a new concept. The unique contribution of this thesis is to compare the difference between real circuit and simulation with measurement and statistical analysis. Then we can verify efficient methods to characterize and model circuit variation to obtain high-yield poly-Si TFTs digital circuits.

1-5. Organization of Thesis

Chapter 1. Introduction and Motivation for Research 1-1. Why LTPS TFTs

1-2. LTPS TFTs Device Variation