Wideband Input Matching

Some popular UWB input matching topology for LNA design are shown in Fig.

3.1 [9]and Fig. 3.4 [10]. In Fig. 3.1 the wideband input matching utilizes the transformer as the series feedback and the capacitive as the shunt feedback. And the feedback produces the real part of the input impedance for matching. The topology contributes two resonance frequencies at different frequency, respec-tively. In the high frequency, we can adjust the resonate frequency by properly choosing the drain inductor (Ld) and the load capacitance (CL). It means the source of the two input transistors is connected to the ac ground, so the small signal circuit is shown in Fig. 3.2. We can derive the input impedance as

Zin,H = jωLg+ 1

jω(Cgs+ Cgd) + M · g^m Cgs+ Cgd

,

M1

Figure 3.1: The dual feedback wideband matching.

+

Figure 3.2: The small signal circuit of dual feedback circuit at high frequency.

where M is mutual inductance between the windings and the real part is con-tributed by the transformer and the resonance frequency expressed as

f_H =

The real part is designed to be 50 ohm and the imaginary part is designed to be 0 ohm. In low frequency the small signal circuit is shown in Fig. 3.3, the input impedance can be expressed as

Zin,L = jωLg+ 1

jω(Cgs+ Cgd) + _R ¹

eq+1/jωCeq

, (3.1)

where Req = (Cgd+ CL)/(gmCgd) and jωCeq = jωCgdgmrds, and the real part of input impedance is the capacitive feedback. From Eg.(3.1), in low frequency the

+

Figure 3.3: The small signal circuit of dual feedback circuit at low frequency.

influence of the load impedance capacitive and the capacitive feedback dominate the input impedance. Due to the high voltage gain, the Miller capacitance Ceq

that dominates the imaginary part will appear. Hence the input circuit uses Lg to cancel the imaginary part. In addition the real part is designed to be 50 ohm and the imaginary part is designed to be 0 ohm in low frequency. Its resonance frequency is fL = 2πpLgCeq

−1

. The topology gives the broadband input matching and good noise matching [20]. However we need to have the accurate transformer parameters. But the standard devices of TSMC 0.18µm does not include the transformer. Hence it is difficult to obtain M.

Another commonly used topology in UWB LNA design is the Chebyshev filter as shown in Fig. 3.4 [10]. As discussed in Sec. 2.4, Zin is

Figure 3.4: The Chebyshev filter for wideband matching.

s(Lg+ Ls) + 1

s(Cgs+ Cp) + ωTLs, (3.2) where ωT = gm/(Cgs+ Cp). We can redraw Fig. 3.4 from Eq.(3.2) by replacing the transistor (M1) with the resistor and the parasitic capacitors. Then the new graph is shown in Fig. 3.5. In general the real part of the input impedance

T

L

w

g s

L ⁺L Cp⁺Cgs

v

R

L

C

L

^C

V

Zin

Figure 3.5: The Chebyshev filter for passive device.

is set to be 50 ohm, and other inductances and capacitors contribute different resonance frequency. Although the topology also achieves the input matching and noise matching [20], it needs four inductances. The inductance cost a lot of area and cost. In CMOS IC design, the cost is an important issue in business.

Hence in this thesis we do not choose this solution for wideband input matching.

In this thesis we use the topology that contains a conventional source-degeneration input matching, an inductor shunted in input RF path and a capacitor seriesed in input RF path as shown in Fig. 3.6[9], because it does not need exact transformer parameters and the number of inductance is one fewer than the Chebyshev filter.

As discussed in Sec. 2.4 from Eq.(2.36) the input impedance can be expressed as s(Lg+ Ls) + 1

s(C_gs+ C_c) + ωTLs,

where ω_T = g_m/(C_gs+ C_c). The impedance consists of one resistor, one induc-tance, and one capacitor. Hence we can redraw the circuit of input matching.

The input matching circuit is shown as Fig. 3.7. In high frequency the

induc-Z

M

V

^L

L

v

R

L

C

C

Figure 3.6: The input matching for UWB LNA.

T

L

w

g s

L

L C

C

v

R

C

L

V

Z

Figure 3.7: The input matching of passive device for UWB LNA.

tor shunted in input RF path, i.e. Ld, is approximately as open, because the impedance of inductance is proportional to frequency. Hence the circuit acts like an inductive source degeneration circuit. Note that the equivalent capacitance is the series connection of (Cgs + Cc) and Cb. Hence the input impedance is expressed as

s(Lg+ Ls) + 1

s((CgsCb+ CcCb)/(Cgs+ Cc + Cb)) + ωTLs,

where ωTLs is set to be 50 ohm. The resonance frequency for high frequency is

ω =

s 1

(Lg+ Ls)((CgsCb+ CcCb)/(Cgs+ Cc + Cb)). (3.3) For low frequency the input impedance can be expressed as

1

Eq.(3.5) can be rearranged as 1 Then we design the impedance to be 50 ohm. Thus design Eq.(3.6) is 50, .i.e.

letting

s²LC + s²LdC + sCR + 1 + s²LdCb(s²LC + sCR + 1)

sCb(s²LC + s²LdC + sCR + 1) = 50. (3.7) Replacing s by jω, Eq.(3.7) can be rearranged by

−ω²LC − ω²L_dC + jωCR + 1 − ω²L_dC_b(−ω²LC + jωCR + 1)

Hence we can express the equation as

ω⁴(LCLdCb) − jω³LdCbCR + ω²(−LC − L^dC − L^dCb) + jωCR + 1

= −jω³50(LCCb+ LdCCb) − ω²50CRCb+ jω50Cb. (3.8) From Eq.(3.8) the real part of Eq.(3.8) can be rearranged as

ω⁴(LCLdCb) + ω²(−LC − L^dC − L^dCb) + 1 + ω²50CRCb = 0. (3.9) Define X to be ω². Eq.(3.9) is given by

X²(LCLdCb) − X(LC + L^dC + LdCb− 50CRC^b) + 1 = 0.

Hence X is

LC + LdC + LdCb− 50CRC^b±p(LC + LdC + LdCb− 50CRC^b)² − 4LCL^dCb

2LCL_dC_b .

Because we want to get 50 ohm at low frequency, we choose smaller X as LC + LdC + LdCb− 50CRC^b−p(LC + LdC + LdCb− 50CRC^b)² − 4LCL^dCb

2LCL_dC_b .

Hence the resonance frequency for low frequency is given by s

LC + LdC + LdCb− 50CRC^b−p(LC + LdC + LdCb− 50CRC^b)²− 4LCL^dCb

2LCLdCb

. (3.10) In a word, according to Eq.(3.3) we first design the input impedance in high frequency by adjusting L_g, L_s, C_C, C_b and M₁ in the inductive source degen-eration circuit. Then according to Eq.(3.10) we design the input impedance in low frequency by adjusting Ld. Finally the two band results in a wideband input matching. The procedure to determine the parameters is follows:

1. At high frequency we first design the size M1 to get ωTLs=50. Then design Lg, CC, Cb to let the imaginary part of input impedance to be zero from Eq.(3.3).

2. After designing high frequency, according to Eq.(3.10) we design Ld to get the input matching at low frequency.

When we use the ideal devices to implement the input matching network the method is exact, because it uses basic circuit rule. We can easy to get two frequencies that matching to be 50 ohm. For no ideal devices such as TSMC 0.18µm model, this is not absolutely exact, because there are many no ideal conditions such as parasitic capacitance and parasitic resistance. Hence we cannot easy to get the input matching, but we still can use the method to simulate circuit.

After some tuning, the input matching can also be achieved by the method.