可切換頻帶式低雜訊放大器之設計

國

立

交

通

大

學

電機與控制研究所

碩

士

論

文

可切換頻帶式低雜訊放大器之設計

Design of Band Switchable Low Noise Amplifiers

研 究 生：洪埜泰

指導教授：蔡尚澕 教授

黃聖傑 教授

可切換頻帶式低雜訊放大器之設計

Design of Band Switchable Low Noise Amplifiers

研 究 生：洪埜泰 Student：Yeh-Tai Hung

指導教授：蔡尚澕 Advisor：Shang-Ho Tsai

黃聖傑

Sheng-Chieh Huang

國 立 交 通 大 學

電 機 與 控 制 工 程 研 究 所

碩 士 論 文

Submitted to Institute of Electrical and Control Engineering College of Electrical Engineering

National Chiao Tung University in partial Fulfillment of the Requirements

for the Degree of Master

in

Electrical and Control Engineering

June 2009

Hsinchu, Taiwan, Republic of China

可

切

換

頻

帶

式

低

雜

訊

放

大

器

之

設

計

學生：洪埜泰

指導教授

蔡尚澕

黃聖傑

國立交通大學電機與控制研究所碩士班

摘

要

兩個低雜訊放大器 (LNA) 被設計應用於超寬頻 (UWB) 與全球互運的微波存取 (Wi-MAX)。 所提出的應用於 UWB 無線接收機之雙頻帶低雜訊放大器有兩個可切換的頻帶。 此低雜訊放大 器分別可以操作在 3.1-5GHz 和 6-10.6GHz。 此設計包含了一個輸入匹配電路，兩個共源級 放大器和使用來量測之輸出緩衝器。 並且分析輸入匹配電路設計步驟[9]，此對我們設計輸入 匹配電路很重要。 提出之低雜訊放大器擁有兩個使用 NMOS 當切換電容開關之負載以用來得到 更好的品質因數(Q)。 此低雜訊放大器當使用 1.8V 電源供應器並且消耗功率 22.46mW 時分別 提供 10.8dB 和 16.8dB 之增益與 6.2dB 和 6.5dB 之雜訊指標在 3.25-5.6GHz 和 6-10.4GHz。 基 於 UWB 可切換頻帶式低雜訊放大器之開關電路我們設計一個新的應用於四個頻帶之 Wi-MAX 低 雜訊放大器之開關電路。 此低雜訊放大器分別可以操作在 2.3GHz, 2.5GHz, 3.5GHz 和 5.8GHz。 此提出之低雜訊放大器是由一個寬頻的輸入匹配電路, 一個 NMOS 連接到地之開關電路, 一個 共源級放大器和使用來量測之輸出緩衝器構成。 模擬結果表現此增益分別為 10.1dB, 11.1dB, 13.5dB 和 15.3dB 在 2.3GHz, 2.5GHz, 3.5GHz 和 5.8GHz。 此雜訊指標分別為 4dB, 3.5dB, 2.8dB 和 3.4dB 在 2.3GHz, 2.5GHz, 3.5GHz 和 5.8GHz。 此功率消耗為 11.5mW 在一個 1.5V 之電源 供應器下。此低雜訊放大器也使用台積電 0.18 微米互補式金氧半導體科技。

Design of Band Switchable Low Noise Amplifiers

student：Yeh- Tai Hung

Advisors：Dr. Shang-Ho Tsai

Dr.

Sheng-Chieh Huang

Institute of Electrical and Control Engineering

National Chiao Tung University

ABSTRACT

Two band switchable low noise amplifiers (LNA) are designed for

ultrawideband (UWB) and Worldwide Interoperability for Microwave Access

(Wi-MAX) applications. The proposed dual-band LNA for UWB wireless receiver

has two switchable bands. This LNA can operate at both 3.1-5GHz and 6-10.6GHz

frequency bands. The design consists of a input matching circuit, two cascode

common-source amplifiers and an output buffer for measurement. Moreover, we give

a procedure to analyze the input matching circuit [9], which is important for input

matching design. The proposed LNA is designed with two loadings of switched

capacitors which use NMOS in order to make high quality factor (Q). The LNA gives

10.8dB and 16.8dB gain, 6.2dB and 6.5dB noise figure at 3.25-5.6GHz and

6-10.4GHz frequency band while consuming 22.46mW through a 1.8V supply using

the TSMC 0.18μm CMOS technology. Based on the switch circuit of band

switchable UWB LNA the new switch circuit is also designed for of band switchable

Wi-MAX LNA. The LNA operates at 2.3GHz, 2.5GHz, 3.5GHz and 5.8GHz. The

proposed LNA consists of a wideband input matching circuit, a NMOS connected to

ground switch circuit, a common-source amplifiers and an output buffer for

measurement. The simulation result shows that the gain is 10.1dB, 11.1dB, 13.5dB

and 15.3dB at 2.3GHz, 2.5GHz, 3.5GHz and 5.8GHz, respectively. NF is 4dB, 3.5dB,

2.8dB and 3.4dB at 2.3GHz, 2.5GHz, 3.5GHz and 5.8GHz, respectively. The power

consumption is 11.5mW with 1.5V power supply. The LNA also uses TSMC 0.18μm

CMOS technology.

誌

謝

首先我要感謝蔡尚澕老師，謝謝你當初全力支持我，讓我做我想做的研究，

並且在研究所生涯裡對我不斷的教導，讓我知道很多研究的道理，對於我的研究

也十分有耐心的指導，讓我在研究的路上更加順利，再來要感謝黃聖傑老師，謝

謝你願意讓我共同指導，我才能在蔡老師門下做研究，感謝口試委員，林源倍老

師讓我的論文可以更完整更有價值。

謝謝電信所學長黃哲揚學長，在我研究有困難有問題的時候可以幫我解惑，

讓我受益良多，還有清大電子陳孟萍同學，謝謝你跟我一起討論研究的問題，在

RF IC 領域裡面有個伙伴真好，再來要感謝實驗室學長，宇文，盈超，伯賢，有

學長們建立好的實驗室，我就更可以專心在研究上，感謝同學，尚儒，柏佑，普

宣，偉修，謝謝你們跟我一起走過這兩年，謝謝你們的幫助，謝謝學弟妹，星雅，

明釗，漢文，奕智，彥成，宛真，謝謝你們讓實驗室突然熱鬧了起來，謝謝新加

入的學長英哲謝謝你在我最後口試的時候鼓勵我，謝謝實驗室全體人員，讓我在

實驗室裡面過得很快樂，很自在，非常謝謝實驗室所有同仁的照顧。

還有謝謝我乾妹黃成鶊一直鼓勵我往研究邁進。 謝謝國家晶片中心幫助我實

現我的電路。最後謝謝我的家人，因為有你們才有我，謝謝父親一直努力賺錢養

育我，謝謝母親照顧我讓我可以讀到碩士，雖然最後因為研究導致我沒有辦法一

直花時間照顧你，但是我是很愛你的，謝謝你，謝謝姐姐為了讓我專心做研究一

肩把照顧家裡的事情扛下。 在我碩士生涯裡還有許多要感謝的人在此非常謝謝

你們，沒有你們就沒有現在的我。

Contents

Chinese Abstract. . . .i

English Abstract. . . .ii

Acknowledgment. . . .iii

Contents. . . .iv

List of Figures. . . .. . . .vi

List of Tables. . . … . . . .xi

1 Introduction 1

1.1 UWB . . . .. . . 1

1.2 Wi-MAX . . . 2

1.3 Transceiver . . . .. . . 3

1.4 Motivation and Contribution . . . 4

1.5 Thesis Organization . . . 6

2 Background of LNA Design 8

2.1 S-parameters . . . 8

2.1.1 Multiple-Port Networks . . . 12

2.1.2 Smith Chart . . . .. 14

2.2 Noise in MOSFET . . . .. . . 20

2.2.1 Flicker Noise . . . .. 21

2.2.2 Thermal Noise . . . .. . . . 21

2.2.3 Drain Noise . . . .. 22

2.2.4 Gate Noise . . . .. . . 23

2.2.5 Noise Figure . . . 24

2.2.6 Noise factor in cascaded circuits . . . .. . . 26

2.3 Linearity . . . .. . . 27

2.4 LNA Architectures . . . … 31

2.4.1 The Analysis of Inductive Source Degeneration LNA . . . .32

3 Band Switchable UWB LNA Design 37

3.1 Consideration for UWB Switchable LNA . . . 37

3.2 Wideband Input Matching . . . 38

3.3.1 LC-tank . . . . . . 45

3.3.2 Switch Load . . . 46

3.4 Output Buffer . . . 51

3.5 The UWB Switchable LNA . . . .53

3.5.1 Cascoded Amplifier with LC-Tank Load . . . 53

3.5.2 Cascade Amplifier with LC-Tank Load . . . 54

3.5.3 Proposed Dual-band Low Noise Amplifier . . . .55

3.6 Consideration of Layout . . . .56

3.7 Microphotograph of Chip . . . .58

3.8 Measurement Result of Band Switchable UWB LNA . . . 58

3.8.1 Discussion . . . .67

3.9 Improved Band Switchable UWB LNA . . . 68

3.10 Layout of Improved Band Switchable UWB LNA . . . 69

3.11 Microphotograph of Improved Band Switchable UWB LNA . . . 70

3.12 Measurement Result of Improved Band Switchable UWB LNA . 70

3.12.1 Discussion . . . .. . 73

4 Band Switchable Wi-MAX LNA Design 82

4.1 Consideration for Wi-MAX Switchable LNA . . . 82

4.2 Wideband Input Matching . . . 83

4.3 Switch Circuit Topology . . . .. . . . 84

4.4 Output Buffer . . . 86

4.5 Band Switchable Wi-MAX LNA . . . 88

4.6 Simulation Result . . . 88

4.6.1 Discussion . . . 94

5 Summy 98

5.1 Conclusions . . . 98

5.2 Future Work . . . 99

Reference 100

List of Figures

1.1 Bandwidth of UWB: (a) Band Groups of MB-OFDM. (b) Low

Band and High Band of DS-UWB. . . 2

1.2 The Transceiver of direct-conversion transceiver. . . 4

2.1 The two-ports network. . . 10

2.2 The two-ports network inserted in to a transmission line. . . 11

2.3 The two-ports network for S-parameters. . . 12

2.4 The N-ports network for S-parameters. . . 13

2.5 Mapping Smith chart from impedance plane: (a)constant-r. (b)constant-x. . . 17

2.6 Smith chart. . . 18

2.7 The characteristic of Smith chart. . . 18

2.8 admittance Smith chart. . . 19

2.9 The characteristic of admittance Smith chart. . . 19

2.10 The combined impedance-admittance Smith chart. . . 20

2.11 The series or parallel of the inductance or capacitor of Smith chart. 20 2.12 A thermal noise model: (a) voltage type, (b) current type. . . 22

2.13 Drain noise model. . . 22

2.14 The gate noise model: (a)voltage type. (b)current type. . . 23

2.15 cascade noise model. . . 27

2.16 N-stage noise model. . . 27

2.17 The spectrum for the input and output of nonlinear amplifier. . . 28

2.18 Definition of the 1-dB compression point. . . 29

2.20 Definition of the IIP3 point. . . 30

2.21 The LNA architecture: (a) common source amplifier with shunt in-put resistor. (b) common gate amplifier. (c)shunt-series amplifier. (d)inductive source degeneration. . . 33

2.22 The cascode LNA architecture. . . 34

2.23 The noise model of inductance source degeneration LNA. . . 34

3.1 The dual feedback wideband matching. . . 39

3.2 The small signal circuit of dual feedback circuit at high frequency. 39 3.3 The small signal circuit of dual feedback circuit at low frequency. 40 3.4 The Chebyshev filter for wideband matching. . . 40

3.5 The Chebyshev filter for passive device. . . 41

3.6 The input matching for UWB LNA. . . 42

3.7 The input matching of passive device for UWB LNA. . . 42

3.8 The classical LC-tank amplifier. . . 45

3.9 The load of (a) switched capacitor using PMOS [11] (b) switched inductor [12]. . . 47

3.10 The proposed switched capacitor amplifier: (a) The proposed cir-cuit. (b) Condition for Msw1 off. (c) Condition for Msw1 on. . . . 47

3.11 The three types of switch band circuit: (a) PMOS-based switch. (b) NMOS-based switch. (c) NMOS-based switch with large resistor. 49 3.12 The impedance of three types switch band circuit: (a) at low fre-quency, (b) at high frequency. . . 50

3.13 The output buffer for measurement. . . 51

3.14 The small signal circuit of output buffer. . . 52

3.15 The small signal circuit of output buffer for deriving gain. . . 53

3.16 Cascode amplifier. . . 54

3.17 Cascade amplifier. . . 55

3.18 The proposed dual-band low noise Amplifier. . . 56

3.19 The layout of band switchable UWB LNA. . . 57

3.21 The S11 parameter of band switchable UWB LNA at low frequency. 60

3.22 The S21 parameter of band switchable UWB LNA at low frequency. 60

3.23 The S22 parameter of band switchable UWB LNA at low frequency. 61

3.24 The NF parameter of band switchable UWB LNA at low frequency. 61

3.25 The P1dB parameter of band switchable UWB LNA at low

fre-quency for measurement. . . 62

3.26 The P1dB parameter of band switchable UWB LNA at low

fre-quency for simulation. . . 62

3.27 The IIP3 parameter of band switchable UWB LNA at low

fre-quency for measurement. . . 63

3.28 The IIP3 parameter of band switchable UWB LNA at low

fre-quency for simulation. . . 63 3.29 The S11 parameter of band switchable UWB LNA at high frequency. 64

3.30 The S21 parameter of band switchable UWB LNA at high frequency. 64

3.31 The S22 parameter of band switchable UWB LNA at high frequency. 65

3.32 The NF parameter of band switchable UWB LNA at high frequency. 65

3.33 The P1dB parameter of band switchable UWB LNA at high

fre-quency for measurement. . . 66

3.34 The P1dB parameter of band switchable UWB LNA at high

fre-quency for simulation. . . 66

3.35 The IIP3 parameter of band switchable UWB LNA at high

fre-quency for measurement. . . 67

3.36 The IIP3 parameter of band switchable UWB LNA at high

fre-quency for simulation. . . 68

3.37 The layout of improved band switchable UWB LNA. . . 72

3.38 The chip photo of improved band switchable UWB LNA. . . 73

3.39 The S11parameter of improved band switchable UWB LNA at low

frequency. . . 74 3.40 The S21parameter of improved band switchable UWB LNA at low

3.41 The S22parameter of improved band switchable UWB LNA at low

frequency. . . 75 3.42 The NF parameter of improved band switchable UWB LNA at

low frequency. . . 75

3.43 The P1dB parameter of improved band switchable UWB LNA at

low frequency for measurement. . . 76

3.44 The IIP3 parameter of improved band switchable UWB LNA at

low frequency for measurement. . . 76

3.45 The S11 parameter of improved band switchable UWB LNA at

high frequency. . . 77

3.46 The S21 parameter of improved band switchable UWB LNA at

high frequency. . . 77

3.47 The S22 parameter of improved band switchable UWB LNA at

high frequency. . . 78 3.48 The NF parameter of improved band switchable UWB LNA at

high frequency. . . 78

3.49 The P1dB parameter of improved band switchable UWB LNA at

high frequency for measurement. . . 79

3.50 The IIP3 parameter of improved band switchable UWB LNA at

high frequency for measurement. . . 79 4.1 The input frequency is 3.5GHz, and noise is in two condition: (a)

narrow band, (b) wideband. . . 83 4.2 The input frequency is 3.5GHz, and the interferences are in two

condition: (a) narrow band, (b) wideband. . . 84

4.3 The input matching for Wi-MAX LNA. . . 85

4.4 The switch circuit of Wi-MAX LNA. . . 85 4.5 The impedance of four types switch band circuit: (a) at low

fre-quency, (b) at high frequency. . . 87

4.6 The proposed Wi-MAX low noise Amplifier. . . 89

4.8 The S21 parameter of band switchable Wi-MAX LNA. . . 90

4.9 The S22 parameter of band switchable Wi-MAX LNA. . . 91

4.10 The NF parameter of band switchable Wi-MAX LNA. . . 91

4.11 The P1dB parameter of band switchable Wi-MAX LNA at 2.3GHz. 92

4.12 The P1dB parameter of band switchable Wi-MAX LNA at 2.5GHz. 92

4.13 The P1dB parameter of band switchable Wi-MAX LNA at 3.5GHz. 93

4.14 The P1dB parameter of band switchable Wi-MAX LNA at 5.8GHz. 93

4.15 The IIP3 parameter of band switchable Wi-MAX LNA at 2.3GHz. 94

4.16 The IIP3 parameter of band switchable Wi-MAX LNA at 2.5GHz. 94

4.17 The IIP3 parameter of band switchable Wi-MAX LNA at 3.5GHz. 95

List of Tables

2.1 The harmonic of different ω. . . 29

3.1 The measurement result of band switchable UWB LNA. . . 69

3.2 The simulation result of band switchable UWB LNA. . . 70

3.3 The performance comparison of band switchable UWB LNA. . . . 71

3.4 The measurement result of improved band switchable UWB LNA. 80

3.5 The performance comparison of improved band switchable UWB LNA. . . 81

4.1 The simulation result of band switchable Wi-MAX LNA. . . 96

Chapter 1

Introduction

In this chapter, we will introduce the background of UWB and Wi-MAX. More-over, we introduce the corresponding RF transceiver. Finally motivation, contri-bution and proposed design methodology.

1.1

UWB

UWB system has became one of the most popular technologies which can trans-mitting the data that has high data rate and low power over a wideband spectrum, since the UWB technology is defined for low power wireless communications in February, 2002 [1]. However, the agreement of IEEE UWB standard (IEEE 802.15.3a [2]) has not been completely defined by two main proposed solutions, multi-band-orthogonal frequency division multiplexing (MB-OFDM) and direct sequence UWB (DS-UWB), that are both permitted to transmit in the band be-tween 3.1GHz-10.6GHz for MB-OFDM and 3.1GHz-9.6GHz for DS-UWB. The bandwidth of MB-OFDM is shown in Fig. 1.1(a). The band of OFDM-UWB extends from 3176MHz to 10552MHz. The bandwidth of DS-UWB is with Low-Band and High-Low-Band which is shown in Fig. 1.1(b) is from 3100MHz to 4900MHz and 6000MHz to 9700MHz. For UWB, we should avoid using the U-NII band and the band for WLAN, because the band of U-NII and WLAN cover the group 2 of OFDM-UWB. On the other hand. In DS-UWB, the band of 4900MHz to 6000MHz is not using, too. The thesis focuses on how to switch the band to achieve the UWB application.

Group 4

Group 1 Group 2 Group 3 Group 5

3432 MHz 3960 MHz 4488 MHz 5016 MHz 5544 MHz 6072 MHz 6600 MHz 7128 MHz 7656 MHz 8184 MHz 8712 MHz 9240 MHz 9768 MHz 10296 MHz U-NII 802.11a 5725 ~ 5825 Hiperlan 5125 ~ 5325 (a) U-NII 802.11a 5725 ~ 5825 Hiperlan 5125 ~ 5325

Low Band High Band

3 4 5 6 7 8 9 10 11

GHz

(b)

Figure 1.1: Bandwidth of UWB: (a) Band Groups of MB-OFDM. (b) Low Band and High Band of DS-UWB.

1.2

Wi-MAX

The Wi-MAX system is a larger coverage area, high data rate and low-power consumption wireless communication. In 2009 the Wi-MAX equipment sales are expected to hit 3 billion US dollars [3]. There are two types for Wi-MAX standards, i.e. fixed and mobile broadband data services. The later is more popular in recent years. For the IEEE 802.16e standard, the bandwidth is from 2GHz to 11GHz. The frequency bands of Wi-MAX are different in different

countries. For example, American uses 2.3GHz, 2.5GHz, and 5.8GHz, and Taiwan uses 2.3GHz and 2.5GHz. The 3.5GHz and 5.8GHz are used in fixed Wi-MAX systems. So in order to achieve all the requirement for those applications, the band switchable topology is desired. The thesis also discusses how to design band switchable LNA to fit the application of the multi-band Wi-MAX.

1.3

Transceiver

In communication system, one of the most popular transceiver architecture is the direct-conversion transceiver, because it does not need the image-rejection band-pass filter, and it only has two mixers and one local oscillator (LO). The direct-conversion transceiver architecture is shown in Fig. 1.2. It is known that the direct-conversion transceiver is similar to homodyne or zero-IF receiver. It receives the signals from antennas, and amplifies the signals by the LNA. It de-modulates the signals by mixing them with the LO signals. After the demodula-tion, the frequency of the signals is down to be the baseband that can be used by analog-to-digital-converter (ADC). When the signals are converted to be digital, the digital-signal-process (DSP) can process the signals. The direct-conversion transceiver also transmits the signals from the DSP. The signals that from DSP is converted to be analog using digital-to- analog converter (DAC). The mixer also modulates the signals to high frequency band. The power amplifier (PA) amplifies and transmits the signal to antennas. Note that the signals created by LO is synthesized in the desired frequency carrier. They provide the quadrature phase signal for the quadrature mixer, because the two sideband of RF spectrum has the different information, the I and Q channels are needed. The low-pass filter is used to extracted desired signal. The filter also can be implemented with on-chip active circuits. The performance of receiver impacts the baseband signal, amplification, signal converting, and channel flitting, which are critical issues for transceiver design.

Duplexer LNA PA 90 Quadrature Mixer LPF LPF LPF LPF ADC ADC DAC DAC DSP PLL VGA

Figure 1.2: The Transceiver of direct-conversion transceiver.

1.4

Motivation and Contribution

In recent years, the market of wireless communication becomes large. For exam-ple, the cell phone and Bluetooth wireless headset. The requirements of wireless communication prefer low power, high speed and low cost, where the CMOS technology satisfies with these requirements. The CMOS technology has the advantages of low cost, integration, and increasing performance by scaling [4, 5]. In wireless communication, the transceiver is an important part which con-tains LNA, mixer, phase locked loops (PLL) and filter. LNA is the first stage of transceiver; its design determines the level noise and sensitivity of transceiver. In addition LNA should provide enough gain and very low noise contribution. Hence LNA is one of the most critical components in transceiver design.

As introduced in Sec. 1.1, UWB technology has become the solution of low cost, low power, high speed for wireless communication. In recent years, there

were some proposed UWB LNA topologies, e.q. [17][22][23]. In [17], the authors designed the 3.1GHz-10.6GHz wideband LNA for UWB receiver by common-gate input matching circuit. In [22], the authors also designed the wideband LNA for UWB by using three stage common-source amplifier and its bandwidth was from 3GHz to 6GHz. In [23], the authors optimized gain, noise, linearity and return losses of LNA for UWB applications. In UWB systems, the wideband input impedance matching is a crucial design challenge. There were some excellent wideband input impedance matching solutions proposed in [9] and [10]. In [10], the authors gave the broadband input matching. However we need to have the accurate transformer parameters. But the standard devices of TSMC 0.18µm does not include the transformer parameters. In [9], the authors used the topology in UWB LNA design is actually the Chebyshev filter. Although the topology also achieves the input matching, it needs four inductances. The inductance costs a lot of area. In our proposed design, we use the topology that contains a conventional source-degeneration input matching, an inductor shunted in input RF path and a capacitor seriesed in input RF path [9], because it does not need to exact transformer parameters and the number of inductances is one fewer than the Chebyshev filter. Then we present the analysis of input matching circuit for our designs. It is worth to emphasize the input matching analysis did not appear in conventional work. Our proposed analysis procedure can help a lot in adjusting the parameters used in input matching circuit.

Because the bandwidth of UWB is overlapping with other technology, e.g. WLAN, there should be some methods to avoid bandwidth overlapping. There are two solutions to avoid this. One is using switching-band, and another is using notch filter [16]. Because the quality factor (Q) in integrated circuit (IC) is in general low, the notch filter of IC does not good enough for UWB design. Although in [16], the authors used active notch filter to avoid low Q, it used more power. Another method is using switching band. The benefits of using switching band are that it do not need much device to achieve the application requirements and the noise of the other band can be removed because we do not use two bands simultaneously [6].

In recent years, various types of switches for switching narrow band LNA were proposed, e.q. [11][12][15]. In [11], the authors used PMOS as a switch in the load of LNA. However the mobility of PMOS is much lower than NMOS. Thus, its turn on resistance is large, which leads to a small quality factor and a low gain. In [12], the authors changed the passive device value by switching inductor. However the switching inductor needs large area. Although in [15], the authors used NMOS-based switch, its gain was not good enough.

To overcome these drawback, hence we use NMOS as switch. The large re-sistor can reduce the parasitic capacitance. Due to reduction of the parasitic capacitance, the size of the switch can be larger, which leads to a lower ron. Thus

the gain is larger when switch is on.

As introduced in Sec. 1.2, the Wi-MAX technology also prefer the solution of low cost, low power, high speed and larger coverage area. But Wi-MAX was different bands for different countries and different applications. Because there are four bands in Wi-MAX standards, using notch filter is too difficult to achieve the application requirements because it needs too many components to cut the bandwidth of the frequency that not in the application. In recent years, there were some proposed Wi-MAX LNA [13][18][19][24]. In [13], the authors were wideband band Wi-MAX LNA for 2GHz-11GHz, it was distorted by other interference. In [18], the authors used the notch filter to get the three bands of WI-MAX and WLAN, but noise was not good and it used five inductance. In [19], the authors were a LNA of band scalable receiver in 65nm CMOS for Wi-MAX. In [24], the authors were low power design for Wi-MAX LNA using capacitive cross coupling. In the thesis, we also proposed a band switchable LNA of Wi-MAX applications to reduce the other interference signal and uses all bands of Wi-MAX applications.

1.5

Thesis Organization

This thesis discusses about the LNA in UWB and Wi-MAX standards that all need the band switchable topology. The proposed LNA design used TSMC

0.18um CMOS technology. In this thesis we introduced two major topics: ”A band switchable UWB LNA” and ”A band switchable Wi-MAX LNA”. In Chap-ter 2, we will discuss theoretical MOSFET noise model and noise theory. The classical theory of linearity and analysis of S-parameters, is presented in Sec. 2.2 and Sec. 2.3. Sec. 2.4 introduces some fundamentals of conventional LNA. In Chapter 3, a band switchable UWB LNA was proposed. The analysis of input matching circuit is presented in Sec. 3.2. The switch circuit topology of the LNA was discussed in Sec. 3.3. Also some design methodologies and layout consideration and trade-off are discussed here. The layout graph was presented in Sec. 3.6. The measurement and simulation result of the LNA was discussed in Sec. 3.7. Finally the second modified circuit was designed to achieve better performance in this chapter. In Chapter 4, a band switchable Wi-MAX LNA is proposed. The switch circuit in the LNA improves the circuit in Chapter 3. By connecting the loading capacitors to ground, we can remove one capacitor from the switch circuit in Sec. 3.3. Another contribution is to achieve the application of multi-band Wi-MAX. The simulation result of the LNA is discussed in Sec. 4.5. Conclusion and future work was given in Chapter 5.

Chapter 2

Background of LNA Design

In this chapter, the significant parameter, S-parameter is discussed in Sec. 2.1, the noise in MOSFET is introduced in Sec. 2.2. In Sec. 2.3 we discuss the linearity of LNA. Finally we analyze the noise of Complementary Metal-Oxide-Semiconductor (CMOS) and introduce various design of LNA in Sec. 2.4.

2.1

S-parameters

In radio-frequency (RF) design, The S-parameters are parameters for perfor-mance measurement. However the network that has many ports is too compli-cated to describe the characteristic of the network. Hence we usually use the two-port network that can be easily extended to the n-port network to describe the characteristic of system.In the system or network with two ports as illustrated in Fig.2.1, we often use the parameters including the y-parameters, h-parameters, and z-parameters to describe the systems in the analog design. Those parameters are expressed as follows:

H − parameters :

V1 = h11I1+ h12V2, (2.1)

I2 = h21I1+ h22V2, (2.2)

h11= V1 I1|V 2=0, h12 = V1 V2| I1=0, h21 = I2 I1|V 2=0, h22 = I2 V2|I 1=0, Y − parameters : I1 = y11V1+ y12V2, I2 = y21V1+ y22V2, where Y11 = I_V1 1|V2=0, Y12 = I_V1 2|V1=0, Y21 = I_V2 1|V2=0, Y22 = I_V2 2|V1=0, Z − parameters : V1 = Z11I1+ Z12I2, (2.3) V2 = Z21I1+ Z22I2, (2.4) where Z11= V_I1 1|I2=0, Z12= V_I1 2|I1=0, Z21= V_I2 1|I2=0, Z22= V_I2 2|I1=0.

All the parameters of the networks are related to the total voltage and the total currents at both two ports. Hence the accuracy of the voltages and currents is demanded to obtain accurate the parameters. However in radio-frequency de-sign the h, y, z-parameters cannot be measured, due to the following reasons,

+

-+

Figure 2.1: The two-ports network.

• Short and open network are difficult to obtain in the radio-frequency, since the coupling effect of capacitance and inductance, and the transmission line effect.

• The high frequency circuit is sensitive to the impedance and may lead to unstable or fail to work well when the terminal is open or short.

• The measured total voltage and the total current are not accurate in radio frequency due to coupling effect of capacitance and inductance.

Hence we need the parameters excluding h, y, z-parameters to describe the char-acteristic of the network. Let us explain this as follows. Let use add the trans-mission line in the two-port network as shown in Fig. 2.2, where Ei1 is the wave

voltage transmitted from the input port to the network, Er1 is the wave voltage

reflected from the network to the input port, Ei2 is the wave voltage transmitted

from the output port to the network, and Er2 is the wave voltage reflected from

the network to the output port. The voltage and current can be expressed as follows V1 = Ei1+ Er1, (2.5) V2 = Ei2+ Er2, (2.6) I1 = Ei1− Er1 Zo , (2.7) I2 = Ei2− Er2 Zo , (2.8)

Two-ports Network 1 r E 1 i E Ei2 2 r E s Z L Z en G

Figure 2.2: The two-ports network inserted in to a transmission line. where Zo is the characteristic impedance of the transmission line. Then we derive

Er1 and Er2 in terms of the other parameters from the equation by replacing the

total voltage and total current, so we derive the reflected traveling waves Er which

depends on the incident traveling voltage waves Ei by rearranging Eqs.(2.5)-(2.8), which leads to

Er1 = f11Ei1+ f12Ei2, (2.9)

Er2 = f21Ei1+ f22Ei2, (2.10)

where f11, f12, f21and f22are the new parameters of this network related to

trav-eling voltage waves. Eqs.(2.9)-(2.10)is similar to that h-parameters in Eqs.(2.1)-(2.2), but they can also be expressed in other from like z-parameters in Eqs(2.3)-(2.4). By dividing the both sides of these equations by √Zo, we can reexpress

Eqs.(2.9)-(2.10) by Er1 pZo = f11Ei1 pZo +f12Ei2 pZo , (2.11) Er2 pZo = f21Ei1 pZo + f22Ei2 pZo . (2.12)

Let us define the following parameters

a1 = Ei1 pZo , a2 = Ei2 pZo , (2.13) b1 = Er1 pZo , b2 = Er2 pZo , (2.14)

Let us define s11 = f11, s12= f12, s21 = f21, s22 = f22, and Eqs.(2.11)-(2.12) are reexpressed as follows b1 = s11a1+ s12a2, b2 = s21a1+ s22a2, where s11= b_a1 1|a2=0, s12= b_a1 2|a1=0, s21= b_a2₁|a2=0, s22= b_a2₂|a1=0.

and s11, s12, s21 and s22 are called as the scattering parameters or simply

S-parameters. As shown in Eqs.(2.13)-(2.14) the unit of s11, s12, s21 and s22 is the

square root of power. Hence the S-parameters use the power of traveling wave rather than total voltage and total current at the ports at the radio-frequency. The two-port network for S-parameters is shown as Fig. 2.3.

Two-ports Network S Z L Z S V 1 a 1 b b2 2 a

Figure 2.3: The two-ports network for S-parameters.

2.1.1

Multiple-Port Networks

As discussed in Sec. 2.1, let us derive the S-parameters of multiple-port network. For multiple-port network, the S-parameters for two-port network is not enough to measure the power transmission. To represent the S-parameters of multiple-port network, we usually use S-parameter matrix for this propose. Assume a multiple-port network has n ports, and every transmission line is lossless as shown in Fig. 2.4, where aj is the incident traveling wave, and bi is the reflected traveling

n-ports

Network

a

b

a

b

b

b

a

a

s

Figure 2.4: The N-ports network for S-parameters. waves are related by

bi = n

X

i=j

sijaj f or i = 1, 2, 3, ..., n , (2.15)

where sij is the transmission coefficient that performs forward transmission from

the jth port to the ith port when i > j, with all other ports impedance matched. sij is the transmission coefficient that performs reverse transmission from the jth

port to the ith port when i < j, with all other ports impedance matched, and sij is the reflection coefficient that reflects from the ith port when i = j, with all

other ports impedance matched. Therefore we can rearrange Eq.(2.15) as b1 = s11a1+ s12a2+ s13a3+ ... + s1nan,

b2 = s21a1+ s22a2+ s23a3+ ... + s2nan,

...

Represent Eq.(2.16) using matrix form Eq.(2.17) as follows         b1 b2 . . . b3         =         s11 s12 . . . s1n s21 s22 . . . s2n . . . . . . . . . . . . sn1 sn2 . . . snn                 a1 a2 . . . a3         , (2.17)

which can be used in the multiple-port network.

2.1.2

Smith Chart

In order to solve transmission problem in radio-frequency signal, complex calcu-lation is required. However the complex calcucalcu-lation is not intuitively to design the circuit of RF system. Hence a graphical solution is proposed by Philip H. Smith. The solution is called Smith chart that helps the designer to design cir-cuit more intuitively. Before introducing the Smith chart, let us discuss the input impedance matching first, because an important application of Smith chart is in-put impedance matching. To design an LNA, the inin-put impedance matching is necessary, because it helps to achieve the maximum power transfer requirement. An ideal input impedance matching means the load impedance of input is set to the complex conjugate of the input impedance. For example, the input matching impedance of a + jb is a − jb. However the input impedance that we usually use in communication system is 50 ohm. Thus the complex conjugate impedance is also 50 ohm. Then we define the reflection coefficient, Γ, i.e. sij(i = j), that is

used in the impedance matching expressed as Γ = Z − Zo Z + Zo

, (2.18)

where Zo is the characteristic impedance of a lossless transmission line. Eq.(2.18)

can also be expressed by

Γ = Γr+ jΓi = |Γ|e(jθΓ), (2.19)

where Γr and Γi are real part and imaginary part of the reflection coefficient,

addition the ideal condition for input matching is that Γ equals to zero. Because the load impedance usually has real part and imaginary part, we define the load impedance of the transmission line by Z = R + jX. Replacing Z by R + jX, Eq.(2.18) can be rewritten as

Γ = Z/Zo− 1 Z/Zo+ 1 = z − 1 z + 1, where z = Z Zo = R Zo + jX Zo = r + jx, (2.20)

and z is called normalized load impedance and r and x is the normalized load resistance and reactance, respectively. By rearrange Eq.(2.20) z can be described by z = 1 + Γ 1 − Γ = 1 + |Γ|e(jθΓ) 1 − |Γ|e(jθΓ) = r + jx = 1 + Γr+ jΓi 1 − Γr− jΓi = (1 − Γ 2 r) − Γ2i + j2Γi (1 − Γr)2+ Γ2i . (2.21)

From Eq.(2.20) and Eq.(2.21), where

r = (1 − Γ 2 r) − Γ2i (1 − Γr)2+ Γ2i , (2.22) and x = 2Γi (1 − Γr)2+ Γ2i . (2.23)

Eqs.(2.22)-(2.23) are equations of circles. Thus we can draw circles on the Γ-plane. From the constant-r circle equation in Eq.(2.22), we have

r[(1 − Γr)2+ Γ2i] = (1 − Γ2r) − Γ2i, ⇒ (1 + r)Γ2r− 2rΓr+ (1 + r)Γ2i = 1 − r, ⇒ Γ2r− 2r 1 + rΓr+  r 1 + r 2 + Γ2_i = 1 − r 1 + r +  r 1 + r 2 , ⇒  Γr− r 1 + r 2 + Γ2_i = 1 (1 + r)2,

where the center is [r/(1 + r), 0] and radius is 1/(1 + r). Similarly from the constant-x circle equation in Eq.(2.23), we have

x[(1 − Γr)2+ Γ2i] = 2Γi, ⇒ 1 − 2Γr+ Γ2r− 2 xΓi+ Γ 2 i +  1 x 2 = 1 x 2 , ⇒ (Γr− 1)2+  Γi− 1 x 2 = 1 x 2 ,

where the center is [1, 1/x] and radius is 1/|x|. The constant-r circles and the constant-x circles on the Γ-plane are shown in Fig. 2.5(a) and Fig. 2.5(b),which is called Smith chart.

Combining with the two circles, the Smith chart is shown in Fig. 2.6. We can get the reflection coefficient by pointing the impedance of the load (r + jx) on the Smith chart or get the impedance of the load by pointing the reflection coefficient (Γ = Γr + jΓi). As discussed before the perfect matching is at the

point that reflection coefficient (Γ) is zero. When the normalized load resistance and reactance are 1 and 0, the actually resistance and reactance are Zo and 0,

respectively. In addition on the upper half plane of the Smith chart it always give the positive reactance. Hence it has the characteristic of the inductance. Similarly the lower half plane has the characteristic of the capacitance as shown in Fig. 2.7.

The Smith chart also has the admittance type, i.e. Y = 1/z = g + jb, where Y is the admittance of the load, g and b are the normalized load conductance and susceptance, respectively. The admittance Smith chart is shown in Fig. 2.8.

Similarly the lower half plane has the characteristic of the capacitance and the upper half plane has the characteristic of the inductance as shown in Fig. 2.9. In order to achieve impedance matching we can parallel and seriatim con-nect the lossless passive devices such as inductance and capacitor to match the impedance. However the combined impedance-admittance Smith chart is usually preferred, because using the admittance Smith chart to describe parallel connec-tion of passive device is easier than impedance Smith chart. Hence by combining

Mapping

Impedance

plane

-plane

Mapping

Impedance

plane

-plane

Figure 2.5: Mapping Smith chart from impedance plane: (a)constant-r.

Im[ ]

Re[ ]

Figure 2.6: Smith chart.

Im[ ] Re[ ] c ccc cc

Inductive

Capacitive

Figure 2.7: The characteristic of Smith chart.

the impedance Smith chart and admittance Smith chart, the Smith chart is drawn in Fig. 2.10. The characteristic of parallel and seriatim connected devices are shown in Fig. 2.11.

From the Smith chart, we can achieve the matching by series and parallel connection of inductance and capacitor. Note that the center of the Smith chart

Im[ ]

Re[ ]

Figure 2.8: admittance Smith chart.

Im[ ]

Re[ ]

Inductive

Capacitive

Figure 2.9: The characteristic of admittance Smith chart.

is the goal to reach. However there are many possible solutions for one matching condition. In addition the matching network usually uses lossless components like inductance, capacitor, transformer and transmission line, because lossy com-ponent like resistor leads to loss of power and induces noise. And it wastes the energy.

Im[ ]

Re[ ]

Figure 2.10: The combined impedance-admittance Smith chart.

Im[ ] Re[ ] Parallel L Series C Parallel C Series L

Figure 2.11: The series or parallel of the inductance or capacitor of Smith chart.

2.2

Noise in MOSFET

The noise in Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is a significant issue for LNA design, because in LNA design MOSFET device will contribute the most noise when compared to the components such as inductance

and capacitor. Hence the analysis of noise for MOSFET is important for LNA. In order to analyze noise, the noise model of MOSFET is needed. Important parameters to analyze noise are input-referred noise, signal-to-noise ratio, and noise figure [6]. Let us discuss the noise source in LNA design as follows:

2.2.1

Flicker Noise

One of the noises in the MOSFET is flicker noise that arises from the channel of MOSFET. The effect is due to that the interface of the oxide-silicon in the MOSFET traps the charges. The noise density of flicker noise in the gate can be presented by v2 n= K W LCoxf (2.24) where K is the process-dependent constant [6]. From Eq.(2.24), the flicker noise is small in high frequency. Hence in radio-frequency design the flicker noise is not a significant issue.

2.2.2

Thermal Noise

The thermal noise is produced by the thermal agitation of the charge carriers. The thermal noise is from the resistance in the circuit such as the resistor, the channel resistance of MOS and the gate resistance of MOS. It depends on the absolute temperature (T ). The higher the absolute temperature is, the larger the thermal noise is. So the thermal noise can be described by Pav = kT △f, where △f is

the noise bandwidth per hertz and k is Boltzmann’s constant. In the normal temperature (25C◦_{), the noise power per Hz is 1.38 × 10}−23_{× 293 (25C}◦_{) =}

4 × 10−18 _{mW = −174 dBm. The value of -174 dBm is also called the noise}

floor, because it is like floor below the signal. In addition the thermal noise is as a random distributed signal, and it is Gaussian white distributed. The thermal noise can be described in form of voltage square by

v2

n= 4kT R△f (2.25)

where R is the resistance as shown in Fig. 2.12 . We can also get the thermal noise in form of current square described by i2 _{= 4kT (1/R)△f from Eq.(2.25).}

2 4 n v = KTR fD 2 n v

R

R

Figure 2.12: A thermal noise model: (a) voltage type, (b) current type.

2.2.3

Drain Noise

The drain noise is the channel noise of MOSFET that is from the voltage control resistor of MOS channel. It can be described by

i2

d= 4kT γgd0△f,

where the gd0 is the drain conductance of the device when VDS is zero , and γ is a

bias dependent factor that is unity when VDS is zero. In the long channel device,

γ decreases toward a value of 2/3 in saturation. But in short channel device, γ is greater than 2/3. Hence the γ can be larger by using more advanced technology process, because of use of the short channel. The model of drain Noise can be as illustrated in Fig. 2.13. The noise current source is connected between the drain and source of MOS. [7]

2

d

i

drain

source

2.2.4

Gate Noise

Besides channel noise, other significant noise source is the gate noise, which is due to the channel charge with thermal agitation. Because the channel voltage variation couples to the gate directly, the gate terminal produces a noise source. This noise can be neglected at low frequencies, but it still affects the noise perfor-mance at radio frequencies due to the coupling. The gate noise can be expressed as

i2

g = 4kT δgg△f, (2.26)

where gg is conductance of noise source given by

gg =

ω2_C2 gs

5gd0

, (2.27)

δ is the coefficient of gate noise. The value of δ is 4/3 for long-channel devices. Eq.(2.27) obtained with assumption that the MOS working in saturation mode. The noise source has two models i.e. current model and voltage model. The noise model of gate noise in the MOS is shown in Fig. 2.14, where the gg connects

between the gate and source, and the resistor (rg) is connected series with the

parasitic capacitor (Cgs). The gate noise depends on the frequency. The higher

2 g i

g

r

C

Figure 2.14: The gate noise model: (a)voltage type. (b)current type. the frequency is, the larger the noise is. Because the gate noise is correlated to the drain noise, we use the correlation coefficient to describe the correlation. The correlation coefficient can be expressed as

c = qig· i∗d i2

g· i2d

This case is for long channel device that has the correlation coefficient with value 0.395j. Using the correlation coefficient, we can re-express Eq.(2.26) by

i2

g = 4kT δgg(1 − |c|2)△f + 4kT δgg|c|2△f, (2.28)

where the first item is the uncorrelated gate noise and the second item is the gate noise correlated to drain noise.

2.2.5

Noise Figure

The noise figure (NF ) is an important specification for LNA design. In analog circuit design we usually use the signal-to-noise-ratio (SNR) to describe the noise performance of a circuit. It is defined as the ratio of the total signal power to the total noise power as described by

SNR = the total signal power

the total noise power. (2.29)

In RF design the parameter that describes the noise performance is the noise figure, because of its computation convenience and the tradition. Since there are different definitions for noise figure, we choose the most popular definition here. The definition of the noise figure is

10 log10(F ),

where F is the noise factor, which is the input SNR over the output SNR expressed by

F = SNRin

SNRout

, (2.30)

where SNRout and SNRin are the signal-to-noise-ratio measured at the output

and the input, respectively. Note that the noise factor is always larger than 1. Because if the system is ideal noiseless, it means the noise contribution is zero. Hence SNRout is equal to SNRin, and the noise factor is the minimum value of

1. When the noise factor is the minimum, the noise figure also has the minimum value of 0 dB, but it is unlikely to achieve the noise performance of noise figure of 0 dB because there is always noise in the circuit. To analyze the noise factor,

we usually calculate the total output noise due to the source and the total output noise, because from Eq.(2.30), the noise factor can be re-expressed as

noise f actor = Sin/Nin Sout/Nout = Sin Sout Nout Nin = Nout GNin

= total output noise

total output noise due to input, (2.31)

where G = Sout/Sin is the gain of LNA, so we can get the noise factor by

calcu-lating the total output noise due to the source and the total output noise. Hence calculating noise factor can be easier, and we will use the rule in Sec. 2.4.

Another critical specification of system dependent on noise figure is the sen-sitivity, which is the minimum signal level able to be detected with acceptable signal-to-noise-ratio. In order to calculate the sensitivity, we re-express the noise factor as F = SNRin SNRout = Psig/PRs SNRout ,

where PRs is the source resistance noise power per Hz, and Psig is the input

signal power per Hz. Hence Psig = PRs · F · SNRout. Psig is the unit

band-width signal power. Thus to get the full bandband-width signal power we integrate the unit bandwidth signal power over the bandwidth. Hence for the flat channel, Psig,tot= PRs·F ·SNRout·B, where B is the bandwidth of the channel, Psig,totis the

total signal power of the bandwidth. Usually the unit of power is dBm, so we re-place the milliwatt with dBm. Hence we can get the total signal power expressed as Pin,min|dBm= PRs|dBm/Hz·NF |dB·SNRout|dB·10 log10(B), where Pin,minis the

minimum total signal power level that can achieve the minimum requirement of signal-to-noise-ratio. If our circus has the conjugate input matching, PRS is the

noise floor, -174 dBm per Hz. By replacing PRS with noise floor, the minimum

total signal power level is Pin,min = −174dBm/Hz +NF +10 log10(B)+SNRmin.

Hence the overall bandwidth noise floor of the system is the sum of the first three items, and we can increase the sensitivity by decreasing the bandwidth [6].

2.2.6

Noise factor in cascaded circuits

In order to get the total noise factor in the system, we should analyze the noise factor in the cascaded circuit, because the system usually consists of multiple stages. From Eq.(2.31), the noise factor is

F = 1

G Nout

Nin

,

where Nout = Na + GNin, and Na is the noise contribution of the circuit. For

a two-stage circuit we define G1 be the gain of the first-stage circuit, G2 be the

gain of the second-stage circuit, N1 be the noise contribution of the first-stage

circuit, and N2 be the noise contribution of the second-stage circuit as shown in

Fig. 2.15, respectively. The amplifier not only amplifies the signal from the input but also the noise from the input. Hence the first stage amplifies the noise and signal, the output noise is N1+ G1Nin. Similarly the output noise of the second

stage is N2+ G2(N1 + G1Nin). So the final noise factor is the output noise over

the input noise multiplied by the total gain given by

F = 1 G Nout Nin = N2 + G2N1+ G1G2Nin G1G2Nin = 1 + N1 G1Nin + N2 G1G2Nin = F1+ F2− 1 G1 , (2.32) where F1 = 1 + N1 G1Nin and F2 = 1 + N2 G2Nin ,

Based on the noise factor of the two-stage cascaded circuit in Eq.(2.32), we can achieve the noise factor of the N-stage cascaded circuit shown in Fig. 2.16.

The noise factor of the N-stage cascade circuit can be expressed as F = F1+ F2− 1 G1 + F3− 1 G1G2 + · · · + Fn− 1 G1G2· · · Gn−1 , (2.33)

where F1 is the noise factor of the first stage, F2 is the noise factor of the second

stage and so on. From Eq.(2.33) if the gain of the first stage is large enough, the other items excluding F1 can be neglected, and the total noise factor is equal to

1

G

G

N

N

Z

T

N

kTB

+

G

G G

N

N

N

N

N G

Figure 2.15: cascade noise model.

n

G

N

G

G

N

N

Z

T

Figure 2.16: N-stage noise model.

the first stage noise factor. In other words, the total noise factor is dominated by the first stage noise factor if G1 is large enough. This is why the first stage of

transceiver is called low noise amplifier.

2.3

Linearity

The linearity is defined by the superposition. If the input signal is x and the output signal is y, they should have two characteristics. One is additivity, another is homogeneity. That is if y1 = f (x1), y2 = f (x2), ay1+ by2 = f (ax1) + f (bx2),

a and b can be any value of constant. If any system does not follow the rule, it is nonlinearity system. However most system in natural is nonlinear system. But in RF design we expect that all the systems are linear, because the linear system can be solved more easily. Hence the LNA design should take care of the linearity. By the way the linearity of system is also limited by the mixer design. If the signal passes thought the nonlinear system as shown in Fig. 2.17, the system can product many harmonics, so the output signal can be expressed as

where Vout is output voltage, Vin is input voltage, a1, a2, a3... are the coefficients.

By replacing Vin by the sinusoidal signal, Vin = A cos ωt, the nonlinear output

can be re-expressed as

Vout = a1A cos ωt + a2A2cos ωt2+ a3A3cos ωt3+ · · ·

= a1A cos ωt + a2A2 2 (cos 2ωt + 1) + a3A3 4 (cos 3ωt + 3 cos ωt) + · · · = a2A 2 2 +  a1A + 3a3A3 4  cos ωt +a2A 2 2 cos 2ωt + a3A3 4 cos 3ωt + · · ·(2.34) where a2A2/2 is the DC offset, cos ωt is the fundamental frequency signal that we

want, and the other items are the harmonic terms. Because the harmonic terms

in

_out

f

2

f

3

f

f

f

f

Figure 2.17: The spectrum for the input and output of nonlinear amplifier. can distort the signal in fundamental frequency, we prefer a linear system. In order to get non-distortional signal, the design of linearity is taken seriously. To describe the linearity performance, P1dB and IIP3 are usually used in RF design.

The P1dB can be regarded as the gain compression of the system. The output

and input signal usually have the linearity when the input signal is not too large, but when the input signal is too large, the linearity rule breaks. From Eq.(2.34) the signal gain can be expressed as

Vout Vin = [a1A + 3a3A3 4 ] cos ωt A cos ωt = a1+ 3a3A3 4 , (2.35)

where a3 is usually smaller than 0, so the gain can decrease to 0 when the input

signal is too large. Hence we define the input value at the gain compressed 1dB point as P1dB. From Eq.(2.35) the 1-dB gain compression point is described by

20 log |a1|−1dB = 20 log |a1+(3/4)A2_1−dBa3|. So the point is A1−dB =

q

0.145|a1

a3|,

we can draw it on the output and input transform plot as shown in Fig.2.18. Other factor that affect the linearity is the intermodulation distortion. When the

1dB

1 dB

A

-20log

_A

_out

20log

_A

_in

Figure 2.18: Definition of the 1-dB compression point.

system has the two or more interference sources as shown in Fig. 2.19. As the sum of two input interference is Vin = A1cos ω1t + A2cos ω2t, the output can be

expressed as

Vout = a1(A1cos ω1t + A2cos ω2t) + a2(A1cos ω1t + A2cos ω2t)2+

a3(A1cos ω1t + A2cos ω2t)3+ ...

Because the calculation is too complex, we list the items in different angular fre-quency in Tab. 2.1. Because the 3rd_{-order harmonic may be directly located in}

Frequency(ω) harmonic ω1± ω2 a2A1A2cos(ω1+ ω2)t + a2A1A2cos(ω1− ω2)t 2ω1± ω2 3a 3A21A2 4 cos(2ω1+ ω2)t + 3a3A21A2 4 cos(2ω1− ω2)t 2ω2± ω1 3a 3A22A1 4 cos(2ω2+ ω1)t + 3a3A22A1 4 cos(2ω2− ω1)t ω1, ω2 [a1A1+ 3a 3A31 4 + 3a3A1A22 2 ] cos ω1t + [a1A2+ 3a3A32 4 + 3a3A21A2 2 ] cos ω2t

in

_out

f

f

f

f

f

f

2

f

f

2f

f

f

f

2f

2f

3f

Figure 2.19: The spectrum of the nonlinear circuit with two tone input. the channel, the signal in the desired channel is distorted. Hence in order to de-scribe the nonlinearity due to interference, we define the input 3rd_{-order intercept}

point (IIP3) be the input signal level at the point that the 3rd-order

intermod-ulation distortion equals to the input signal excluding the gain compression as shown in Fig. 2.20. When the input signal is at IIP3, it means that the power in

20log

_A

_out

20log

_A

_in

3

IIP

Figure 2.20: Definition of the IIP3 point.

fundamental frequency is the minimum acceptable value, because the distortion and the signal are at the same level.

2.4

LNA Architectures

In this section we discuss about some basic LNA architectures that are usually used in the RF design. From sections in Chapter 2, the LNA design cares about power gain (s21), noise figure (NF ), linearity (P1dB, IIP3), and reflection

coeffi-cient (s11), but those are trade-off parameters. Hence the design of LNA is to get

the balance of all the parameters.

In LNA design, one of the critical design issues is the reflection coefficient, be-cause it represents the amount of signal power reflected in the input stage. Since communication systems usually choose the 50 ohm to be the input impedance value. (50 ohm has the properties of low loss and high power transfer rate), the input impedance of LNA should be designed to be 50 ohm.

In basic amplifier design, there are two types of topology that are usually used. One is common source amplifier, the other is common gate amplifier. There are some topologies of input impedance matching for LNA including common source amplifier with shunt input resistor, common gate amplifier, shunt-series amplifier, and inductive source degeneration as shown in Fig. 2.21.

The first one technique is common source amplifier with shunt input resistor as shown in Fig. 2.21(a), where 50-ohm the resistor connects the input directly to get the perfect input impedance matching, but the noise contribution is the worst, because the added input resistor contributes the noise that equals to the source noise. Also the added input resistor attenuates the input signal as well, and the attenuated power can contributes the noise. Because the bad noise performance of the architecture, it is difficult to apply it to the general RF receivers that demand good input impedance matching.

The second one is shown in Fig. 2.21(b), where the common gate amplifier that uses the common gate stage as the input terminal. The input impedance of the common gate can be calculated by 1/(gm + gmb) = 50Ω, where gm is

transconductance of the input stage, gmb is the back-gate transconductance of

the input stage, they are all designed to achieve the input impedance of 50 ohm. By noise analysis the noise factor can be expressed as F = 1 + _αγ when the

input impedance is matched, where α is the ratio of the device gm and drain

conductance gd0 when VDS = 0, and γ is the coefficient of the channel thermal

noise [6]. For the short-channel device α is always smaller than one and γ is greater than one. For long channel devices γ is 2/3 and α is 1. By replacing γ and α with the values in the long channel devices the noise factor is F = 1 +_αγ _≥

5

3 = 2.2 (dB). Hence the common gate amplifier architecture of LNA can achieve

the minimum noise figure value of 2.2dB.

The third LNA architecture is shunt-series amplifier that achieves the input impedance matching and output impedance matching by the series and shunt feedback resistors as shown in Fig. 2.21(c). The shunt-series amplifier architec-ture always have high power consumption compared to others under similar noise performance. However the shunt-series amplifier architecture can be used in some wideband LNA designs, because it is easy to get the wideband impedance match-ing. But for narrow band LNA design the shunt-series amplifier architecture is not popular, due to its high power dissipation.

The fourth LNA architecture is the inductive source degeneration LNA as shown in Fig. 2.21(d). The inductances connect to the source and gate of the in-put stage. In the inin-put impedance the inductive source degeneration contributes a real term as we will show later. And it also has the opportunity to achieve the best noise performance, because it also achieve the noise match [20]. However since the inductances are sensitive to the frequency, the inductive source degen-eration is utilized in narrow band LNA design. The wideband input matching circuit will still contain the inductive source degeneration architecture as will be introduced in Chapter 3. The inductive source degeneration LNA is discussed in the following subsection.

2.4.1

The Analysis of Inductive Source Degeneration LNA

The well known method, inductive source degeneration LNA [8], to optimize the noise performance was proposed by Thomas H. Lee and Derek K. Shaeffer in 1997. The inductive source degeneration cascode LNA and the input stage noise model are shown in Fig. 2.22 and Fig. 2.23. The cascode topology has high isolation

in

Z

Z

Z

Z

Figure 2.21: The LNA architecture: (a) common source amplifier with shunt input resistor. (b) common gate amplifier. (c)shunt-series amplifier. (d)inductive source degeneration.

property between the input and output. Since the most important influence on input impedance and noise performance is the input stage, we discuss the input stage noise factor in this section.

The input matching of this circuit is distributed by Zin = s(Lg+ Ls) + 1 sCgs + gmLs Cgs = ωTLs at ω = ωo = 1 p(Lg + Ls)Cgs ! , (2.36) where ωTLs = gm/Cgs, Cgsis the parasitic capacitance of the input stage, Lsis the

in

Z

M

M

V

L

L

Figure 2.22: The cascode LNA architecture.

2 s v 2 g v 2 l v 2 ,c g

i

i

v

V

v

g

Figure 2.23: The noise model of inductance source degeneration LNA. source degeneration inductance, Lgis the gate inductance, gmis transconductance

of the input stage. The input impedance Zin is equal to the multiplication of Ls

and ωT at resonant frequency. This value is designed to be 50 ohm for input

matching. From Fig. 2.23 Rg is the gate resistor of the input stage and Rl is

the parasitic resistor of the gate inductance, Rg contributes the noise, called vg2

and Rl also contributes the noise, called vl2. The current noise source i2d is the

channel thermal noise of the input NMOS, i2

g,u and i2g,c are the gate noise that

the noise contribution of next stage, because the input stage gives sufficient gain of LNA. From Eq.(2.30) the noise factor is the total output noise over the total output noise due to the source. Hence in order to get the total output noise when the amplifier is driven by a 50-ohm source we calculate the transconductance of the input stage first. Because the output current is proportional to the voltage on Cgs and the input stage takes the form of a series-resonant network, Gm can

be expressed as Gm = gmQin = gm1 ωoCgs(Rs+ ωTLS) = ωT ωoRs(1 + ωT_RL_ss) = ωT 2ωoRs , (2.37)

where Qin is the effective Q of the amplifier input circuit. Define 50-ohm source

noise power density is Ssrc(ωo). From Eq.(2.37), the output noise power density

due to the 50-ohm source (Sa,src(ωo)) can be expressed as

Sa,src(ωo) = Ssrc(ωo)G2m = 4kT ω2 T ω2 oRs(1 + ωT_RL_sS)2 . (2.38)

Similarly the output noise power density due to Rg and Rl is

Sa,Rl,Rg(ωo) =

4kT (Rl+ Rg)ωT2

ω2

oRs2(1 + ωTRLsS)

2. (2.39)

Then the most important noise contributor of the LNA is the channel current noise of the input MOS device, so we calculate idby expressing the power spectral

density of the source, one can derive that the output noise power density from the source given by

Sa,id(ωo) = i2 d/△f (1 + ωTLS Rs ) 2 = 4kT γgdo (1 + ωTLS Rs ) 2.

The noise power density of the correlating part of the gate noise to drain noise is Sa,id,ig,c(ωo) = κSa,id(ωo) = 4kT κγgdo (1 + ωTLS Rs ) 2, where κ = " 1 + |c|QL s δα2 5γ #2 + δα 2 5γ |c| 2_, QL = 1 ωoRsCgs , and α = gm g .

The noise power density of the uncorrelated part of the gate noise is expressed as Sa,id,u(ωo) = ζSa,id(ωo) = 4kT ζγgdo (1 + ωTLS Rs ) 2, where ζ = δα 2 5γ (1 − |c| 2_{)(1 + Q}2 L).

Because the noise contribution of the drain noise is from the first device M1,

which is part of Sa,id(ωo). So it is appropriate to define the contribution of M1

be Sa,id,M1(ωo) = χSa,id(ωo) = 4kT χγgdo (1 + ωTLS Rs ) 2, (2.40) where χ = κ + ζ = 1 − 2|c| s δα2 5γ + δα2 5γ (1 + Q 2 L). (2.41)

Hence by adding the total output noise in Eqs.(2.38)-(2.40), dividing it by the total output noise due to the input in Eq.(2.38), the total noise factor can be derived as F = 1 + Rl Rs + Rg Rs + γχgdoRs  ωo ωT 2 , By replacing gdoQL= gm α 1 ωoRsCgs = ωT αωoRs , the noise factor can be re-expressed as

F = 1 + Rl Rs + Rg Rs + γχ αQL  ωo ωT  . (2.42)

Finally Eq.(2.41) gives that χ is part of Q2

L, and Eq.(2.42) shows that the noise

Chapter 3

Band Switchable UWB LNA

Design

In this chapter, we will present the dual-band Switchable UWB LNA. First we discuss the consideration in the UWB switchable LNA design in Sec. 3.1. Second the important circuit for wideband input matching is presented in Sec. 3.2. In Sec. 3.3 we propose the new topology of the switch circuit. In addition, an output buffer for measurement is discussed in Sec. 3.4. In Sec. 3.5 all the circuits discussed in Secs. 3.2 - 3.4 are extended and used in the UWB switchable LNA. Secs. 3.6 and 3.7 discuss the layout consideration and the microphotograph of tape out chip. The measurement of this chip is shown in Sec. 3.8. We further improve the band switchable UWB LNA and show the result in Sec. 3.9. The layout and measurement of the improved band switchable UWB LNA are shown in Sec. 3.10 and Sec. 3.11, respectively.

3.1

Consideration for UWB Switchable LNA

The design considerations for UWB LNA are mainly in input return loss, power gain and noise figure (NF ), linearity (P1dB, IIP3) and power consumption, but

there are some trade-off between these important parameters. In order to get great input return loss, the wideband input matching is necessary. However in UWB systems, the wideband input impedance matching is a crucial design chal-lenge. There were some excellent wideband input impedance matching solutions

proposed in [9] and [10]. The wideband input impedance matching in [9] and [10] are discussed in Sec. 3.2. However because the wideband input matching and the wideband noise matching [20] cannot achieve at the same time, there is a trade-off between the wideband input matching and the wideband noise matching [20]. The power gain is related to the power consumption and input return loss. Usually as the power gain is higher, the power consumption is larger, because the given energy is larger. Also the power gain is higher when the input return loss is lower, because lower input return loss means more signal power is transferred to the circuit. The linearity is most influenced by the output stage, because the signal power is the largest in the output stage. Hence the output buffer for measurement need to consider both the linearity and the output impedance matching. It is worth to emphasize that the power gain is also contributed from the output buffer, because the buffer increases the output current. Bandwidth is also an important parameter in the UWB switchable LNA. As discussed in Sec. 1.1, in order to avoid the 5-6GHz band in UWB, we should use the switch circuit. The classical switch circuit was proposed in [11]. In Sec. 3.3 we will discuss the switch circuit in [11]. Furthermore we will propose a new switch circuit used in LNA load in Sec. 3.3.

3.2

Wideband Input Matching

Some popular UWB input matching topology for LNA design are shown in Fig. 3.1 [9]and Fig. 3.4 [10]. In Fig. 3.1 the wideband input matching utilizes the transformer as the series feedback and the capacitive as the shunt feedback. And the feedback produces the real part of the input impedance for matching. The topology contributes two resonance frequencies at different frequency, respec-tively. In the high frequency, we can adjust the resonate frequency by properly choosing the drain inductor (Ld) and the load capacitance (CL). It means the

source of the two input transistors is connected to the ac ground, so the small signal circuit is shown in Fig. 3.2. We can derive the input impedance as

Zin,H = jωLg+ 1 jω(Cgs+ Cgd) + M · gm Cgs+ Cgd ,

1 M 2 M g L dd V d L gd C L C

M

Figure 3.1: The dual feedback wideband matching.

+

L

v

g

v

C

Z

L

C

C

Figure 3.2: The small signal circuit of dual feedback circuit at high frequency. where M is mutual inductance between the windings and the real part is con-tributed by the transformer and the resonance frequency expressed as

fH =  2πpLdCL −1 =  2πqLg(Cgs+ Cgd) −1 .

The real part is designed to be 50 ohm and the imaginary part is designed to be 0 ohm. In low frequency the small signal circuit is shown in Fig. 3.3, the input impedance can be expressed as

Zin,L = jωLg+

1

jω(Cgs+ Cgd) + _Req+1/jωC1 _eq

, (3.1)

where Req = (Cgd+ CL)/(gmCgd) and jωCeq = jωCgdgmrds, and the real part of