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Design and analysis of the GCRA traffic shaper for VBR services in ATM networks

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for VBR

Services in ATM

Networks*

Mingfu Li Zsehong Tsait

Department of Electrical Engineering, Rm. 543 National Taiwan University, Taipei, Taiwan, R.O.C. Email: 1mfQeagle.ee.ntu.edu.tw

,

ztsaiQcc.ee.ntu.edu.tw

Tel: 886-2-3635251, 886-2-3625252 Ext. 543 F a : 886-2-3638247

Abstract

T h e proposed GCRA t r a f i c shaper consists of a regulator and a scheduler. It c a n shape multiple i n c o m i n g VBR cell s t r e a m s simultaneously t o be strictly conforming according t o t h e GCRA algorithm w h e n t h e cells depart f o r t h e ATM out- p u t link. T h e i m p a c t of cell e m i s s i o n conflicts is considered and resolved by using a feedback signal f r o m t h e scheduler t o t h e regulator. T h e call a d m i s s i o n control condition and t h e cell delay bound are derived. S i m u l a t i o n results demonstrate t h a t t h e o u t p u t cell s t r e a m s of t h e proposed GCRA tra@c shaper do n o t c o n t a i n a n y non-conforming cells and t h e out- p u t queue size is significantly reduced.

1

Introduction

Since the traffic management of ATM networks became an important research area, many traffic shapers or cell s-

pacing devices have been proposed to reduce the burstiness of the VBR traffic [l, 2, 3, 4, 51. The concept of traffic

shaper or cell spacer is to store the input cells in the buffer and then output them at eligible time or theoretical reemis- sion time. Traffic shapers can be placed in the source node, in the network entry point or any intermediate multiplex- ing nodes, for example, the ATM switches. In [I, 21, traffic shapers or cell spacers are designed according to the socalled Virtual-Scheduling Algorithm (VSA) to reduce the cell delay variation (CDV) due to queueing in multiplexing nodes. In [3], Brochin employs a cell spacing device to prevent any two

successive cells from being transmitted within a time short- er than a variable value. Traffic shaper is implemented by the sliding window mechanism followed by a peak bit rate reduction mechanism in [4]. In [5], two level shaping algo- rithm which depends on the buffer occupancy of the shaper is proposed.

*This work was supported by National Science Council of the Re-

t Corresponding Author

public of China under Grant NSC 86-2215-E002-033.

In most of these papers, the assumed models include mul- tiple traffic streams passing through separate cell spacing devices and a second-stage multiplexer before output. Since the impact of the multiplexer on the output traffic usual- ly is not taken into account, the output cell streams may be non-conforming due to emission conflicts within the mul- tiplexer, regardless the fact that the cell streams observed at the output of spacing devices are conforming. In other words, such emission conflicts are likely to lead to the un- necessary peak or sustainable cell rate violation when cells are transmitted to the ATM output link. It reveals that the

multiplexer should be modeled as a component of the traffic shaper such t h a t the impact of cell output conflict can be resolved. In [6], a software method is proposed for multi- plexing spacer outputs on cell emissions. Unfortunately, the output cell streams of the multiplexer are still not guaran- teed to be conforming. Thus, the design of traffic shapers which can regulate the peak cell rate, sustainable cell rate and burst tolerance simultaneously to be conforming is still at issue.

In this paper, we proposed the GCRA traffic shaper which can shape multiple incoming VBR traffic streams simultane- ously to be strictly conforming with respect to the GCRA algorithm when the cells enter the ATM output link. Since the shaping delay is related to both the input and output traffic descriptors, we will first derive the call admission con- trol condition to guarantee the shaper performance and then analyze the total shaping delay bound later.

The organization of this paper is as follows. In section 2, the traffic model is defined. In section 3, we describe the design of the GCRA traffic shaper. In section 4, the delay bound of the GCRA traffic shaper is derived. In section 5, the proposed GCRA traffic shaper is demonstrated by numerical examples. And finally in section 6 , we present our conclusions.

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feedback

I

,+b

...

/...I

regulator scheduler

I’igure 1: The model of the GCRA traffic shaper.

2

The Traffic

Model

We use the concept of traffic specification in the ATM Forum UN1 Specification [7] t o define the traffic descriptor ( X ,

T,

r) for each virtual connection (VC). Here, X indicates the minimum cell interarrival time, which corresponds to the peak cell rate parameter, and T represents the minimum av- erage cell interarrival time. Note that the inverse of T is equivalent to the sustainable cell rate. The burst tolerance r is the maximal amount of time that is allowed for the actual cell arrival to be earlier than the cell arrival time theoretically predicated, under the assumption that any two consecutive cells are separated by the interval T. The latter burst tol- erance parameter r is identical to that defined in Forum’s GCWL definition [7]. In other words, the traffic descrip- tor

(X,

T, r) indicates the following traffic characteristics of a cell stream: regarding the sustainable cell rate, the cell stream conforms to GCRA ( T , r ) ; when the peak cell rate is concerned, the cell interarrival time is strictly larger or

equal to X , i.e., conforms to GCRA(X,O). In the rest of this pitper, the desired output traffic descriptor of VC j is specifically specified as ( X j

,

T j , ~ j ) .

3

The

GCRA

Traffic Shaper

3.1 GCRA Traffic Shaper Model

In this section, we propose a new traffic shaper model which consists of two components: a regulator and a sched- uler, as shown in Fig. 1. The regulator consists of several de- parture controllers. Each departure controller regulates the peak cell rate, sustainable cell rate and burst tolerance for one VC according t o its individual output traffic descriptor. The operation of the traffic shaper follows a discrete time- axis, on which the normalized cell emission time is used as a time slot. If a cell arrives early, the regulator will stop it in the buffer. The latter cell then enters the scheduler at its e1ig;ible time. The scheduler is responsible for resolving the emission conflicts between cells from different VCs and transmits cells to the network. When a cell reaches the HOL position in the scheduler, it can be transmitted at the be- ginning of the next slot. Hence, the minimum sojourn time at the scheduler for any cell is one slot. In order to prevent

~

the cell emissions from violating the peak cell rate constrain- t, there exists a feedback signal from the scheduler to the GCRA mechanism within the regulator. This assures that the calculation of the eligible time of the next cell emission of the same VC is always done after the receipt of the feedback signal triggered by the current emission. Therefore, there can be at most one cell in the scheduler for each VC at any time. The buffer size in the scheduler is thus determined by the maximal number of VCs that the GCRA traffic shaper is designed to support.

3.2 Algorithm

of

the GCRA Traffic Shaper

In order to describe the GCRA shaping algorithm in the regulator in details, some control variables for shaped VCs are defined as follows. The k-th cell from VC j arrives at the shaper (or regulator) at time A j ( k ) and is buffered until the Eligible Time E T j ( k ) before it enters the scheduler. It is then attached an Initial Due-Date I D D j ( k ) when it enters the scheduler. Then it is targeted to leave the scheduler at the Theoretical Departure Time T D q ( k ) . However, the time epoch it leaves the scheduler could be different. We denote the Actual Departure Time for the k-th cell of VC j as ADTj(k). During the operation of the traffic shaper, these variables are calculated by the following iterative form

TDTj(k) = max{ADTj(k - I), TDTj(k - 1))

+

T j

,

(1) ETj

(k)

= max(ADTj ( k - 1)+Xj

-

1, TDTj ( k ) - r j - 1, Aj ( k ) } ,

I D D j ( k ) = max{TDTj(k)

-

E T j ( k ) , Sj}, ( 3 ) with initial values T D T j ( 1 ) = A j ( 1 )

,

ETj(1) = A j ( 1 )

,

IDDj (1) = S j

,

where S j is the minimal initial due-date, given by S j = min{Tj - X j

,

rj }

+

1.

First consider only a specific VC, say VC j. When the k-th cell arrives at the regulator, TDI;.(k) is not deter- mined until the feedback signal triggered by the departure of the

(k

-

1)-th cell is received. TDil;.(k) is then set to max(ADTj(k - l), TDTj(k - 1))

+

T j so that it meets the output sustainable cell rate constraint of VC j. In order to guarantee the output cell stream to conform t o ( X , , T,, r,), the k-th cell can not enter the scheduler earlier than either the time epoch A D q ( k - 1)

+

X j

-

1 or TDTj(k) - rj

-

1; otherwise, it might violate the peak cell rate constraint or the burst tolerance constraint, respectively. By taking account of the fact that a cell can never enter the scheduler before it arrives at the regulator, Eligible Time can be expressed as

equation (2). Actually, equation (2) implies that a cell is al- lowed to enter the scheduler as early as possible. Thus, such a traffic shaper implementation strategy can be called the M o d Greedy Method (MGM). Under ideal operation condi- tions, the maximal throughput of all VCs can be maintained with the use of the traffic shaper. This requires that no cell losses occur in scheduler and all cells to be emitted before their Theoretical Departure Times are reached. The first requirement can be easily met by allocating A4 buffers at the scheduler, where

M

is the maximal number of VCs that the shaper supports. To satisfy the second requirement, the

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Figure 2: Sample-path of a specific VC with traffic descriptor ( X , T , .) = ( 2 , 5 , 8 ) .

difference between T D q ( ( k ) and ET,(k)

is

used as the pre- liminary initial due-date whenever the shaper is nonempty with respect to VC j. From (1) and (2), it can be shown that T D T j ( k ) - E T j ( k ) can not be less than 6j unless the k-th cell of VC j observed no cells of VC j in the scheduler and regu- lator. The proof is left to the readers. The final initial due- date, as given by equation (3), is set to be the maximum of preliminary initial due-date TDTj

(k)

- ETj

(k)

and the min- imal initial due-date 6 , . The latter is used to reduce overdue condition in case of output conflicts. From (1) to (3), it can be shown that I D D j ( k ) satisfies rj

+

1

2

IDDj(le)

2

6,. Af-

ter the k-th cell enters the buffer of the scheduler, its instan- taneous due-date at time t , denoted as DDj ( I C , t ) , is defined

to be the difference between I D D j ( k ) and the waiting time

t

-

E T j ( k ) in the scheduler. Hence, it satisfies

D D j ( k , t ) = I D D j ( k )

-

[t

-

E T j ( k ) ] , for t

2

E T j ( k ) . (4) If D D j ( k , t ) = 0, it maintains the value zero from t on. We say that a cell is overdue if its due-date is zero and still resides at the scheduler.

In the scheduler, the Earliest-Due-Date (EDD) service dis- cipline [8] is employed to minimize the number of overdue events. The cell with the smallest due-date is emitted first. If multiple cells have equal due-date, they are emitted in a FIFO order. Fig. 2 shows one sample-path of the control variables associated with a specific VC.

4 Performance Analysis

4.1

Theorem 1 : Assume that the number of active VCs i s 9 . The output trafic descriptor of VC j is ( X j , q , r , ) , j = 1, e , 9 . Consider a target cell from VC j with initial due-

date y . Then the delay bound, d j ( y ) , of the target cell in the scheduler is given as follows.

Delay Bound in the Scheduler

where N i ( t ) = mini11

+

,

11

+

vj},

for

t

2

0; N i ( t ) = 0 , otherwise.

Proof : Consider the target cell from VC j which enters the scheduler with initial due-date y at time t. Assume the busy period that contains time t started at earlier time (t

-

A ) . Then the last cell from VC i (i

#

j ) that can delay the target cell must have arrived before time (t

+

y

-

s), where s (s

2

S i ) is the initial due-date of this cell. Hence, between time (t

-

A ) and time

( t

+

y - s ) the maximum number of cells that do not belong to VC j and will be emitted before the target cell is equal to

Moreover, the number of cells which belong to VC j and enter the scheduler during [t - A , t] is bounded by N j ( A ) . Since both the VC i (for all i

#

j ) cells entering the scheduler during

[t

- A , t

+

y - s] and the VC j cells entering the scheduler during

[t-

A ,

t ]

contribute to the delay of the target cell, we have the delay bound equation (5). 0

4.2 Call Admission Control

The following theorem provides the sufficient condition to avoid cell overdue. One should note that if a cell is overdue, then its A D T is larger than its T D T . However, ADT

>

T D T doesn't always imply an overdue event.

Theorem 2 : If dj(6,)

5

Sj, then no cell of VC j will be

overdue.

Proof : Assume that the number of active VCs is g. Con- sider an arbitrary cell from VC j and let its initial due-date be y . If d j ( y )

5

y , for all y

1

6 j , this cell shall not expe- rience overdue events. To show the sufficient condition, by equation (5) one can express % ( y ) - y as

9

N j ( n ) + N ~ ( Y + A - ~ ~ ) - ( ~ + A )

i = l , i # j

A>O

9

Nj(A)+

Ni(6j

+ A - & ) - ( 6 j + A )

i = l , i # j

For y

2

6j, one can write

= dj(6j) - 6 j

.

Thus, d j ( y )

5

y for all y

2

6 j is implied by d j ( 6 j )

5

6 j . We

then conclude dj(6j)

5

6, implies no cell overdue for VC j .

U

The call admission control procedure operates as follows. When a new VC, say VC n, requests to be supported by the shaper, dj(6j) is computed for all existing VCs and VC n. If all dj(6,)

5

6, are satisfied, the new request is granted. Otherwise, it is rejected.

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4.3

Delay Bound of

the GCRA Traffic Shaper

Lemma 1 : If no cell from VC j is overdue, then ADT>(k)

>

TDTj(k) implies IDDj(k) = Sj.

Proof : Since no cell from VC j is overdue, the cell depar- ture must be early enough to satisfy

ADTj(k)

5

E T j ( k )

+

IDDj(k)

.

( 7) Assume that IDD,(IC)

>

Sj, then from Eq.

obtain

(3) one can

TDTj(k)

=

E T j ( k )

+

IDDj(k)

2

ADTj(k)

,

(8) which is a conflict with ADTj(k)

>

TDq(k). Hence,

Theorem 3 : Assume the output and input trafic descrip- tors of VC j are given b y ( X j , T j , ~ j ) and ( X ~ , T ~ , T ~ ) , where

Tj

5

q!.

If no overdue for VC j is guaranteed, the cell delay of VC j within the whole GCRA trafic shaper is bounded by D, which satisfies

IDD.,(k) = Sj must hold. U

If

Tj

=

Tj',

then

Proof : Consider an arbitrary interval [Aj ( m

+

l), Aj (m

+

L)), where m and

L(L

2

2) are integers, satisfying A D q ( m + l )

>

T D q ( m + l ) , ADTj(m+n)

5

TDIZ;.(m+n) for 2

5

n

<

L

and ADTj(m

+

L)

>

T D q ( m + L), as

shown in Fig. 3. Notice that a sequence of such intervals shoulid have represented all possible cell arrival and depar- ture patterns. From (l), it is obvious that TDT, ( m

+

2) = ADTj(m+l)+Tj a n d T D T j ( m + n ) = T D ? ( m + n - l ) + T j for 3

5

n

<

L. Since ADTj(m

+

1)

>

T D q ( m

+

l), from Lemma 1 IDDj(m

+

1) = Sj and one can show that

ETj(m+

1) = Aj(m+ 1). Thus, the ( m + 1)-th cell does not experience any delay in the regulator. If no cells from VC j are overdue, we conclude that the delay of the (m+ 1)-th cell can not be larger than Sj. Hence, for 2

5

n

<

L, we have

ITDq(m

+

n) = A D q ( m

+

1)

+

(n

-

l)q

5

A j ( m + 1) +Sj

+

( n - 1)Tj

.

(11) On the other hand, with input traffic descriptor (Xi,

Ti,

rj)),

it can be shown that

Aj(m

+

1)

+

(n - l)X,!

,

n

5

MBS; Aj(m+n)

2

{

Aj(m

+

1)

+

(n

-

l)?! -

~ j '

,

n

>

MBS; (12) where MBS; is the maximum burst size of the j-th input VC [7] and is equal t o (9) ~ Time Arrival

1 1

6 . Actual Departure Time

>Time

...

...

Theoretical Departure Time TDT(mtl) ADT(mtl) TDT(mt2) TDT(mtnj TDT'(mt1-f) TDT(mt1)

Figure 3: A time diagram for Aj

(k),

ADTj (IC) and TDTj

(k).

By definition, Dj satisfies Dj =

-

<

max (AD? (m

+

n) - Aj(m

+

n))

L > n / l

max(ADTj(m

+

1)

-

Aj(m

+

l),

max (TDTj(m

+

n) - Aj(m

+

n)))

.

(14) By combining (ll), (12) and (14), the delay bound for arbi- trary L becomes

L > n > 2

By substituting n

=

MBS; and n = MBSj

+

1 into (i5);

and taking maximum, we obtain (9). For the special case

T j

=

Ti,

one can obtain (10). 0

5

Numerical

Results

In this section, we provide examples to show the advan- tages of the proposed GCRA traffic shaper. We compare the proposed GCRA traffic shaper with feedback signal against t- wo GCRA traffic shaper designs without feedback signal: one with EDD scheduler and one with regular FIFO multiplexer. The regulator of all three shaper designs are similar. For the GCRA traffic shapers without feedback signal, no informa, tion about A D q ( k - 1) is available. Therefore, their algo- rithm in the regulator is modified by replacing ADTj

(k

-

1) in (1) and (2) with ETj(IC - 1)

+

1. We then consider the worst case that the buffer in the regulator is always nonemp- ty for each VC. The number of active VCs is set to be 10. The output traffic descriptor of VC j

,

(Xj

,

T,, rj), satisfies

X,

=TO+j+l,C = T 0 + 3 j , ~ j = 4 9 ( C - X j ) i n T a b l e l ( a ) and Xj = TO

+

2 j , Tj =

TO

+

3 j , 7, = 49(? - X j ) in Table l(b), where To ranges from 0 to 27 to yield different output traffic loads. Computer simulations confirmed that the out- put cell streams of the proposed GCRA traffic shaper do not contain any non-conforming cells. However, the output cell streams of the two traffic shapers without feedback signal do contain non-conforming cells due to emission conflicts in the

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I I I

( b ) X . - T o + 2 j 1 3 - Tj=To+3j, Tj=49(Tj-Xj), j = 1 , . . . , 1 0

Table 1: Comparison of the GCRA traffic shapers with and without feedback signals. scheduler. The maximum queue size in the scheduler is con-

trolled to be equal t o 10 with feedback signal. While for the other traffic shapers without feedback signal, the maximum queue size can be much larger than the number of active VCs

tilization of ATM Network Links, ” IEEE Network, pp.

38-49. Sept. 1992. and the hardware design of the scheduler can be much more

difficult.

6

Conclusions

In this paper, a new GCRA traffic shaper has been de- scribed and analyzed for supporting VBR traffic. This shaper has considered and resolved the emission conflict problem that other designs [1]-[5] did not. By using a feed- back signal between the regulator and the scheduler, not on- ly it can guarantee the output cell streams to conform to the output traffic descriptor, necessary call admission con- trol can also be easily applied. Under the call admission control policy, the cell delay bound for each VC in the traf- fic shaper, including both the regulator and the scheduler, has been derived. One can observe that the cell delay bound of a specific VC in the traffic shaper is independent of the other VCs. This feature should be another advantage of the proposed design.

References

[l] F. Guillemin and W. Monin, “ Management of Cell

Delay Variation in ATM Networks, ” IEEE GLOBE-

COM’92, pp. 128-132.

[3] F. M. Brochin, “ A Cell Spacing Device for Congestion

Control in ATM Networks, ” Performance Evaluation,

pp. 107-127, 1992.

[4] G. Rigolio, L. Verri, and L. Fratta, “ Source Control and

Shaping in ATM Networks, ” IEEE GLOBECOM’Sl,

pp. 276-280.

[5] F. Bernabei, L. Gratta, M. Listanti, and M. Testa, “

Analysis of Two Level Shaping for Multiplexing of ON- OFF ATM Sources, ” IEEE ICC’93, pp. 1380-1385.

[6] G. Mercankosk, T. Moors, and A. Gantoni, Multiplex-

ing Spacer Outputs on Cell Emissions, ” IEEE INFO-

COM’95, pp. 49-55.

[7] The ATM Forum, ATM User-Network Interface Speci- fication, Version 3.0, PTR Prentice-Hall, 1993.

[8] H. Saito, Optimal Queuing Discipline for Real-Time Traffic at ATM Switching Nodes, ” IEEE Trans. Com-

mum, Vol. 38, No. 12, pp. 2131-2136, Dec. 1990.

[2] P. E. Boyer, F. M. Guillemin, M. J. Servel, and J. Spacing Cells Protects and Enhances U- Coudreuse,

數據

Figure  2:  Sample-path of a specific VC with traffic descriptor  ( X ,  T ,  .)  =  ( 2 , 5 , 8 )
Figure 3:  A time diagram for Aj  (k),  ADTj  (IC)  and TDTj  (k).
Table  1:  Comparison of  the GCRA traffic shapers with and without  feedback signals

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