Modelling and controller design of inductor-coupled
multimodule DC–DC convertor with master–slave
current-comparing scheme
R.-T. Chen and Y.-Y. Chen
Abstract: The paper proposes a novel multimodule parallel structure with coupled inductor and common filter. The design and implementation of a three-module parallel push–pull convertor system is presented. In parallel operation, a master–slave current-comparing scheme is proposed to compensate the mismatch in current-control characteristics of each parallel convertor. First, the small-signal equivalent circuit and transfer-function model of the multimodule convertor system are found. Then the model reduction is performed using the concept of dominant energy mode. Based on the reduced convertor model, a PI controller is quantitatively designed according to the prescribed regulating specifications. The performance of the convertor and the effectiveness of the proposed controller are demonstrated by some simulation and experimental results.
1 Introduction
Power requirements for large commercial and military systems such as large computer and electronic systems, ships and aircraft, telecommunications etc. are increasing and becoming more complex as systems compete for more data-computing and data-retrieval capability at higher speeds and lower costs. Power-supply systems must be increasingly reliable and efficient, and load power-density requirements are increasing as well. Present and future system power requirements are for five or more voltages, including new lower voltages as microprocessor (CPU) speed and power increase and operating voltages decrease to the 1–3 V level with higher currents and higher di/dt load steps, together with tighter voltage-regulation tolerances. Production of high currents with a single convertor raises problems such as heat dissipation, expensive high-power components and failure protection. A better method of meeting these demands is to employ several individual convertors that share the load requirements. Multimodule parallel DC–DC convertor systems [1, 2]are an interesting solution to the problem of providing a tightly regulated output voltage at high currents. Cascading of convertor stages reduces the conversion ratio of each stage, while paralleling allows sharing of the output current between modules. With such solutions, modularity of the power system is achieved by simply adding or removing power modules, depending on the power level.
Multimodule operation of convertors has the following advantages:
(i) The convertors can be designed in modular fashion, and thus the system power capacity can easily be enlarged by increasing the number of parallel convertors.
(ii) The system reliability is greatly increased.
(iii) With appropriate configuration arrangement and operation management, the overall power-conversion efficiency and the life of convertor can be increased. (iv) With an appropriate phase shift among the switching sequence of convertor modules, the switching ripples of the individual convertor modules cancel each other, greatly reducing the input and output ripple. For a high-performance multimodule parallel convertor system, in addition to good current-sharing properties, good output-voltage-regulating performance is indispensable. During recent years, although research on the multimodule parallel operation for switching-type convertors has been carried out by some authors [2–7, 10–14], dynamic modelling, controller design and implementation for inductor-coupled parallel push–pull convertors with master–slave current-comparing scheme are still seldom performed.
To ensure uniform distribution of stresses, the total load current should be shared equally among the convertors. Many schemes can be used to achieve current sharing. Active current sharing ensures near-perfect current distribu-tion without the disadvantages of the droop method such as degraded output-voltage regulation, requiring voltage references etc. [10]. The active current-sharing scheme of the ‘master–slave’ approach requires a ‘current-sharing bus’ to transfer/share certain common information[11, 12]. The objective of shared information among convertors is to determine the deviation of the individual output current from the desired value. In this paper, a novel master–slave current control of an instantaneous average-current-sharing scheme with a coupled inductor of output filter is presented. The output current of each slave module is compared with that of a master module; the regulated current-error signal is then used to modify the control signal of the respective slave module. If the current controllers in the inner loop are designed properly, each slave convertor current can closely track that of the master convertor in both the transient and static periods. In case the load current harmonics will be reduced, it is desirable to meet the stringent ripple and noise specifications. An efficient secondary LC filter can be The authors are with the Department of Electrical Engineering, National
Taiwan University, Taipei, Taiwan, R.O.C. E-mail: rtchen@ipmc.ee.ntu.edu.tw
rIEE, 2005
IEE Proceedings online no. 20045241 doi:10.1049/ip-epa:20045241
Paper first received 28th November 2004 and in final revised form 2nd March 2005. Originally published online: 20th May 2005
designed to provide good attenuation of the switching ripple, while maintaining adequate stability margins under a wide range of capacitive loadings. The instantaneous current-sharing scheme has very good performance in both current sharing and voltage regulation. However, inter-connections between the convertors are necessary. This limits the flexibility of the multimodule system and degrades the system’s redundancy. Based on the proposed current-control technique, the outer-loop-voltage current-controller can be designed using an equivalent single-module model. Both the current convertor and the voltage controller are designed using the proposed systematic procedures according to the prescribed specifications. Although the multimodule parallel system analysed in this paper is a push–pull convertor, this control method is applicable to any other type of DC–DC convertor. The analytical study is validated for three parallel push–pull convertors. It can be augmented to n models. The simulated and measured results show that good current-sharing and output-voltage-regulating characteristics are obtained by the proposed convertor system.
2 Multimodule convertor with master–slave cur-rent-comparing system
The structures of multimodule parallel convertors have been treated just like two-port network connections in various
papers [2, 5, 10–14]. The circuit characteristics will be limited by the primitive convertor. It causes the damage of circulation current between convertors because of the difference in the convertor parameters and control is then difficult. This paper presents a novel parallel structure with coupled inductors and a common filter. The proposed three-module paralleled push–pull convertor systems is shown in Fig. 1. The energy-storage elements are coupled together. The filter capacitor uses only one component for the three-convertor system. This is the main difference in the power circuit from therein other papers. Further, this paper presents another novel multimodule control scheme with two loops of inner current loop and outer voltage loop. This scheme has still seldom been proposed in other papers.
Figure 1 shows a schematic diagram of a three-module convertor system. The system consists of three push–pull convertor modules in parallel with a common coupled-inductor LC filter and an output-voltage-feedback circuit Gv. Each convertor module contains a power stage, a
pulse-width-modulation (PWM) block, and two feedback circuits: GI, the current sensing network, for the inductor-current feedback and Gv for the capacitor-voltage feedback from
the power stage. Each single module will reserve the original convertor characteristics in Fig. 1. The weight and volume of the parallel system will be reduced by the integrated magnetics and common filter. Another benefit is that the
Vg S1 S2 D1 D2 S3 S4 D3 D4 S5 S6 D5 D6 GI3 PWM3 PWM2 PWM1 GI2 GI1 G V R C L1 L2 L3 −+ − − + + − − + − − + + + 0
coupling circuits identify the parallel branch voltage and current in nature. The disadvantage is reduced flexibility and reliability.
The control structure proposed in Fig. 1 is a master–slave current-comparing scheme. It is different from the master– slave current-sharing scheme in[13]. Master–slave current-sharing circuits with a ‘current share bus’ are needed in that paper. In the absence of this bus, any imbalance in the convertor parameters will cause oscillation interaction and drop-out. The bus power dissipation and circuit complex are its defects. In Fig. 1 the master–slave current-comparing scheme is different from the master–slave current-sharing scheme because of the lack of current-sharing bus. The
inner current loop is sensing from each module inductor and then comparing with each other. The scaling master-module inductor current is directly connected to the PWM control circuit for the inner-current control loop. The output current of each slave module is compared with that of a master module; the regulated-current error signal is then used to modify the control signal of the respective slave module. By designing properly the current controllers in inner loop, one can arrange that each slave convertor current can closely track that of the master convertor in both the transient and static periods.
In the proposed scheme, the outer loop is a voltage-regulation control loop. Generally, the response of the inner Vg∧ d D Vg∧ d D Vg d D vg ∧ + + − − ∧ ∧ d∧ d∧ d∧ GM1 GM2 CI2 GI2 CI1 GI1 C V CI3 GF GM3 GI3 L3 L2 L1 GF GF I L d ∧ ILd ∧ − + + − I L d 1:D 1:D 1:D slave 2 slave 1 master + + − + + + + + + + + + − − + − + 0 0 Rc C R if io∧ GV
current loop is faster than that of the outer voltage loop. For simplicity, the two compensation controllers will be designed separately in Section 3. When the master module breaks down, the slave module works independently with the current inner-loop control itself and the outer voltage-control loop still works normally. Thus, the current-averaging function will lose its effectiveness. This is the defect of the master–slave current-comparing scheme. Fortunately, the currents of the remaining slave modules are still determined by the proposed power circuit. It will maintain the averaging-shunt-current characteristics by way of the common coupled inductor. Another disadvantage of the proposed multimodule system is that the number of modules is limited by the integrated magnetics of the coupled inductors. This is acceptable in the trade off between power capacity and economy.
3 Dynamic modeling of proposed multimodule system
In this Section, a model of a three-parallel-push–pull-convertor system is proposed for the purpose of perfor-mance and controller design. The small-signal model for the three-module parallel-convertor system with master–slave current-comparing scheme is built in Section 3.1, which is used for the open-loop analysis in Section 3.2.
3.1
Small-signal model of the system
The small-signal equivalent circuit is derived using the technique proposed by [3, 4]. By replacing the convertor with the state-averaged PWM switch model and employing the sampled-data mechanism to describe the switching inductor current, we have the small-signal equivalent circuit shown in Fig. 2. The modulator gain (GM) of the PWM block is given by [4], and GF represents the feedforward gain from the input voltage. Then the current-sensing networks are replaced by a single gain block given by GIi,
i¼ 1, 2, 3. Finally the current and voltage controllers are represented by CIiand Cv, respectively.
The disturbance of the small-signal model will take into account:
(i) Input voltage variation ^vg: for current-mode-controlled convertors, the input voltage feedforward is automatically provided and thus the effect of ^vg will be neglected in the current controller design.
(ii) Duty ratio variation ^dk: the control variable ^dkis derived from the three feedback signals ^vR, ^vL, ^iLk, (k¼ 1, 2, 3), which will be referred to as remote voltage, local voltage and inductor current, respectively.
(iii) Output-load current variation ^io: for quantitatively specifying the dynamic response, it is typical to consider the output-voltage response due to a step load-current change.
(iv) Intermodule current variation ^if: the effect of ^if on the output voltage response is quite similar to that of ^io. It follows that ^if is also neglected in the controller design stage.
To characterise the module-failure response system-atically, a transfer function called transimpedance is defined as Ai¼ ^vR=^if, representing the output-voltage response due to the current disturbance coming from the convertor modules. The other closed-loop performances include control-to-output transfer function: Ac ^vR=^d; line-to-out-put transfer function (audiosusceptibility): Ag ^vR=^vg; and output-impedance function: Zo ^vR=^iO.
The principal variables used in this paper are defined in Table 1.
3.2
Open-loop analysis
From the small-signal equivalent circuit of Fig. 2, one can derive the transfer-function block diagram as shown in Fig. 3, i.e. F1ðsÞ ¼ nDð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F2ðsÞ ¼ sLð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F3ðsÞ ¼ sLð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F4ðsÞ ¼ nVgð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F5ðsÞ ¼ð nD RÞ ð1 þ sCRÞ s2LCþ sðL Rþ CRcÞ þ 1 F6ðsÞ ¼ ð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F7ðsÞ ¼ ð1 þ sCRcÞ s2LCþ sðL Rþ CRcÞ þ 1 F8ðsÞ ¼ð nVg R Þ ð1 þ sCRÞ s2LCþ sðL Rþ CRcÞ þ 1 ð1Þ
where Rc is the equivalent series resistance (ESR) of the
capacitor C and L¼ L1//L2//L3.
Suppose that the multimodule convertor system consists of three single identical modules; we then find that
Table 1: Principal symbols used in the paper
Vg steady-state input voltage i^f intermodule current variation Rc equivalent series resistance (ESR) of the capacitor
^
vg input-voltage variation v^c control-current signal fs switching frequency Ts¼ 1/fs ^
vR output-voltage variation D duty ratio GM gain of the modulator GM¼ 1/(mcSnTs)
^
iL inductor-current variation n turns ratio of the output transformer Sn sensed ramp Sn¼ n2k (1D) VgRi/L ^
io output-current variation k turns ratio of the current sensor Se external stabilisation ramp ^
d duty-ratio variation Ri resistance used to translate the sensed current to voltage signal
mc degree of the slope compensation
F5¼ F9¼ F13, F6¼ F10¼ F14, F7¼ F11¼ F15and F8¼ F12¼
F16. For convenience in controller design, the interesting
transfer function of the block diagram in Fig. 3 can be derived by Manson’s formula. First, one can find eight loops in Fig. 3, i.e.
P1¼ F4GvCvGM1 P2¼ F4GvCvGM2 P3¼ F4GvCvGM3 P4¼ F8GI1CI1GM1 P5¼ F12GI2CI2GM2 P6¼ F16GI3CI3GM3 P7¼ F4GvCvGM1F8GI1CI2GM2 P8¼ F4GvCvGM1F8GI1CI3GM3 ð2Þ F1 F2 F3 F4 F5 F6 GF F7 F8 F10 F9 F11 F12 F13 F14 F16 GM3 CI3 GI3 CI2 GI2 CI1 GI1 GM2 GM1 F15 GV CV 0 0 + + + ++ + + + + + + + + + + + + − + + + + + + − + + + + + + + − + + + − ∧ iL3 ∧ iL2 ∧ iL1 ∧ ∧ VR d ∧ io ∧ if vg
Then, from Fig. 3, the relationship of loops may be defined by Manson’s formula as the polynomials
XðSÞ 1 X 8 j¼1 Pjþ ðP1P5þ P1P6þ P2P4þ P2P6 þ P3P4þ P3P5þ P4P5þ P4P6þ P5P6 þ P5P8þ P6P7Þ ðP1P5P6þ P2P4P6 þ P3P4P5þ P4P5P6þ P5P6P8Þ ð3Þ YðSÞ 1 X 6 j¼4 Pjþ ðP4P5þ P4P6þ P5P6Þ ðP4P5P6Þ ð4Þ
Thus, from the previous definition we can derive the transfer functions Ac, Ag, Aiand Zoas follows:
Ac ^vR ^ d ^vg¼ ^io¼ ^if ¼ 0 ¼F4YðSÞ XðSÞ ð5Þ Ag¼ ^ vR ^vg ^ d¼ ^io¼ ^if ¼ 0 ¼F1YðSÞ XðSÞ ð6Þ Zo¼ ^ vR ^io ^ vg¼ ^d¼ ^if ¼ 0 ¼F3YðSÞ XðSÞ ð7Þ Ai¼ ^vR ^if ^vg¼ ^io¼ ^d¼ 0 ¼F2YðSÞ XðSÞ ð8Þ
4 Multimodule operation of proposed system From previous analysis, Ac, Ag, Aiand Zoare all sixth-order
transfer functions. To simplify the controller design, model reduction is indispensable. It is known that the frequency-domain characteristics of PWM are dependent on the degree of slope compensation mc, as indicated in Table 1[3].
By selecting the value of mc properly, one can much
enhance the operating stability of the convertor system. In this paper, the concept of dominant energy mode proposed in[8]is used to determine the slope compensation and used to find the reduced models of the convertor. Detailed derivation of the model reduction by power decomposition can be referred to in[8]; only a brief description is included in the Appendix (Section 9). The results show that Ac, Ag, Ai
and Zocan be approximated by first-order models for the
proper selection of mc. The Bode plots of these transfer
functions also confirm these characteristics at low frequencies. In Section 4.1 and 4.2 a controller of reduced model without and with on inner-loop current loop is built. In Section 4.3, an input-voltage feedforward controller is discussed.
4.1
Module-parallel-without-inner-loop
current control
The circuit configuration of the parallel-convertor system, which consists of N models, is shown in Fig. 2, where the control voltage ve generated from a voltage controller is
common for all modules. Since the effect of input-voltage variation ^vgis much smaller than that of the output current ^io, it is neglected in the controller design introduced here. Accordingly, a transfer-function block diagram is drawn in Fig. 4 from Fig. 3 where Cvis a voltage feedback controller.
The current-sharing property is described as follows. Suppose convertor 1 in Fig. 2 is regarded as the master convertor; the current ratio of the ith slave module to the
master module can be found as kli ^iLi ^iL1 ¼Gmi Gm1 ¼ 1 DGmi Gm1 i¼ 2; 3; . . . ; N ð9Þ where Gmi Gm1þ DGmi is assumed and DGmi denotes the mismatch between Gm1 and Gmi. The ratio of current-sharing mismatch between the ith slave module and the master module to the total current can further be found to be kTi¼ ð^iLi ^iL1Þ PN i¼1 iLi ¼ DGmi PN i¼1 Gmi ð10Þ
If only two modules are parallel and DGm2is within710% of Gm1due to the variations of capacitor C, then from (10) the maximum value of kT2is 5.26%. In practice, this is in
the acceptable range. The maximum value of kTi,
i¼ 2, 3, y, N will be decreased as the number of paralleled convertors is increased.
The controller Cvshown in Fig. 4 is the PI controller
CvðsÞ ¼
kPsþ kI s
The closed-loop transfer function of ^vRto ^iois derived from Fig. 4 as ZcðsÞ ^ vR ^io ¼ F3 1þ GvCvF4ðGm1þ Gm2þ ::: þ GmnÞ ð11Þ For evaluating the regulating performance, according to (11) and the prescribed specifications, the parameters kpand
kIof the voltage controller Cvcan be found by numerical
computation. + + + + + GV CV F3 0 Gmn.F4 Gm2.F4 Gm1.F4 iLn iL2 iL1 − vR io ∧ ∧
Fig. 4 Closed-loop transfer-function block diagram for n parallel convertors without current control
CTI iLi F12 GMi GLi CLi GI1 iL1 F8 GM1 + −
Fig. 5 Closed-loop transfer-function block diagram for any i¼ 2, 3, y, n parallel-convertor system with current control
4.2
Module-parallel-with-inner-loop
current control
To achieve more accurate dynamic current-sharing char-acteristics, an average current-control technique is proposed in Fig. 5, where CIi, i¼ 2, 3, y, N are the current controllers
for the ith slave module. The average current for each module is obtained by coupling the inductor current and filtering by the lowpass filter GIi. The error of average
currents of the ith slave module and master module is regulated through the current controller CIi, and the resulted
signal is augmented to the control signal ^vc, which is then sent to adjust the output current of the ith slave module. The effect of input-voltage variation ^vg is also neglected here.
Since the response speed of the inner current loop is much faster than that of the outer voltage loop, the outer loop is neglected in the design stage of current controller CIi.
The design of CIi, PI controller can be treated as the
tracking problem. From Fig. 5 one can derive the ratio of these two currents as
k1i ^iLi ^iL1 CIiGMiGI1F8 1þ CIiGMiGIiF8 i¼ 2; 3; . . . ; N ð12Þ where the transfer functions F8¼ F12¼ F16¼ y for each
slave module.
By specifying the desired response CIiðsÞ ¼
kpisþ kIi s
can be found, and then kpiand kIi, i¼ 2, 3, y, N are all
successfully designed.
4.3
Consideration of the input voltage
feed-forward controller
Generally, complete elimination of the effect of input-voltage variation under various operating conditions is impossible, although the effect of input-voltage variation on the output voltage is much smaller than that of load current and it is neglected in the design of feedback controllers. The feedforward controller GF shown in Fig. 3 can be augmented to reduce its effect. Since GM1’ GM2 ’
. . .’ GMn, if all the inner-loop current controllers are properly designed, the controller GFcan be found[9]to be
GF ¼ M=GM1 ð13Þ
where M is the convertor gain and GM1 is the
master-modulator gain.
5 Design of proposed parallel convertor system A prototype of the three-module parallel push–pull convertor has been built to verify the theoretical results. The power-circuit specifications are designed in Section 5.1. Then Section 5.2 proposes a reduced model with and without inner-loop current control. Based on the reduced model, a PI controller is designed quantitatively according to the prescribed regulating specifications.
1K Ω 18K Ω 10 Ω 3K Ω 20Ω 10 Ω 10 Ω 10 Ω 8V 8V Q1 Q 2 D1 D2 VS Cr Rr 15 10 8 9 7 6 5 2 1 12 16 14 11 4 L1 200 / 2W 100 pF 0.022 µF 65K Ω 0.01µF sync COMP E / A− E / A+ Vref IUM / SFT ST B OUT ground shut down UC3846 AOUT -ISENSE 3 +ISENSE Vin 13Vc 20K Ω Vci 0.01µF 0.01µF ZENER 3 ZENER 3 0.01 µF V ref 0.01µF Ve1 VR 1 IRF 740 IRF 740 average current controller iL1 precision rectifier circuit Lexcert 10 µF +48V Lcouple 0.1µF 10k Ω 2 µF 10K Ω 40KΩ voltage controller RL 1100 µF diode Schottky diode Schottky TRANS1 48/24 TRANS1 48 / 24 a b coupled inductor
Applying the model-reduction technique proposed in[8], the reduced models at the nominal case can be found. MATLAB Simulinks are used to verify the results. The simulated results indicate that the unit-step responses of the reduced models are very close to that of the actual sixth-order transfer functions.
5.1
Power circuit
The push–pull convertor is adopted in this paper to study the modelling and controller design of a multimodule parallel-convertor system, as shown in Fig. 1. The single-module circuit configuration of the proposed convertor is shown in Fig. 6. All the magnetic components are integrated in a single core, giving a smaller size, weight and lower core losses. This topology also provides a built-in input filter, and thus a smooth input current. The integrated
circuit UC3846 is used for the PWM controller. The sensed inductor current is added with a stabilising current ramp for slope compensation. This compensated current is then compared with the regulated voltage-error signal to perform the master–slave current-comparing control.
The three-module push–pull convertor system was implemented as shown in Fig. 1, with one module output power Po¼ 80 W and switching frequency fs¼ 120 kHz.
The power stage consists of the following components; switches S1–S6: power MOSFET’s IRF 740; parallel
switch diodes: HFA08TB60; diodes D1–D6: HFA15TB40;
coupling inductor L1¼ L2¼ L3¼ 120 mH; core: TDK EI
35; each transformer Np1¼ Np2¼ 48 turns; Ns1¼ Ns2¼
24 turns; NL1¼ NL2¼ NL3¼ 18 turns; load R: 5 O; and
output capacitor C: 1100 mF. The other parameters of the experimental three-module parallel-convertor system are
10 Ω 1k Ω 1k Ω 1k Ω 1k Ω 1k Ω a b a C b 7k Ω R4 R5 3k Ω 2k Ω 2k Ω 3k Ω C2 2K Ω Ve trans1 + − + − 1N4148 1N4148 opamp opamp Rf Cf 10k Ω iLi 1000 pF 10k Ω 10k Ω iL1 iLi 10k Ω 10k Ω + − + − + − + − + − + −
opamp opamp opamp
R1 R2 VRi 10k Ω 10k Ω 10k Ω 10kΩ 10k Ω Vci Vci 10k Ω 10k Ω 10k Ω 10k Ω opamp opamp opamp Vref VRi c Fig. 7 Implement circuits
a Precision rectifier circuit b Current controller c Voltage controller
listed below for later analyses:
Vg¼ 48 V ; Vo ¼ 5 V ; D ¼ 0:3; mc¼ 10; Rc¼ 0:12 O Thus, from (1) we can derive that
F1¼ 0:15ð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F2¼ 40 106sð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F3¼ 40 106sð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F4¼ 24ð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F5¼ 0:03ð1 þ 16:5 103sÞ 0:132 106s2þ 140 106sþ 1 F6¼ ð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F7¼ ð1 þ 132 106sÞ 0:132 106s2þ 140 106sþ 1 F8¼ 4:8ð1 þ 16:5 10 3sÞ 0:132 106s2þ 140 106sþ 1 ð14Þ
and the useful transfer functions (5)–(8) are as follows:
Ac¼ ð5:512 1017s5þ 3:8 102s4þ 2:59 1011s3 þ1:995 1015s2þ 1:51 1019sþ 9:01 1020Þ ð2:3 1021s6þ 2:93 1015s5þ 3:052 108s4 þ3:752 1021s3þ 0:2886 1026s2 þ3:459 1027sþ 1:044 1029Þ Ag¼ ð9:5 107s5þ 4:36 107s4þ 1:5 1020s3 þ2:282 1024s2þ 8:75 1027sþ 5:22 1029Þ ð2:3 1021s6þ 2:93 1015s5þ 3:052 108s4 þ3:752 1021s3þ 0:2886 1026s2 þ3:459 1027sþ 1:044 1029Þ Zo¼ ð6:33 108s5þ 4:307 105s4 3:646 1010s3 6:631 1014s2 2:54 1018s 1:516 1020Þ ð2:3 1021s6þ 2:93 1015s5þ 3:052 108s4 þ3:752 1021s3þ 0:2886 1026s2 þ3:459 1027sþ 1:044 1029Þ Ai¼ ð6:33 108s5þ 4:307 105s4 3:646 1010s3 6:631 1014s2 2:54 1018s 1:516 1020Þ ð2:3 1021s6þ 2:93 1015s5þ 3:052 108s4 þ3:752 1021s3þ 0:2886 1026s2 þ3:459 1027sþ 1:044 1029Þ ð15Þ
5.2
Controller design
The implemented configuration of the controller is shown in Fig. 7. The load current of each module is sensed and scaled by a precision rectifier circuit, as shown in Fig. 7a. The average-current controller is sketched in Fig. 7b. The output current of each slave module is compared with that of a master module; the regulated current error signal is then used to modify the control signal of the respective slave module. The outer-loop voltage controller shown in Fig. 7c is used for achieving output-voltage-regulating characteristics.
4.8(1 + 16.5 × 10−3) 140 × 10−6S + 1 kp2s + kI2 S 4.8(1 + 1.65 × 10 ) 140 × 10−6S + 1 R 0 5.737 × 108 5.737 × 108 + + − + 1 1 ∧ i L2 ∧ i L1
Fig. 8 Two-module block diagram for implementing a reduced model with inner current loop
vR kps + kI s 0.5332 s + 62 310 s + 62 ∧ io ∧ + − + − 0
Fig. 9 Block diagram for implementing a reduced model without inner current loop
The model reduction is performed using the concept of dominant energy mode. Based on the reduced convertor model, a PI controller is designed quantitatively according to the prescribed regulating specification. The two-module block diagrams of the reduced model with and without inner-loop current loop are shown in Figs. 8 and 9, respectively. It is assumed that the mismatch between the current-tracking responses is
DGm¼ 0:1Gm1 ð16Þ
and the desired response time of the current-tracking response is tre¼ 0.1 ms. Following the design method
introduced in Section 4, the parameters of the current controller CI2can be found as kp2¼ 1, kI2¼ 5000.
The current controller having been designed, the specifications of unit-step response for designing the voltage controller Cv are prescribed as response time tre¼ 0.4 ms
and maximum dip of output voltage Vm¼ 0.022 V.
Following the design method described in Section 4, the parameters of the voltage controller Cv are obtained as
kp¼ 68, kI¼ 53 720.
5.3
Simulation results
The proposed system closed-loop characteristics are decided by the transfer function Ac, Ai, Agand Zo. Its Bode plots are
shown in Fig. 10. At low frequencies, the remote loop is dominant, as seen previously. At high frequencies, the current loop is dominant, thus realising the full benefits of current-mode control.
From Fig. 8, the simulated responses of ^iL2=^iL1shown in
Fig. 12 indicate that the given tracking characteristics are exactly satisfied. The simulated responses due to step-load current change (1 A to 3 A) plotted in Figs. 11 and 12 show that good current tracking performance is obtained and the voltage-regulating response satisfies the prescribed specifica-tions.
The nominal load resistance is used to design the controller GF. When the convertor is operated at 90%
rated load, the simulated output voltage and current responses without adding the feedforward controller due to the 10% input-voltage variation are shown in Fig. 13. The results show that the variations in the output-voltage and current-sharing characteristics are small. If further improvement is needed, the feedforward controller is designed to be GF¼ 0.302. The simulated results shown
in Fig. 14 indicate that significant improvements in the input-voltage-rejection characteristics have been achieved.
6 Experiment results
The three-module push–pull convertor system was imple-mented to verify the master–slave current-comparing scheme. Having confirmed the effectiveness of the proposed system, we implemented the circuit designed current and voltage controllers as shown in Fig. 6. The power-circuit operation under normal conditions and each gate-signal 0 50 0 100 200 transfer function mag, dB phase −50 −100 −150 10−1 100 101 102 103 104 105 Ag Zo Zo Ac Ac Ag −100 w, rad/s
Fig. 10 Bode plots of the transfer functions Ac, Agand Zo(¼ Ai)
of the proposed system
1.0 2.0 0.3 0.2 0.1 0 −0.1 −0.2 −0.3 −0.4 −0.5 step responses, V , A 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 time, s iL1 iL2 iL3 vo × 10−4
Fig. 11 Simulated inductor currents and output-voltage-regulating characteristics 0 1 2 3 4 5 6 7 8 9 10 − 4 −3 −2 −1 0 1 2 3 vo iL1 iL2 iL3 vg responses, V, A time, s × 10−4
Fig. 12 Simulated current- and voltage-tracking responses
2 −2 −4 −6 −8 0 0 5 10 15 −5 response, V response, A x10−2 x10−2 x10−4 0 1 2 3 4 5 6 7 8 9 time, s iL1 iL2 iL3 vR
Fig. 13 Simulated closed-loop responses without feedforward controller
experimental waveforms are shown in Fig. 15. We can see that the three modules operated in different duty times while sharing the whole switching cycle. The three modules work together to share the average load current. The experimental inductor voltages of the three modules are shown in Fig. 16. The three voltage waveforms are almost the same because of the coupled circuit.
In Fig. 17, we assumed that the three parallel convertors were normally operated, and the dynamic responses of convertor currents and output voltage were due to the step load-current change (4 A to 6 A). The voltage response obtained is very close to the simulated results shown in
Fig. 11. The dynamic responses of convertor output currents and output voltage plotted in Fig. 18 occur when under steady-state conditions with Io¼ 6 A: the operation
2 −2 −4 −6 −8 0 0 −10 −15 −20 −5 response, V response, A x10 x10−2 x10− 4 0 1 2 3 4 5 6 7 8 9 time, s iL1 iL2 iL3 vR
Fig. 14 Simulated closed-loop responses with feedward controller
CH4=5V DC 1:1 CH3=5V DC 1:1 CH2=5V DC 1:1 Vgs1 Vgs3 Vgs5 20µs/division CH2= 5V DC 1:1 CH2= 5V DC 1:1 CH3= 5V DC 1:1 5V/division
Fig. 15 Experimental gate signals of the three-module system: master: Vgs1; slave1;Vgs3; slave2:Vgs5
vL1(t)
vL2(t)
vL3(t)
50V/division 50µs/division
Fig. 16 Experimental coupled inductor-voltage waveforms; mas-ter: VL1ðtÞ; slave1:VL2ðtÞ; slave2:VL3ðtÞ
500mV/division 100µs/division vR iL1 iL2 iL3
Fig. 17 Measured dynamic-regulation response (step-load change 4 A to 6 A) of the output voltage (vR) and inductor current (iL1, iL2,
iL3) Vo ∧ io3 io2 io1 2A 2A 2A 2A /division 3A 3A 0A a Vo ∧ io3 io2 io1 2A 2A 2A 3A 3A 0A b 50µs/division 2A /division 50µs/division
Fig. 18 Measured dynamic responses of the convertor output currents and output voltage
a Module 3 is suddenly terminated its operation b Module 3 is suddenly restored
of one module is suddenly terminated and then restored. The good performances obtained using the proposed controller are verified by the results. The responses of output voltage due to input-voltage variation without and with feedforward compensator GF are shown in Fig. 19.
The effectiveness of augmenting the feedforward compen-sator is obvious from the results. It is clear that the controller gives good intermodule disturbance-rejection characteristics. In addition, the proposed current-average-sharing schemes of the system are also excellent.
7 Conclusions
The analysis, design and implementation of the three-module parallel push–pull convertor have been presented. A three-module control strategy for the multimodule convertor system with a secondary coupled-inductor output filter is developed. By properly selection of the degree of slope compensation of the current-mode control mechanism, the transfer functions of the convertor can be approximated very well by the first-order reduced models. The selection of slope compensation and the model simplification are carried out easily and intuitively by using the dominant-energy-mode-analysis approach. The reduced models having been found, a design technique
has been developed to find the controller parameters. A novel master–slave current-comparing control tech-nique is proposed to yield good dynamic and static current-sharing characteristics. The simulated and experi-mental results show that good current-sharing and out-put voltage-regulating performances are achieved by the parallel-convertor system controlled by the proposed controller.
8 References
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9 Appendix: Introduction to model reduction by power decomposition
By partial-fraction expansion, the plant of an nth-order transfer function G(s) can be expressed as
GðsÞ ¼MðsÞ DðsÞ ¼ m0þ m1sþ þ mn1sn1 d0þ d1sþ þ dnsn ¼X n i¼1 bi sþ ai ð17Þ
For white-noise input with the variance s2
w, the covariance of the output can be found as[8]
sðtÞ ¼ s2w Xn j¼1 eajt X n i¼1 bibj ðaiþ ajÞ ( ) ð18Þ and let sj¼ s2w Xn i¼1 bibj ðaiþ ajÞ ð19Þ sðtÞ ¼X n j¼1 sj eajt ð20Þ vg ∧ vg ∧ vo ∧ vo ∧ 1V/division 50µs/division 1V/division 50µs/division a b
Fig. 19 Measured output-voltage waveform due to varying input voltage
a Without feedforward convertor b With feedforward convertor
The energy contribution corresponding to the pole aj is defined as
ej¼ sj
sð0Þ ð21Þ
Then the dispersion ej can be used as a measurement for the relative importance of each pole of the system. Thus, we can find the dominant pole of the system for model reduction.
