A Novel Control Strategy of Circulating Currents in
Paralleled Single-Phase Boost Converters With
Different Power Sharing for Microgrid Applications
Yi-Hung Liao, Member, IEEE, Hung-Chi Chen, Member, IEEE, Hsiu-Che Cheng,
Yu-Lung Ke, Senior Member, IEEE, and Yi-Ta Li
Abstract—In this paper, analysis of circulating currents of par-alleled single-phase boost converter systems is presented. The dc loop and ac loop circulating currents are clearly explained. In order to eliminate the dc loop circulating currents and reduce switching losses, a simplified pulsewidth modulation strategy is adopted in a paralleled single-phase boost converter. Based on the analysis of circulating currents, common-mode circulating current (CMCC) and differential-mode circulating current (DMCC) are defined. Then, CMCC and DMCC compensators are proposed in a centralized control scheme to reduce the common-mode and differential-mode circulating currents in a parallel system oper-ated in both rectifier and inverter modes with different power sharing for microgrid applications. Converter-paralleled system stability analysis is also presented. Finally, a prototype system is constructed to facilitate the theoretical results as verification. From the experimental results, the proposed control scheme can indeed reduce the circulating currents under equal and/or differ-ent power rating conditions in the parallel system.
Index Terms—AC/DC converter, circulating currents, common mode, differential mode, microgrid.
I. INTRODUCTION
R
ENEWABLE energy processes require high-power con-verter systems built with a parallel structure [1], [2], [4], [5]. The modularized ac–dc converter with parallel structure to increase system capacity is shown in Fig. 1. The literature [3]–[5] discussed that paralleling converters is more desirable than paralleling the active switch devices. However, since the converters are usually designed individually, the circulating currents problem arises when they are operated in parallel [1], [6]–[9]. The circulating currents result in line-current distortionManuscript received January 24, 2013; revised June 1, 2013; accepted July 1, 2013. Date of publication November 8, 2013; date of current version March 17, 2014. Paper 2012-ESC-750.R1, presented at the 2013 IEEE/IAS Industrial and Commercial Power Systems Technical Conference, Stone Mountain, GA, USA, April 30–May 3, and approved for publication in the IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS by the Energy Systems Committee of the IEEE Industry Applications Society. This work was supported by the National Science Council of Taiwan under Grant NSC 102-2221-E-346-002 and Grant NSC 103-ET-E-346-001–ET.
Y.-H. Liao and Y.-L. Ke are with the Department of Electrical Engineering, National Penghu University of Science and Technology, Magong City 880, Taiwan (e-mail: [email protected]).
H.-C. Chen is with the Department of Electrical and Control, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: [email protected]).
H.-C. Cheng is with the Institute of Electrical Control Engineering, National Chiao Tung University, Hsinchu 300, Taiwan.
Y.-T. Li is with the National Synchrotron Radiation Research Center, Hsinchu 30076, Taiwan (e-mail: [email protected]).
Digital Object Identifier 10.1109/TIA.2013.2289995
Fig. 1. Modularized ac–dc converter with paralleled structure in the microgrid system.
and unbalanced load sharing. The overall system performance will be degraded.
Traditionally, the isolation approach is a simple method to prevent circulating currents. For example, adopting separate dc or ac sources [1], [10] or an isolation transformer at the ac grid [11], [12]. In such a method, the overall parallel system is expensive and bulky, making this approach impractical. In addition to the isolation approach, there are other methods to deal with the circulating-current problem in the converter-paralleled system. For example, an interphase reactor is utilized to provide high impedance [13], [14] to reduce the circulating current. However, the reactor cannot provide high impedance at low frequency, so that the low-frequency circulating currents cannot be reduced. A space-vector modulation without using zero vectors is used to eliminate the pure zero-sequence current for parallel operation [22]. Furthermore, a new control variable [7] to adjust the zero-vector duration is proposed to suppress circulating currents. However, only dc loop circulating currents are considered, and ac loop circulating currents still exist. A synchronized control scheme has been also used to reduce the circulating currents. This approach basically treats paralleled converters as one converter [12], [15]–[19]. When more con-verters are connected in parallel, the system becomes complex and is usually difficult to design, particularly when different kinds of converters are used.
Until now, most of the discussions focused on the equal power rating condition [1]–[3], where each converter in the parallel system operates with the same output power. In [20], a coordinate control scheme considering different power rating conditions was proposed. Table I shows the categorization of equal/different power rating conditions in the existing literature. 0093-9994 © 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
Fig. 2. Single-phase bidirectional boost converter. TABLE II
SWITCHINGCOMBINATION OF ASINGLE-PHASEBIDIRECTIONAL
BOOSTCONVERTEROPERATED IN THERECTIFIERMODE
TABLE III
SWITCHINGCOMBINATION OF ASINGLE-PHASEBIDIRECTIONAL
BOOSTCONVERTEROPERATED IN THEINVERTERMODE
II. CIRCULATINGCURRENTS OFPARALLELSYSTEMS
A. Single-Phase Boost Converter Operation
A single-phase boost converter is shown in Fig. 2. In order to reduce circulating-current loops in the parallel system, a simplified pulsewidth modulation (PWM) strategy is adopted in each converter. The simplified PWM switching combination is shown in Tables II and III corresponding to the rectifier and inverter modes, respectively. To achieve power factor correction, one can choose some available current increasing/ decreasing statuses for the input inductors during grid voltage
vs> 0 or vs< 0.
B. DC and AC Circulating-Current Loops
In order to understand the circulating-current problem, con-sider two paralleled single-phase boost converters, as shown in
Fig. 3. Two paralleled single-phase bidirectional boost converters with induc-tors at each phase in each converter.
Fig. 3, with line inductors at each phase in each converter. When the switches TA1+, TB1+, TA2+, and TB2−are turned on, one can find that two different kinds of circulating-current loops exist, i.e., dc and ac circulating-current loops. In this condition, the dc and ac circulating-current loops are described as follows:
dc loop : Vdc+→ TB1+→ B1→ vs−→ B2→ TB2−→ Vdc−
ac loop : vs+→ A2→ TA2+→ Vdc+→ TB1+→ B1→ vs− where the dc circulating-current loop is defined as the current loop caused by the output voltage Vdcwithout passing through Vs. The ac circulating-current loop is defined as the current loop caused by the input voltage Vs without passing through Vdc.
Both the dc and ac circulating-current loops are undesired loops in the paralleled converter system. The switching constraint method [21] is proposed to eliminate the dc circulating-current loop and provide control for the ac circulating-current loop to prevent circulating currents. However, the switching constraint method only takes effect under the equal power rating condi-tion. If the paralleled converters are operated under different power rating distributions, the switching constraint method is not valid for preventing circulating currents.
This paper presents a novel common-mode and differential-mode circulating-current control strategy. The proposed control strategy can reduce the circulating currents in a paralleled converter system regardless whether the system is operated in equal power rating or different power rating conditions.
III. PROPOSEDCONTROLSCHEME
The circulating current can be divided into two different com-ponents, i.e., common-mode and differential-mode circulating currents. The common-mode circulating current is defined as the difference between leg A and leg B line currents in the individual converter as follows:
Fig. 4. Two paralleled single-phase boost converters operated in status (A, E).
Next, the differential-mode circulating current idmcc_jm is defined as the difference of line currents connected to leg A between the jth converter and the mth converter, i.e.,
idmcc_jm= σmiLja− σjiLma
j, m∈ {1, 2, 3, . . . , n}, j = m (2)
where σx is the distribution factor (0≤ σx≤ 1) and is defined as σx= Px n k=1 Pk = Px Ptotal x∈ {1, 2, 3, . . . , n} (3)
where Ptotal is the total output power of the parallel system,
and Pxis the output power of the xth converter.
A common-mode controller and a differential-mode con-troller are proposed based on the common-mode and differential-mode circulating currents as follows.
A. Common-Mode Controller
A simple explanation is given to explain how to eliminate the common-mode circulating currents as follows. The paralleled system is operated in status (A, E), as shown in Fig. 4. The common-mode circulating current icmcc_1< 0 due to iL1a<
iL1b. To reduce the common-mode circulating current in con-verter 1, the switching signals of concon-verter 1 are changed from status A to status B, which makes the common-mode circulating current direction in the ac loop change from coun-terclockwise to clockwise, as shown in Fig. 5. The switching signals that reduce the common-mode circulating currents are summarized in Tables IV and V.
The common-mode circulating-current (CMCC) controller is proposed to adjust the line current in each converter in the parallel system. The CMCC control scheme in the parallel
Fig. 5. Two paralleled single-phase boost converters operated in status (B, E).
TABLE IV
SWITCHINGSIGNALSCORRESPONDING TODIFFERENTKINDS OF
COMMON-MODECIRCULATING-CURRENTCONDITIONS IN
PARALLELSYSTEMOPERATED INRECTIFIERMODE
TABLE V
SWITCHINGSIGNALSCORRESPONDING TODIFFERENTKINDS OF
COMMON-MODECIRCULATING-CURRENTCONDITIONS IN
PARALLELSYSTEMOPERATED ININVERTERMODE
converter system is shown in Fig. 6. The detailed switching signal generator block diagram is shown in Fig. 7, and the CMCC controller is shown in Fig. 8.
Signal CCRSx behavior corresponding to vsduring a cycle period is shown in Fig. 9. The CMCC controller makes the signal CCRSx to be 1 at most of the time in the vs> 0 period and 0 at most of the time in the vs< 0 period. The controller allows the CCRSx signal to become 0 at the vs> 0 period to cancel the common-mode circulating current. It also allows the
CCRSx signal to become 1 at the vs< 0 period to cancel the common-mode circulating current.
Fig. 6. Control scheme of the CMCC controller in the parallel converter system.
Fig. 7. Detailed subblock diagram of the switching signal generator.
Fig. 8. Construction of CMCC controller.
B. Differential-Mode Controller
Due to different paralleled converter switching timing, the differential-mode circulating currents will exist leading to un-balanced load sharing. A centralized controller scheme is de-veloped to deal with this problem. The centralized controller is easily constructed based on the proposed CMCC controller, as shown in Figs. 10 and 11.
In the centralized control scheme, a voltage controller is used (see Fig. 10), and the current command IL generated by the voltage controller is sent to the current controller modules
Fig. 9. Behavior of signal CCRSx corresponding to Vs.
Fig. 10. Centralized control scheme of the parallel system.
of each converter. By utilizing the distribution factor σx (0≤
σx≤ 1) defined in (3), the current sharing can be easily ob-tained by multiplying the current command ILand distribution factor σx, as shown in Fig. 11.
Although the power ratings of the two converters in the paral-lel system are not the same, the common-mode and differential-mode circulating currents will be simultaneously reduced in the proposed circulating-current control strategy.
Fig. 11. Construction of DMCC and CMCC controller of each converter in the parallel system.
Fig. 12. Two paralleled converter system.
C. Stability Analysis
In order to understand the influence of circulating currents on the converter-paralleled system, consider the model for one converter.
1) Modeling of a Single-Phase Bidirectional Boost Con-verter: From the simplified PWM and switching combination
as listed in Tables II and III, the ac line current of a single-phase bidirectional boost converter is controlled in the charge and discharge statuses. Using Kirchhoff’s voltage law in Fig. 2, one can obtain two equations corresponding to the charge and discharge statuses as follows:
vs= La d dtiL+ RaiL+ Vo+ Lb d dtiL+ RbiL (4) vs= La d dtiL+ RaiL+ 0 + Lb d dtiL+ RbiL (5)
where Lj and Rj are the inductance and equivalent series resistances (ESRs) of the jth leg in the converter, respectively.
j∈ {a, b}. Assume D is the duty-ratio function of the active
switch for adjusting the inductor charge and discharge status. By introducing the space averaged technique, the state-space averaged equation for a single-phase bidirectional boost converter can be derived as follows:
vs= (pLa+ Ra)iL+ (pLb+ Rb)iL+ DVo (6) where p is the differentiation operator.
2) Stability of the Paralleled System: For simplification,
consider the block diagram of two paralleled converters, as shown in Fig. 12. Assume that each converter is well-designed, and the inductance with the ESR of each converter is the same. According to the aforementioned single-phase boost converter
model, one can express the state-averaged equations for con-verters 1 and 2, respectively, as follows:
vs= (pLa+ Ra)iL1+ (pLb+ Rb)iL1+ D1Vo (7)
vs= (pLa+ Ra)iL2+ (pLb+ Rb)iL2+ D2Vo. (8) The definition of the circulating current [20] states that one can obtain the circulating current of the kth converter as the difference between the actual current and the assigned current reference as follows:
Ck≡ iLk− σkIL. (9) From the circulating current definition (9) and (7) and (8), the following circulating current model for converter 1 can be derived, i.e., C1≡ (1 − 2σ1) vs p(La+ Lb) + Ra+ Rb +Vo[D2σ1− D1(1− σ1)] p(La+ Lb) + Ra+ Rb . (10) It follows from (10) that one can find that, when two paral-leled converter system are operated at equal rating conditions, only the dc link voltage Vocontributes to the circulating cur-rents. If the two paralleled converter systems are operated at different power rating conditions, both the ac grid voltage Vs and the dc link voltage Vocontribute to the circulating currents. In this case, the system stability problem may occur, and the stability is determined by the pole p =−(Ra+ Rb)/(La+
Lb) of the circulating-current system. Therefore, when the ESR (Ra+ Rb) is decreased, the stability margin of the paralleled system is decreased. The lowest stability margin occurs when the ESR (Ra+ Rb) is equal to zero. Under this condition, the paralleled converter system easily descends into oscillation by external disturbances, which come from the ac grid voltage Vs and/or dc link voltage Vo. Fortunately, ESR always exists in the connective transmission line. Thus, the pole of the circulating-current system lies inside the left half s-plane and the stability of the paralleled system due to the circulating current is confirmed.
IV. EXPERIMENTALRESULTS
To verify the validity of the proposed method, a prototype of the paralleled system was constructed. The parallel system was tested under different power rating conditions as follows:
Fig. 13. Measured waveforms without circulating current control of the parallel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a [gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
(a) without circulating current control; (b) with switching con-straint control in the parallel system; and (c) with proposed common-mode and differential-mode control schemes corre-sponding to the function block, as shown in Fig. 11. The implementation parameters for the parallel system are listed in Table VI.
Figs. 13 and 14 show the experimental results without cir-culating current control under different power rating condi-tions operated in rectifier mode. The measured waveforms of grid voltage Vs, line currents (iL1a, iL1b), and corresponding common-mode circulating current icmcc_1 of converter 1 are
shown in Fig. 13. In addition, the measured waveform of grid voltage Vs, line currents (iL1a, iL2a) and corresponding differential-mode circulating current idmcc_12 are shown in
Fig. 14. From Figs. 13 and 14 one can find that prominent common-mode and differential-mode circulating currents exist in the parallel system operated in rectifier mode.
Figs. 15 and 16 show the experimental results with the switching constraint method under different power rating con-ditions operated in rectifier mode. The measured waveforms of grid voltage Vs, line currents (iL1a, iL1b), and the correspond-ing common-mode circulatcorrespond-ing current icmcc_1 of converter 1
are shown in Fig. 15. In addition, the measured waveform of grid voltage Vs, line currents (iL1a, iL2a), and corresponding
Fig. 14. Measured waveforms without circulating current control of the parallel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a [gray], and iL2a [black]. Bottom: differential-mode circulating current idmcc_12).
Fig. 15. Measured waveforms with switching constraint method of the par-allel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a [gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
Fig. 16. Measured waveforms with switching constraint method of the paral-lel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a[gray], and iL2a[black]. Bottom: differential-mode circulating current idmcc_12).
differential-mode circulating current idmcc_12 are shown in
Fig. 16. From Figs. 15 and 16 one can find that, although the differential-mode circulating current is close to zero due to the switching constraint method, common-mode circulating currents still exist in the parallel system. This implies that
Fig. 17. Measured waveforms with proposed circulating current control scheme of the parallel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a[gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
Fig. 18. Measured waveforms with proposed circulating current control scheme of the parallel system in different power rating conditions operated in rectifier mode. (Top: input voltage Vs, input line current iL1a[gray], and iL2a [black]. Bottom: differential-mode circulating current idmcc_12).
the switching constraint method only has an effect on the differential-mode circulating currents and cannot control the common-mode circulating currents in the parallel system op-erated in rectifier mode.
Figs. 17 and 18 show the experimental results with the pro-posed common-mode and differential-mode control schemes under different power rating conditions operated in rectifier mode. The measured waveforms of grid voltage Vs, line cur-rents (iL1a, iL1b), and corresponding common-mode circulat-ing current icmcc_1 of converter 1 are shown in Fig. 17. In
addition, the measured waveforms of grid voltage Vs, line currents (iL1a, iL2a), and corresponding differential-mode cir-culating current idmcc_12are shown in Fig. 18. From Figs. 17
and 18 one can find that the common-mode and differential-mode circulating currents are close to zero. This implies that the proposed circulating current control method has an effect on the differential-mode circulating currents and also effects the common-mode circulating currents in the parallel system operated in rectifier mode.
A parallel system operated in the inverter mode is considered next. Figs. 19 and 20 show the experimental results without cir-culating current control under different power rating conditions
Fig. 19. Measured waveforms without circulating current control of the parallel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a [gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
Fig. 20. Measured waveforms without circulating current control of the parallel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a [gray], and iL2a [black]. Bottom: differential-mode circulating current idmcc_12).
operated in the inverter mode. The measured waveforms of grid voltage Vs, line currents (iL1a, iL1b), and the corresponding common-mode circulating current icmcc_1 of converter 1 are
shown in Fig. 19. In addition, the measured waveform of grid voltage Vs, line currents (iL1a, iL2a), and the corresponding differential-mode circulating current idmcc_12 are shown in
Fig. 20. From Figs. 19 and 20 one can find that prominent common-mode and differential-mode circulating currents exist in the parallel system operated in the inverter mode.
Figs. 21 and 22 show the experimental results with switching constraint method under different power rating conditions op-erated in the inverter mode. The measured waveforms of grid voltage Vs, line currents (iL1a, iL1b), and the corresponding common-mode circulating current icmcc_1 of converter 1 are
shown in Fig. 21. In addition, the measured waveform of grid voltage Vs, line currents (iL1a, iL2a), and corresponding differential-mode circulating current idmcc_12 are shown in
Fig. 22. From Figs. 21 and 22, one can find that, although the differential-mode circulating current is close to zero due to the switching constraint method, common-mode circulating currents still exist in the parallel system. This implies that the switching constraint method has an effect only on the
Fig. 21. Measured waveforms with switching constraint method of the par-allel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a [gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
Fig. 22. Measured waveforms with switching constraint method of the par-allel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a [gray], and iL2a [black]. Bottom: differential-mode circulating current idmcc_12).
Fig. 23. Measured waveforms with proposed circulating current control scheme of the parallel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a[gray], and iL1b [black]. Bottom: common-mode circulating current icmcc_1).
differential-mode circulating currents and cannot control the common-mode circulating currents in a parallel system oper-ated in the inverter mode.
Figs. 23 and 24 show the experimental results with proposed common-mode and differential-mode control schemes under
Fig. 24. Measured waveforms with proposed circulating current control scheme of the parallel system in different power rating conditions operated in inverter mode. (Top: input voltage Vs, input line current iL1a[gray], and iL2a [black]. Bottom: differential-mode circulating current idmcc_12).
different power rating conditions operated in the inverter mode. The measured waveforms of grid voltage Vs, line currents (iL1a, iL1b), and the corresponding common-mode circulating current icmcc_1 of converter 1 are shown in Fig. 23. In
addi-tion, the measured waveforms of grid voltage Vs, line currents (iL1a, iL2a), and the corresponding differential-mode circulat-ing current idmcc_12 are shown in Fig. 24. From Figs. 23 and
24, one can find that both the common-mode and differential-mode circulating currents are close to zero. This implies that the proposed circulating current control method has an effect on the differential-mode circulating currents and effects the common-mode circulating currents in a parallel system operated in the inverter mode.
V. CONCLUSION
This paper has proposed definitions for CMCC and DMCC. Then, CMCC and DMCC compensators in a centralized control scheme were also proposed to reduce the common-mode and differential-mode circulating currents in a paralleled system. In addition, a prototype system was constructed and experimental results were given to verify the validity of the proposed control scheme. From the experimental results, the proposed control scheme can indeed reduce the circulating currents under differ-ent power rating conditions in a parallel system. The shape of the input line currents of the paralleled system was controlled in sinusoidal waveform and in phase with the input voltage.
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Yi-Hung Liao (M’08) received the M.S. and Ph.D.
degrees in electrical engineering from National Tsing Hua University, Hsinchu, Taiwan, in 2000 and 2007, respectively.
From 2000 to 2001, he served as the Supervisor of the R&D Department, Converter Technology Company, Ltd. Since 2008, he has been with the De-partment of Electrical Engineering, National Penghu University of Science and Technology (NPU), Magong, Taiwan, where he is currently an Associate Professor. Since August 2012, he has served as the Chief of the Research and Project Section and the International Cooperation Section, NPU. His current research interests include power electronics, control systems, and green energy applications.
Dr. Liao is a member of the IEEE Industry Applications, IEEE Power Electronics, and IEEE Industrial Electronics Societies.
Hung-Chi Chen (M’06) was born in Taichung,
Taiwan, in June 1974. He received the B.S. and Ph.D. degrees from National Tsing Hua University, Hsinchu, Taiwan, in June 1996 and June 2001, re-spectively, both from the Department of Electrical Engineering.
In October 2001, he became a Researcher at the Energy and Resources Laboratory, Industrial Tech-nology Research Institute, Taiwan. In August 2006, he joined the Department of Electrical and Control, National Chiao Tung University, Hsinchu, where he is currently an Associate Professor. From September 2011 to February 2012, he was a Visiting Scholar with the University of Texas at Arlington, Arlington, TX USA. His research interests include power electronics, power factor correction, motor and inverter-fed control, and DSP/MCU/FPGA-based implementation of digital control.
Hsiu-Che Cheng was born in Kaohsiung, Taiwan,
in May 1987. He received the B.S. degree from the Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan, in June 2009 and the M.S. degree from the Institute of Electrical Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, in September 2011.
His research interests include power electronics and control, power factor correction, and FPGA-based implementation of digital control.
Yu-Lung Ke (M’98–SM’06) received the B.S.
de-gree in control engineering from National Chiao Tung University, Hsin-Chu City, Taiwan, in 1988, the M.S. degree in electrical engineering from National Taiwan University, Taipei City, Taiwan, in 1991, and the Ph.D. degree in electrical engineering from National Sun Yat-Sen University, Kaohsiung City, Taiwan, in 2001.
In August 1991, he joined the Department of Elec-trical Engineering, Kun Shan University, Yung-Kang City, Taiwan. From August 1, 2007 to January 31, 2009, he served as a full Professor and Chair of the Department and Graduate Institute of Electrical Engineering, Kun Shan University. Since August 2009, he has been with the Department of Electrical Engineering, National Penghu University of Science and Technology (NPU), Magong, Taiwan. Since August 2011, he has served as the Chair of the Department Electrical Engineering and the Chair of the Graduate Institute of Electrical Engineering and Computer Science, NPU. His research interests include power system, power electronics, control engineering, renewable energy, smart grid, and energy education.
Dr. Ke is a Registered Professional Engineer in Taiwan. Since 2002, he has served as a reviewer for several IEEE TRANSACTIONS. He received the 2008 Committee Prize Paper Award of the Energy Systems Committee of the Industrial and Commercial Power Systems Department of the IEEE Industry Applications Society.
Yi-Ta Li was born in Taichung, Taiwan, in October
1983. He received the B.S. and M.S degrees from the Department of Electrical Engineering, National Kaohsiung University of Applied Sciences (KUAS), Kaohsiung, Taiwan, in 2006 and 2008, respectively. He is currently working toward the Ph.D. degree in the Electrical and Control Department, National Chiao Tung University, Hsinchu, Taiwan.
He is currently a Staff Member at the National Synchrotron Radiation Research Center, Hsinchu. His current research interests include power electron-ics and control, power factor correction, and FPGA-based implementation of digital control.
