A TRIANGULAR CONNECTION HOPFIELD NEURAL-NETWORK APPROACH TO ANALOG-TO-DIGITAL CONVERSION

882 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 43, NO. 6, DECEMBER 1994

A

Triangular Connection Hopfield Neural Network

Approach to Analog-to-Digital Conversion

Po-Rong Chang, Member, Bor-Chin

Wang,

and

H. M.

Gong

Abstruct- A Hopfield-type neural network approach which leads to an analog circuit for implementing the A/D conversion is presented. The solution of the original symmetric connection Hopfield A/D converter sometimes may reach a “spurious state” that does not correspond to the correct digital representation of the input signal. An A/D converter based on the model of nonsymmetrical neural networks is proposed to obtain the stable and correct encoding. Due to the infeasible conventional RC- active implementation, a cost-effective switched-capacitor imple- mentation by means of Schmitt triggers is adopted. It is capable of achieving high performance as well as a high convergence rate. Finally, a simulation using a tool called SWITCAP is conducted to verify the validity and performance of the proposed implementation.

I. INTRODUCTION

RTIFICIAL neural networks contain a large number

A

of identical computing neurons with specific intercon- nection strengths between neurons. The massively parallel processing power of the neural network lies in the cooper- ation of highly interconnected computing neurons. References [1], [2] demonstrated that their networks have the potential to produce real-time solutions to optimization problems. It also has been shown that Hopfield-type neural networks can solve a number of difficult optimization problems in a time determined by system RC time constants, not times determined by complexity.

From a design point of view, the Hopfield neural networks with the symmetric connections are especially convenient for the AJD conversion task. Due to the nature of the energy function, the solution of this symmetric network is highly de- pendent on its initial state. The energy function may decrease and then settle to one of the equilibrium points called the “spurious state” that does not correspond to the correct digital representation of the input signal. Reference [3] proposed a network with additional self-correction circuitry to eliminate this spurious state. However, a more systematic approach to solving the problem of spurious states is based on a particular class of nonsymmetric neural networks. Reference [4] showed that this structure of neural network has no spurious state, and the dynamic behavior of the structure is characterized by a unique equilibrium point which is the global minimum. In

Manuscript received May 19, 1993; revised March 25, 1994.

This work was supported in part by the National Science Council, Republic of China, under contract NCS81-0404-E-009-622.

P.-R. Chang and B.-C. Wang are with the Dept. of Communication Engineering, National Chiao-Tung University, Hsin-Chu, Taiwan.

H.-M. Gong is a member of the research staff at Telecommunication Lab- oratories, Ministry of Transportation and Communication, Taoyuan, Taiwan.

IEEE Log Number 9406572

other words, the system will converge toward this point for every choice of initial conditions. In designing an effective

AJD

converter, the choice of nonsymmetrical networks is not restrictive from a biological point of view. Section I11 shows that the triangularly connected network is the most appropriate structure for implementing the

A D

conversion. Since a stable encoding doesn’t mean correct encoding, one may design the connection strengths Tij between neurons so that this global

equilibrium point coincides with the desired output for a given input signal. Reference [5] introduced the conditions to ensure the correctness of the stable encoding and to determine the connection strengths. The concept of Cattermole’s method is based on pulse code modulation. More recently [6], referring to the previous work of Cattermole, have proposed the realization of

A/D

converters that are modified with respect to the original Hopfield neural network, in order to avoid the incorrect conversion of the Hopfield

A D .

In section ID, we will determine appropriate connection strengths of the triangular connection network for correct

A/D

encoding on the basis of Cattermole’s method. Usually, Hopfield neural networks are realized by conventional RC-active designs which are not the best suited for monolithic implementation, especially taking into account that accurate resistor ratios and large RC values are required for the design. This drawback can be overcome by using switched-capacitor techniques [7]-[ 1 11 which have good linearity and monotonicity in spite of circuit configuration.

Section V presents a cost-effective switched-capacitor im- plementation by means of multi-input Schmitt triggers to the triangularly connected

A/D

converters. Moreover, the Schmitt triggers with hysteresis can also avoid the unpredicted noise perturbation and instability resulting from the high-gain nonlinear amplifiers. Experimental results and comparisons will be discussed in the last section.

11. SYMMETRIC HOPFIELD

NEURAL

NETWORK The Hopfield model [l], [2] is a popular model of a continuous neural network of n interconnected nodes. Each node is assigned a potential, u j ( t ) , j = 0 , 2 , .

. .

,

( n - 1) as its state variable. Each node receives external input bias Ii (t) , and internal inputs from other nodes in the form of a weighted sum of firing rates

C

T ; j g j ( X j u j ) , where gj (.) is a monotonically increasing sigmoidal bounded function converting the potential to firing rate. The equations of motion are

.n-1

CHANG, WANG, AND GONG': NEURAL NITWORK APPROACH TO ANALOG - TO - DIGITAL CONVWSION 883

v,

= gi(X;ui) (1)

where Tij is the conductance connected between the ith neuron input and the j t h neuron output,

&

is the ith neuron output voltage, Ii is the input current to the ith neuron,

-3

is the current flow due to finite transmembrance resistance

R,

Xi's

are the amplifier gains, and gi(Xiui) is typically identified as References [l], [2] have shown that in the case of symmetric connections (Tij = Tji), the equations of motion for this network of analog processors always lead to a convergence to stable states, in which the output voltages of all amplifiers remain constant. In addition, when the diagonal elements (Tii)

are 0 and the amplifier gains Xi's are high, the stable states of a network comprised of n neurons are the minima of the computational energy or Lyapunov function

4(1

+

tanh(XiUi)).

-

n-ln-1 n-I

The state space over which the analog circuit operates is the n-dimensional hypercube defined by

V ,

= 0 or 1. However, it has been shown that the high-gain limit networks with vanishing diagonal connections (Tii = 0) have minima only at the comers of this space [2]. Under these conditions the stable states of the network correspond to those locations in the discrete space consisting of the 2n comers of this hypercube which minimize E.

In order to utilize the concept of Hopfield network, the design of an A/D conversion could be reformulated as min- imizing a quadratic programming problem subject to the corresponding binary variables which are the best digital representations of an analog signal X. In other words, the best digital representation is obtained by finding the binary variables V , which minimize the quadratic metric:

network output does not correspond to the digital represen- tation of the analog signal

X.

In the next section, a more systematic approach based on the concept of a nonsymmetric neural network is proposed to eliminate the local minima.

m.

A m ( 3 I J L A R L . Y CONNECTED HOPFIELD NETWORK WITH

APPLICATION

mA/D CONVERSION

In this section, we would like to describe the global stability feature of a triangularly connected neural network proposed in [4]. In general, two essential stability properties (uniqueness of the equilibrium point and global attractivity) are considered in the network. The following theorem is presented to provide the validity of both properties.

Theorem 1 A system offirst-order nonlinear differential equa- tions is

(7) x =

AX

+

f(x)

where

A

= ( a z 3 ) is an n x n constant matrix with a,] = 0

for i

>

j , x = (xo,.

. .

,

x , , - ~ ) ~ E R", and f : R" + R" is a continous vector function f = (fo, fi,

. . .

,

f n - l ) t such that

fn-l(x) = constant and

fz(x)

= fr(x,+1,x,+2,.

. .

,xn-l),i = 0,.

. .

,

(n

-

2).

If

the linear system x =

Ax

is asymptotically stable, then the system (7) has only one equilibrium point xe = (xi,.

. .

, X Z - ~ ) ~

which is globally attractive in

R"

[4].

According to Theorem 1, the equations of a lower trian- gularly connected Hopfield network can be obtained as a particular case of system (7). For the purpose of simplicity, the matrix

A

and fi in Theorem 1 are given by

A = ,iag(

2)

n-1 _{where ~i =}

_{R C ; ,}

_T

_{= (Tij) is an upper triangular connection}

matrix with Tij = 0, for

i

2

j and 0

5

i,j

5

n

-

1, g = ( g 1 , 9 2 , . . . , g n ) L and g, :

R

+ R are continuous functions.

Ci,

R, and

li

are real Constants with

Ci,

R,

>

0.

[Tgli is the i-th component of the resulting vector of T . g .

By substituting (8) into (7), the system dynamics of the triangularly connected network are obtained:

(3)

However, there is no guarantee that the values of will be close to 0 or 1 to be identified as digital logic levels by " k i n g (3).

TO

eliminate this problem, one may add one additional term to the

E

function. Its form can be chosen as

dui -1 n-l

(4)

C;-

= -U;+ T.. 2993 .( .j)

+ E ,

1 n-l

- (2i)2[(1 -

&)&I.

i=o

d t

Ri j=;+l

Hopfield [2] showed that the complete energy function for the

E

= --

C T ~ ~ K V ,

-

iiv,

i = 0 , 1 ,

...,

(n-1). ₍₉₎ Notice that the variables

x;

in (7) are replaced by the new

Since

A

of (8) is negative definite, it can be shown that

U =

Au

is asymptotically stable. Thus, from Theorem 1,

system (9) is globally attractive, and its associated equilibrium point ue = (U:, up,.

. .

,

u:-l)t is determined by the following

A D conversion can be expanded and rearranged into the form

( 5 )

n-1

1 n - l n - l variables U;, respectively.

j = o i+j i = O

-

T..

-

-2(i+j) a9

-

equations uniquely: n-1 I; = (-2P-1) + 2"). ₍₆₎ where 1

Unfortunately, [3] showed that the energy of a symmetric -U: = _Tijg(u:)

+

Ti,

i = 0 , 1 , .

. .

,

(n - 1). (10) Hopfield network has many local minima, and the resultant Ri j = i + l

884 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 43, NO. 6, DECEMBER 1994

(i

+

1, i

+

2,

. . .

,

n

-

1) but not on the decisions for the lesser significant bits. Therefore, the MSB must settle before the next Next, it determines the parameter values T;j, I; and k; from

11 v2 the equilibrium point when the network stops corresponding

to the digital representation of the input signal obtained from

I

1 _V, digit decision and so on, down to the LSB.

I V,

3 (13) and (14). With a suitable change of indexes in (ll), the

I equilibrium equation becomes

I V,

n-1 Fig. 1. Triangular Hopfield network for the 4-bit AID converter.

Considering the circuit realization of system (9), the system

dynamics should be rewritten in a state equation formulation as:

Notice that the index

i

= ( n

-

1) for the MSB and

i

= 0 for the LSB.

In the extreme case, the gain of the sigmoidal decision functions

si(-)

in the Hopfield network is chosen to be a sufficiently large value. Therefore, those functions can be modelled as digital comparators as mentioned in (1 3), that is, n-1 (1l.a) dui -1 and (1l.b) 0 if U:

<

0 1 ifup

> o .

v,e

= g;(ul) = . .

Substituting (12) and (15) into (16), we have where U; and

V ,

are now the neural state variables and the

Undoubtedly, system (1 1) is really identical to the dynam- (17)

0 if T;jV,e

+

I;

+

kiX

<

0 1

if

C’;I:+i

TijVt

+

I;

+

kiX

>

0.

output variables respectively and

i

= 0 , 1 , .

. .

,

(n

-

1).

_v;e=

ics of a Hopfield neural network characterized by an upper

triangular connection {Tij}. In designing the AD conversion based on (1 l), the term

Ti

is subdivided into a constant biasing term

Ii

and a term depending on an input signal X :

(12) where IC; E R. This leads to the triangularly connected network shown in Fig. 1 in the case n = 4. Meanwhile, the parameter values Tij,

Ii

and k; in Fig. 1 are still unknown. It should be mentioned that the procedure of determining those values by Avitabile [4] is truly unclear. A possible solution to determine those values is introduced by using the concept of Cattermole In order to investigate the encoding procedure and determine the connection strengths Tij and bias

I;

of an upper triangu- larly connected Hopfield network for an A/D conversion with n bits, [5] suggested that the nonlinear decision functions g; (0)

could be modelled as digital comparators: -

Ii

=

I;

+

k;X

PI.

Z = 0 , 1 , .

.

. , ( T I

-

1) (13) 1 if X

>

t;

where b; is the i-th bit used to represent the input signal X ,

and the thresholds

t;

are given by n-1

t; = (1

-

b;)2;

+

bj23. (14) j=i

Moreover, [5] showed that the decision scheme defined in (13) and (14) can ensure the stability and correct encoding of an A/D conversion. In (14), the index i = n

-

1 corresponds to the most significant bit (MSB), and the index

i

= 0 corresponds to the least significant bit (LSB) respectively. Equations (13) and (14) prove that the decision on the

i-

th bit depends on the decisions for the more significant bits

. , .

While reaching the equilibrium point, the i-th steady-state output variable

V,.

would be identical to the desired i-th digit

b; determined by (13) and (14) when the values of parameters involved in (17) are identical to those of (13) and (14). Consequently, the connection strengths, bias and k; become

where

i

= n

-

1,

...,

0.

Since the network uses resistors to implement the connec- tion strengths R,j = l/lT;il, the settling time of each digit would depend on the sum of weighting resistors associated with the digit. From (18), it tums out that the sum of resistors for any digit is smallest for the MSB progressing to the largest for the LSB. Therefore, the settling time of the more significant bit is faster than the lesser significant bit. The order of decreas- ing significance would ensure the correct encoding of A/D conversion. Unfortunately, the network based on Cattermole’s work uses the discontinous digital comparators which can not meet the continous assumption in Theorem 1. A possible expression for

si(-)

is the sigmoidal function suggested in [2]. The accurate digital representation may be achieved by increasing the amplifier gain of the function. Indeed, the high- gain amplifiers would suffer from the potential instability and unpredicted noise perturbation. An altemative solution is to use more realistic Schmitt triggers with hysteresis instead of the high-gain amplifiers. The steepness of the characteristic as shown in Fig. 2 for U; = +U and ui = -U is extremely high

due to the effect of the positive feedback. Moreover, since the hysteresis and noise are presented on the input ui, the original equilibrium points characterized by the input stable variables U; = +U and ui = -U become unstable. The new

stable equilibrium points are now characterized by the output voltages

K

= +1 or

K

= 0. Reference [7] showed that

I , ,

CHANG, WANG, AND GONG NEURAL NETWORK APmOACH M ANALOG - TO

-

DIGITAL CONVERSION

Fig. 2. Input-output characteristic of a Schmitt trigger with hysteresis.

the lower triangular nerual-based A/D converter by means of Schmitt triggers can avoid the above-mentioned problems.

Iv.

THE

CORRECT ENCODING OF THE NEURAL-BASED A/D CONVERSION

It is known that a particular encoding scheme which satisfies the assumption in Theorem 1 will reach a stable equilibrium solution. But this stable code doesn't guarantee that the solution is correct. In other words, all correct codes are stable, but not all stable codes are correct. It is quite interesting to give a proof of correct coding for the encoding network based on [ 5 ] , which introduced the conditions to generate the correct outputs bj = (either zero or one) of each comparator; they are described in Theorem 2.

Theorem 2 The binary weighted sum of all n comparator output digits b, is to correctly encode the input X when the following condition is satisfed

"-1

0

5

X - bj2j

<

1

3 =O

and, since 2'

>

most significant digits is:

23 for i 2 1, the constraint on the ( n

-

i) n-1

O < X - c b 3 2 3 <2' O < i < n - l . (20)

3=z

Notice that a new variable

X

should be changed as

X'

+

4

while minimizing the encoding error in the least squares sense. Observing (13) and (14), the decision for the ( n

-

i) most significant digit would be shown to satisfy the condition described in (19). From (14), the decision function

n-1

Di = X

-

ti = X

-

(1

-

b;)2i - bj2j ₍₂₁₎

is introduced to decide the output

V,

according to (13), that is: j=i

Equation (22) implies that Dildb,,,, =

X

-

2i

-

ci"=;lbj2j

<

0 and D;lb,,l =

X

-

c y z : b j 2 j

>

0.

Therefore, it has been shown that the condition in (20) is satisfied by applying the Cattermole encoding method.

Next, [6] showed that the Cattermole encoding satisfies the condition (19). By using the fact that the decision for the more

A - I

"3 v3

885

Fig. 3. Triangular structure for the 4-bit A/D converter by means of Schmitt triggers.

significant digit is determined before the lesser significant digit decision, this implies that the Cattermole-based neural network guarantees the stability and correctness of encoding an input signal.

v.

SWITCHED-CAPACITOR REALIZATION FOR NEURAL-BASED A/D CONVERTER

In the realization of the

Tank

and Hopfield neural network

[l], [2], they use the conventional RC-active design tech- niques. However, the RC-active design is not the best suited for monolithic implementation since accurate resistor ratios and large RC values are required for the design. In this paper, we try to overcome this drawback by focusing on the design of implementing the triangularly connected Hopfield network using switched-capacitor techniques [SI-[ lo]. The switched- capacitor implementation as shown in Fig. 4 is obtained by placing the basic switched-capacitor modules into the trian- gularly connected neural-based A/D converter in Fig. 3. The details about the schematic realization of each basic module will be discussed in the next section.

A . A Mapping Between Resistor and Switched-Capacitor Networks

The complete schematic for the 4-bit A/D converter is presented in Fig. 3 which contains resistors, amplifiers, and

Schmitt triggers. Let us consider the circuit for a specific bit, i.e., the i-th bit, for the sake of simplicity. This leads to the circuit shown in Fig. 4 that contains an inverting summer and a Schmitt trigger. The inverting summer produces an output

ui given by

j=1 J

I

886 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 43, NO. 6, DECEMBER 1994

Fig. 4. Simple realization of the triangular neural-based A/D converter using SC summers.

The Schmitt trigger acts as a comparator, and its output is

V ,

= 0 or Q = 1. To avoid the unstable phenomenon caused by the nonideal elements and noise, the Schmitt trigger should include the function of hysteresis. It is to be noted that the width of the hysteresis must be chosen on the basis of a com- promise between accuracy of the conversion and the amplitude of the noise imposed upon ui. A mapping is presented below that takes the summer and Schmitt trigger containing only resistors, op amp and voltage comparator and constructs their corresponding switched-capacitor implementations.

Fig. 5 is a block diagram illustrating the basic structure of a switched-capacitor summer. This circuit is controlled by two nonoverlapping clock phases sl and 32. During the clock phase s l the feedback capacitor

CR

is discharged while the feed-in (input) capacitors C1, c 2 , .

. .

and

ck

are charged to the input voltages, VI, 212,

.

. .

and W k respectively. When

Ci

is switched to ground during the clock phase 32 the charge from

Ci

equals Ciwi, where 1

5

i

5

k.

The total amount of charges will be transferred to the capacitor CR. Thus, the ideal output voltage during clock phase 32 becomes

ci

21, = -wi.

i d CR

To reduce the clock-feedthrough error, an optional offset (V&)

can be utilized to compensate the error resulting from the summer of Fig. 5.

B . The Schmitt Trigger Based on Switched-Capacitor

The Schmitt trigger is a comparator with hysteresis which results

from

positive feedback and is used to compensate the

*

Fig. 5. The realization of SC summer with offset.

noise involved in the

A/D

converter. The Schmitt trigger is called inverting or clockwise bistable, because the output goes from the high state to the low state when the input voltage becomes larger. The bistable device can be realized easily by using SC techniques [9]. Fig. 6(a) shows an SC Schmitt trigger

with a voltage-controlled width of the hysteresis, controlled by a voltage V ,

>

0. The voltage VR is given as

aV, for K = 1

vR={-uV, f o r K = O

which generates the switching threshold voltages V - =

aV, and VF = -aV,, where a is the amplifier gain. This means that V, controls the width of the hysteresis. The above circuit can be extended to multiple inputs as shown in Fig. 6(b). Fig. 6(b) shows that the circuit is implemented using an SC charge balance comparator and a D-flip-flop or latch

[SI.

The Schmitt trigger can switch to its high output state

K

= 1 when the weighted sum of input signals Clwl

+

C 2 w 2

+

.

.

+

Cmwm reaches the values -CoV, and

V, = V i where V i corresponds to the lower magnitude of the output of the D-flip-flop or negative power supply voltage. Analogously it can switch to the low output state

K

= 0 when this sum is lower than -CoV, and V, =

V i where V i corresponds to the positive supply voltage. Moreover, Fig. 6(c) produces the two different output state voltages simultaneously. There are two possible approaches to implement the 4-bit neural-based A/D converter shown in Fig. 4. One of the feasible implementations is realized by four

SC

summers and single-input Schmitt triggers directly. Meanwhile, this hardware implementation does not seem to be cost effective. To reduce the implementation cost, it is found that a multi-input SC Schmitt trigger is particularily suitable for implementing the triangularly connected neural-based A/D

converter. The schematic of cost-effective SC implementation is illustrated in Fig.

7.

VI. COMPUTER SIMULATION

To verify the effectiveness of the Schmitt trigger-based switched-capacitor implementation, a triangularly connected neural-based A/Tl converter of four bits is considered in the following example. The implementation shown in Fig. 7 is controlled by two clock phases s l and 32. The circuit is reset during clock phase sl, and the outputs are available at the negative terminals during clock phase 32. The values of ca-

I , /

CHANG, WANG, AND GONG NEURAL NETWORK APPROACH TO ANALOG - TO - DIGITAL CONVERSION

Y

1

vc P VR

U

1

=

k U - z I V,

I

+

I

Fig. 6. The realization of multi-input Schmitt trigger using SC circuits. (a)

Functional diagram of the SC Schmitt trigger with controlled hysteresis. (b) SC Schmitt trigger with multiple inputs. (c) 'ho-output-state multi-input Schmitt trigger.

pacitors are determined according to the connection strengths

Tij

defined in (18). The reference voltage VR together with appropriate values for capacitors is used to provide the value of each bias Ii defined in (18).

We have simulated the switched-capacitor neural-based A/D converter using a simulation tool called SWITCAP. The switching clock period is In sec. Fig. 8 shows the time evolution of each resultant output digit when the input signal is equal to 11. It is seen that the most significant bit (MSB) settles down before the next digit decision. The least significant bit takes about 10 clock periods to arrive at the stable state. The computation time for the neural-based A/D converter is identified as 10 ns. The voltage transfer curve for the original Hopfield A/D converter is shown in Fig. 9. The input signal range should correspond to each output value in order to ensure the correct encoding. Unfortunately, two different input signal ranges may have the same output value. This phenomenon is caused by the local minima in the original Hopfield en- ergy function. Fig. 10 shows the simulated voltage transfer characteristics of the triangularly connected neural-based A/D converter. In this case, a monotonically increasing analog input voltage was applied. Simulation results of the trangularly connected network show good output characteristics since the output value corresponds to the correct digital representation of each analog input signal.

Fig. 7. The SC implementation for the triangular neural-based 4-bit ADconverter by means of multi-input Schmitt triggers.

tl 1 0.9 0.8

2

0.6

$

03 0 2 0.1 0 4.1 J 0.7

::

0 1 4 6 8 10 U, 14 16 I8 20 NUMBERS OF PERIOD

Fig. 8. The transient responses of the four amplifier outputs of the triangular 4-bit A/D converter by means of multi-input SC Schmitt triggers when

x

= 11.

0 2 4 6 8 1 0 1 2 1 4 1 6 INPUT VALUE

Fig. 9. Transfer characteristics of a symmetric 4-bit Hopfield A/D converter.

W.

CONCLUSION

This paper presents the development of an A/D conversion based on the triangularly connected Hopfield network. The

888 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 43, NO. 6, DECEMBER 1994 16 14 4 2 , I I i i i i i O o 2 4 6 8 io u 14 i 6 INPUT VALUE

Fig. 10. Transfer characteristics of the triangular neural-based 4-bit A/D converter by means of multi-input Schmitt triggers.

novel technique has been developed to eliminate local minima involved in the original Hopfield neural-based

A/D

converter with a symmetric connection. Since the encoding with a unique

Networks for Optimization Problems,” IEEE Tran. on Circuit and

Systems, vol. 37, no. 3, March 1990.

[9] R. Unbehauen and A. Cichocki, MOS Switched-Capacitor and Continuous-Time Integrated Circuits and Systems, Springer-Verlag,

1989.

[lo] Y. P. Tsividis and D. Anastassiou Switched-Capacitor Neural Networks, Electronics Letters, 27th August 1987 vol. 23 no. 18

[ 111 A. Rueda, J. L. Huertas and R. Dominguez-Castro, ‘Switched-Capacitor Neural Networks For Linear Programming,” Electronics Letters, 14th April 1988 vol. 24, no. 8.

Po-Rong Chang (M’87) received the B.S. degree in electrical engineering from the National Tsing- Hua University, Taiwan in 1980. He received the M.S. degree in telecommunication engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 1982; and the Ph.D. degree in electrical engineer- ing from Purdue University, West Lafayette, IN, in 1988.

From 1982 to 1984, he was a lecturer in the Chi- nese Air Force Telecommunication and Electronics School for his two-vear militarv service. During global minimum energy function doesn’t imply the correct

encoding, the values of connection strengths and bias should be determined according to Cattemole,s suggestions in order to guarantee the correctness of encoding. Section V shows that the network by means of switched-capacitor multi-input Schmitt triggers is identified as the cost-effective implemen- tation for the lower triangular neural network. Results of simulation show that the speed of reaching a steady-state

1984 and 1985, he was an instructor of eleckcal engineering at Nationi Taiwan Institute of Technology, Taipei, Taiwan. From 1989 to 1990, he was a project leader in charge of SPARC chip design team at ERSO of Industrial Technology and Research Institute, Chu-Tung, Taiwan. Currently he is an Associate Professor of Communication Engineering at National Chiao- Tung University, Hsin-Chu, Taiwan. His current interests include fuzzy neural network, wireless multi-media systems, and virtual reality.

-

solution depends essentially on the system time constant. Moreover, it should result that the settling time of the more significant bit is faster than that of the lesser significant bit.

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Bor-Chin Wang received the B.S. and the M.S. degrees in power mechanical engineering from the National Tsing-Hua University, Hsinchu, Taiwan, in 1983 and 1985, respectively. He is currently working towards the Ph.D. degree in communica- tion engineering at National Chiao-Tung University, Hsinchu, Taiwan.

From 1985 to 1993 he was an assistant research engineer at the Chung-Shan Institute of Science and Technology, Ministry of National Defense, Republic of China, where he worked on servo system design. His current research interests are in CDMA cellular system, wireless multi- media systems, fuzzy neural network, and PCS systems.

Huei-Ming Gong received the B.S. degree in 1989 and the M.S. degree in 1991, Communication engi- neering from the National Chiao-Tung University, Hsinchu, Taiwan.

Since 1991, he has been a member of the research staff at Telecommunication, in Taoyuan, Taiwan, His research interests include: neutal network, net- work architecture, network performance analysis and maintenance, and subscriber loop technology.