Single-Loop Current Sensorless Control
for Single-Phase Boost-Type SMR
Hung-Chi Chen, Member, IEEE
Abstract—In this paper, the first single-loop current sensorless control (SLCSC) in continuous current mode (CCM) for single-phase boost-type switching-mode rectifiers (SMRs) is developed and digitally implemented in a DSP-based system. Compared to the conventional multiloop control with one inner current loop and one outer voltage loop, there is only one voltage loop in the proposed SLCSC, where the voltage loop’s output is used to shift the nominal duty ratio pattern generated from the sensed input and output voltages. Because of no current loop, the efforts of sampling and tracking inductor current can be saved. It implies that the proposed SLCSC is simple and very adaptable to the implementation with mixed-signal ICs. First, the effects of shifting nominal duty ratio pattern on the input current waveform are analyzed and modeled by considering the inductor resistance and conduction voltages. The result of analysis shows that the pure sinusoidal current can be inherently generated by the nominal duty ratio pattern where the current amplitude is roughly proportional to the controllable phase of nominal duty ratio pattern. Then, a voltage controller is included to regulate the dc output voltage by tuning this controllable phase. Finally, some simulated and experimental results have been given to demonstrate the performance of the proposed SLCSC.
Index Terms—Power factor correction, sensorless control, switching-mode rectifier (SMR).
I. INTRODUCTION
I
N DC/DC conversion, we often pay close attention on the performance of output voltage regulation. Alternatively, in the qualified ac/dc conversion, we are interested in the perfor-mances of input current shaping and output voltage regulation. The use of a switching-mode rectifier (SMR) [1]–[3] with power factor correction (PFC) function is an effective mean to perform the qualified ac/dc conversion. Boost-type SMRs, as shown in Fig. 1, are the most popular circuit topology among all the oth-ers to shape the current waveform for their continuous input current in the boost inductors. However, since there is only one controllable power switch in the boost-type SMR, both desired functions, including input current shaping and output voltage regulation, must be met by adequately turning on and turning off the single switch.In the conventional multiloop control shown in Fig. 2, the inner loop focuses on input current shaping and the outer loop contributes to voltage regulation. Then, the two cascaded loops work together to yield adequate switching signal to control the
Manuscript received March 4, 2008; revised July 13, 2008; accepted September 11, 2008. Current version published February 6, 2009. This work was supported by the National Science Council, Taiwan, under Grant NSC96-2221-E-009-247. This paper was presented at the IEEE Applied Power Electronics Conference (APEC 2008), Austin, TX, February 24–28, 2008. Recommended for publication by Associate Editor C. A. Canesin.
The author is with the Department of Electrical and Control Engineering (ECE), National Chiao Tung University (NCTU), Hsinchu 30010, Taiwan (e-mail: hcchen@cn.nctu.edu.tw).
Digital Object Identifier 10.1109/TPEL.2008.2006359
Fig. 1. Power circuit of the boost-type SMR.
Fig. 2. Conventional multiloop control for boost-type SMRs in CCM.
single power switch in order to achieve both desired functions. In the implementation of conventional multiloop control, we need to sense three signals including input voltage, output voltage, and input current, and the rate of sampling current set according to the switching frequency is considerably greater than that of sensing input and output voltages.
For single-phase boost-type SMRs, many voltage sensorless controls [4], [5], [7]–[9] and current sensorless controls [6], [7] have been proposed in literatures in order to reduce the total number of input signals. From the view of control structure, these sensorless control methods [4]–[9] can be divided into two categories: one is multiloop sensorless control [4]–[6] and the other is single-loop sensorless control [7]–[9]. Since there is only one voltage loop in the latter category, they can be seen as voltage-mode control, and therefore, the former category can be regarded as current-mode sensorless control for their inner current loop. All the sensorless control methods are summarized in Table I.
In a boost-type SMR, the rising rate of current is proportional to the input voltage, and the falling rate is proportional to voltage difference between the output voltage and the input voltage. The earlier relations are used in the multiloop sensorless control methods [4]–[6], where the input voltage in [4] is reconstructed from the rising rate of inductor current, and the output voltage in [4] and [5] are estimated from the falling rate of the available inductor current. Alternately, the current is predicted from the sensed input and output voltages in [6].
It is noted that at least two current samplings within the durations of rising current or falling current must be obtained in order to calculate the time rate of change of current in [4] and [5].
Fig. 3. Conventional voltage-mode control for boost-type SMRs in DCM.
In the multiloop current sensorless control in [6], the rate of sampling input and output voltages must be increased to the level of switching frequency in order to predict the current accurately [6]. It implies that the actual sensing effort does not decrease but increases as the developed sensorless method in [4]–[6]. Therefore, the implementation of multiloop sensorless control is more complex than that of the conventional multiloop control. In addition, the value accuracy of inductance has a great effect upon the performances of multiloop sensorless control in [4]–[6] for that they are based on the inductive relation between the inductor current and inductor voltage.
The control techniques in [7]–[9] are the group of single-loop sensorless controls. The commonly used voltage-follower control illustrated in Fig. 3 can be seen as the first single-loop sensorless control, where the single switch is directly controlled by comparing the output of voltage loop with the carrier sig-nal [7]. Though the discontinuous current is rich in harmonics and far from the pure sinusoidal waveform, the simple voltage-follower control in Fig. 3 is able to meet some standards, and is usually used in many low-power applications.
Both the nonlinear carrier control in [8] and the average current-mode control in [9] are the other single-loop sensor-lesss controls without sensing input voltage. The amplitudes of the nonlinear carrier signal [8] and the triangle carrier signal [9] are adjusted by the output of the single voltage loop. Then, their switching signals are generated from the result of com-parison between the sensing current and the adjustable carrier signal. However, although there is no current loop in [8] and [9], the currents are still feedback, and the SMRs are operating un-der continuous current mode (CCM). However, for single-loop control structure, there is no current sensorless control till now. In this paper, the author develops the first single-loop current sensorless control (SLCSC) in CCM.
regulate the dc output voltage by means of tuning the phase. Fi-nally, some simulated and experimental results have been given to illustrate the performances of the proposed SLCSC.
II. BOOST-TYPESMR
As shown in Fig. 1, the power circuit of the boost-type SMR mainly consists of a diode bridge rectifier and a boost-type dc/dc converter. From the circuit topology shown in Fig. 1, we can find that when input voltage vs is positive, inductor current
iLis equal to input current is, and that the inductor current iLis
equal to the negative input current−iswhen the input voltage vs
turns to negative. Then, the inductor current can be represented in terms of input current [10]
iL(t) = sign(vs(t))is(t) (1)
where sign(•) is the sign operator and sign(X) =
+1, when X≥ 0
−z, when X < 0. (2)
In order to model the behaviors of the boost-type SMR, the following assumptions are made initially.
1) Power switch SW is assumed to operate at a switching much higher than the input frequency. Thus, the input voltage over one switching period can be considered as constant.
2) A bulk capacitor Cd is included in the power circuit, and
thus, the output voltage vdcan be assumed to be its average
value Vd. Therefore, in steady state, the output voltage vd
can be assumed to be the voltage command Vd∗.
3) Without loss of generality, the input voltage is assumed to be vs(t) = ˆVssin(ωt), where ˆVsis the magnitude of input
voltage.
4) When the boost-type SMR is operating in CCM with unity power factor, the input current must be sinusoidal wave-form, and thus, the input current can be assumed to be is(t) = ˆIssin(ωt), where ˆIsis the magnitude of the input
current.
Therefore, the drawn input power Ps(t) can be expressed as
the product of input current is(t) = ˆIssin(ωt) and input voltage
vs(t) = ˆVssin(ωt)
Ps(t) = 0.5 ˆVsIˆs− 0.5 ˆVsIˆscos(2ωt) = ¯P− ¯P cos(2ωt) (3)
where ¯P = 0.5 ˆVsIˆsis the average power into the SMR.
For the balance between input and output powers, we are able to adjust the output power to regulate output voltage by controlling the magnitude of sinusoidal current ˆIs. In the
con-ventional multiloop control shown in Fig. 2, the sinusoidal cur-rent is yielded through the cooperation of the outer voltage loop and the inner current loop. First, the input current amplitude ˆIs
Fig. 4. Proposed SLCSC for boost-type SMRs.
can be obtained through the outer voltage controller in order to regulate the output voltage. By multiplying ˆIs with the unity
rectified signal s(ωt) =| sin ωt|, the inductor current command i∗L can be obtained. Then, the switching signal d(t) in Fig. 2 is generated by comparing the current controller output signal vcontand triangular signal vtriat the comparator’s (+) terminal
and (−) terminal, respectively.
Alternately, we can find that in the following proposed SLCSC, the input sinusoidal current can be yielded automat-ically by the single voltage loop without inner current loop and sensing any current.
III. SINGLE-LOOPCURRENTSENSORLESSCONTROL A. Configuration
The configuration of the proposed SLCSC with only one voltage loop is plotted in Fig. 4. Like the conventional controls plotted in Figs. 2 and 3, the duty signal d(t) of SLCSC is also generated from the comparison between the fixed triangle signal vtri and the control signal vcont. However, note that the
control signal vcontof SLCSC is at (−) terminal, and the fixed
triangle signal vtri is at (+) terminal. Besides, compared with
the current magnitude ˆIs at the output of voltage controller in
Fig. 2, the output of voltage controller in the proposed SLCSC is the controllable phase θ. And the unity rectified signal s(ωt) is
s(ωt) =|vs(t)| ˆ Vs
=| sin(ωt)| = sign(sin(ωt)) sin(ωt). (4)
The control signal vcont in SLCSC is composed of three
signals, and can be expressed as
vcont= vcont,θ− vcont,i− vcont,v (5)
where vcont,θ = ˆ Vs Vd∗s(ωt− θ) (6) vcont,i = θ ˆ Vs ωL rL Vd∗s(ωt) (7) vcont,v = 3VF Vd∗ (8)
where rL and VF are the inductor resistance and diode/switch
conduction voltage, respectively.
Fig. 5. Boost-type SMR with adjustable phase signal θ.
B. Analysis
In order to simplify the following analysis, all the conduction voltages of the three diodes and the single switch SW are assumed equal to each other and denoted by VF. By combining
the main circuit topology in Fig. 1 and the proposed SLCSC in Fig. 4, we can obtain the equivalent circuit model shown in Fig. 5 for simplified analysis where the diode rectifier is replaced by two series-connected diodes DB1 and DB2, and the input voltage is the ideal rectified sinusoidal voltage ˆVs| sin(ωt)|.
Since the control signal vcont is at (−) terminal and the
tri-angle signal vtri is at (+) terminal, as shown in Fig. 4, the
average duty ratio signal ¯d over one switching period Tscan be
expressed as
¯
d = 1− vcont. (9)
By combining (5)–(9), the average duty ratio signal ¯d can be further expressed in terms of phase signal θ of the output of voltage controller ¯ d = 1− Vˆs Vd∗| sin(ωt − θ)| + θ ˆ Vs ωL rL Vd∗| sin(ωt)| + 3VF Vd∗ . (10) From Fig. 5, when SW is turned on, the current flows through DB1, switch SW, and DB2. Thus, the sum of total conduction voltage drops is equal to 3VF. From KVL, the inductor voltage
vLcan be expressed as
vL = L
diL(t)
dt = ˆVs| sin(ωt)|
− 3VF − iL(t)rL, when SW is turning on. (11)
Similarly, when SW is turned off, the current flows through DB1, freewheeling diode D, and DB2, and the total conduction voltages is also equal to 3VF. The inductor voltage vL can be
found vL = L
diL(t)
dt = ˆVs| sin(ωt)| − V∗
d − 3VF − iL(t)rL, when SW is turned off. (12) By using the time-averaging approach, the earlier two equa-tions can be combined to obtain the average inductor voltage through multiplying (11) by turning-on time ¯dTs and (12) by
turning-off time (1− ¯d)Ts, respectively
¯ vL(t) = L d¯iL(t) dt = ˆVs| sin(ωt)| − (1 − ¯d)V ∗ d − 3VF−¯iL(t)rL. (13)
+ Vsθ
ωL| sin(ωt)| − ¯iL(t) rL (14) where the terms of VF are canceled out.
Then, the term sin(ωt− θ) can be extracted by applying the following trigonometric identity sin(A− B) = sin A cos B − sin B cos A, and the approximations sin θ≈ θ and cos θ ≈ 1 if the phase signal θ in radians is small and near to zero (θ≈ 0). Then, (14) can be rewritten as
d¯iL(t) dt ≈ ˆ Vs| sin(ωt)| L − ˆ Vs|sin(ωt) − θ cos(ωt)| L + ˆ Vsθ ωL |sin(ωt)| − ¯iL(t) rL L. (15)
Since the inductor current is repetitive with double line fre-quency 2fin, the current differential equation (15) can be
sim-plified by removing the absolute operators [10], and then, the common terms ˆVssin(ωt) can be canceled out
d¯iL(t) dt ≈ ˆ Vsθ L sign(sin(ωt)) cos(ωt) + ˆ Vsθ
ωLsign(sin(ωt)) sin(ωt)− ¯iL(t)
rL
L. (16) Then, by solving (16), we can obtain the average inductor current ¯iL(t) ¯iL(t)≈ ˆ Vsθ ωLsign(sin(ωt)) sin(ωt) = ˆ Vsθ ωLs(ωt). (17) From (1), the assumption of the infinite switching frequency, the input current is(t) can be expressed as
is(t)≈
ˆ Vsθ
ωLsin(ωt) = ˆIssin(ωt). (18) From (18), obviously, the sinusoidal input current isis
inher-ently generated, and its current amplitude ˆIs= ( ˆVsθ)/(ωL) is
proportional to the controllable phase θ without sensing current and current loop. Additionally, the sinusoidal input current isis
in phase with the input voltage vs.
By substituting ˆIs = ( ˆVsθ)/(ωL) into (7), the component
vcont,i of the control signal vcontcan be expressed as
vcont,i(t) = θ ˆ Vs ωL rL Vd∗s(ωt) = rL Vd∗iL(t) (19) where the rectified signal vcont,iis proportional to the inductor
current iL. From (8) and (19), obviously, the components vcont,i
and vcont,v of the control signal vcontcan be seen as two
feed-forward signals used to compensate the effects of voltage drops across the inductor resistance rLand the conduction voltage VF,
i.e., the component vcont,θwith fixed wave pattern and
control-lable phase mainly contributes to the generation of sinusoidal current.
C. Power Flow
Then, by substituting (18) into (3), the average input power becomes ¯ P = Vˆ 2 sθ 2ωL ∝ θ (20)
where the average input power is proportional to the controllable signal θ. It follows that we can include a voltage controller Gcv(s) in SLCSC to automatically adjust the phase signal θ
to control input power to meet the desired function of output voltage regulation. Consequently, both PFC functions including current shaping and output voltage regulation can be met by using the proposed SLCSC.
Similarly, by substituting ˆIs = ( ˆVsθ)/(ωL) into (14), the
in-ductor voltage vL can be expressed as
vL(t) = L
diL(t)
dt = ˆVs| sin(ωt)| − ˆVs| sin(ωt − θ)|. (21) Thus, the inductor can be seen as being connected two recti-fied sinusoidal voltages with identirecti-fied magnitude but with little phase difference between them, that is analogous to the basic circuit of power flow in the power system. In the basic circuit of power flow, as shown in Fig. 6, two ac voltage sources are interconnected by an inductor. Then, the real power P12 and
reactive power from the terminal 1 to terminal 2 is P12 = V1V2 2ωL sin(θ1− θ2) (22) Q12 = V1 2ωL[V1− V2cos(θ1− θ2)]. (23) From (21), the idea of the proposed SLCSC can be seen as the special case of the earlier basic circuit, where both amplitudes of two terminal voltages are equal to each other V1= V2 = ˆVsand
very little phase difference θ12 = θ1− θ2 ≈ 0 exists between
them. Then, the power flow contains near zero reactive power Q12≈ 0 and only real power P12 ≈ ˆVs2θ12/(2ωL) proportional
to the little phase difference θ12. Thus, we also obtain the same
result in (20).
In summary, by adjusting the little phase difference θ through the voltage controller, we can regulate the flow of real power and maintain near-zero flow of reactive power. Thus, from the point of power flow, the idea of the proposed SLCSC is tuning the phase difference θ between the terminal voltages to yield sinusoidal current in phase with the input voltage and regulate the output voltage.
TABLE II
SIMULATEDCIRCUITPARAMETERS
In (18), we can find that ˆIs= ( ˆVsθ)/(ωL). Additionally,
ˆ
Ishort is defined as the peak short-circuit current that will flow
if the input voltage vs with amplitude ˆVs was short-circuited
through boosting inductance L. It follows that ˆIs = θ ˆIshort. For
given current amplitude ˆIs, the interval length ϕ in which cusp
distortion occurs can be determined as follows [3]: ϕ = 2 tan−1 ˆ Is ˆ Ishort = 2 tan−1(θ). (24) In normal condition, the circuit parameter should be carefully designed to alleviate the cusp distortion as far as possible. It follows that interval length ϕ should be kept as small as possible. It implies that the assumptions of small θ and the simplification sin θ≈ θ are reasonable.
IV. SIMULATEDRESULTS
In this section, we begin with a series of computer simulations to demonstrate the proposed SLCSC. Some nominal values and circuit elements are listed in Table II. The simple plus-integral (PI) controller is used as the voltage controller in the developed SLCSC to automatically adjust the controllable phase.
A. Steady-State Response
For the circuit parameters in Table II, the simulated wave-forms are plotted in Fig. 7, where the enlarged signals 10× vcont,i and 10× vcont,v are plotted for the sake of comparison.
We can find that the output voltage vd is well regulated to the
voltage command Vd∗= 300 V, and the sinusoidal current is
is in phase with the input voltage vs. From Fig. 7, the control
signal vcont is obviously dominated by the component vcont,θ
because the voltage vL across the inductor is much higher than
the conduction voltage VF and the voltage across the inductor
resistance rL. The simulated total current harmonic distortion
THDiin Fig. 7 is about 6.64%.
B. Sensitivity—Inductance Parameter
In practice, the inductor value may become 20% smaller due to saturation or 10% larger because of production tolerance. In order to understand the controller performance of parameter variations, the simulated steady-state waveforms for the case of inductor with 20% smaller and 10% larger than the nominal
Fig. 7. Simulated steady-state waveforms for the proposed SLCSC
Fig. 8. Simulated steady-state waveforms for the case of inductor (a) with 20% smaller than the nominal value and (b) with 10% larger than the nominal value.
value are plotted in Fig. 8(a) and (b), respectively. Obviously, for the voltage regulation function of PFC, the output voltages vd
in both cases are well regulated to the desired voltage command Vd∗ = 300 V.
For the case of inductance 20% smaller than the nominal value in Fig. 8(a), the input current is is stagnated due to the
reduction of the feedforward effect from vcont,i, and thus, the
simulated THDi is increased to near 11.17%. In the other case
Fig. 9. Simulated waveforms with output capacitance (a) Cd= 280 µF and
(b) Cd= 160 µF.
can not only compensate the voltage drop on inductor resistance rL, but also alleviate the cusp distortion [11]. Consequently, the
simulated THDidecreases to near 4.76% smaller than 6.64% of
the nominal case in Fig. 7.
Note that it is not a good idea to continuously increase the inductance to amplify the feedforward effect of vcont,iin order to
reduce the current distortion and cusp distortion. The simulated results show that on the contrary, the simulated THDiwould be
larger than 6.64% when the inductance is 30% larger than the nominal value.
However, though the inductance variation aggravates the cur-rent distortion, the performance of curcur-rent shaping function is acceptable. Therefore, the PFC performance of the proposed SLCSC is not sensitive to the parameter variations.
C. Sensitivity—Amplitude of Output Voltage Ripple
In the assumption of bulk capacitor Cd, the output voltage vd
is equal to the voltage command Vd∗. However, a bulk capacitor is not permitted in practice due to the considerations of cost and volume. The simulated waveforms for the small output capacitance 280 and 160 µF are plotted in Fig. 9(a) and (b), respectively.
We can find that the amplitude of output voltage ripple in-creases from±5 V, as shown in Fig. 7, to ±20 V due to the reduction of output capacitances. The earlier the input current returns to zero before the zero-crossing points of input voltage [i.e., the more expansion of discontinuous current mode (DCM) close to the zero-crossing points of input voltage], the more
har-Fig. 10. Simulated waveforms for the proposed SLCSC during load change. (a) From 90% to 100%. (b) From 10% to 100%.
monics the input current possesses. Thus, the simulated THDi
increases from 6.64% in Fig. 7 to 13.6% and 25.6% in Fig. 9. However, from the voltage-regulation performance, the output voltages vd in both cases are well regulated to the desired
volt-age command Vd∗= 300 V. It follows that the sensibility of amplitude of output voltage ripples is acceptable.
D. Transient Response
The simulated load-regulation waveforms for the proposed SLCSC are plotted in Fig. 10(a), when the load resistance Rload
is suddenly changed from 200 (90% load) to 200 Ω1600 Ω = 177.78 Ω (near 100% load). In order to support sufficient power to regulate the output voltage, the input current magnitude is increased from 6.7 to near 7.3 A by SLCSC. The simulated load-regulation waveforms for the sudden power change from 10% rated load to 100% rated load is plotted in Fig. 10(b), and it shows that the regulation performance is also acceptable. From both cases, we can find that the input current isis always in phase
response. Consequently, the proposed SLCSC can keep good performance under the condition of load change.
V. EXPERIMENTALRESULTS
The proposed SLCSC has been digitally implemented in a DSP-based system using TMS320F240. Only input voltage and output voltage are sensed, where the former provides the phase information of input voltage and the latter helps to regulate the output voltage. The generation of the rectified signal s(ωt) and the phase shifter in the proposed SLCSC are implemented together by looking up a rectified sine table.
The rectified signal stored in memory is simply synchronized with the input voltage by alignment of individual zero-crossing points. In a system with fixed line frequency, the alignment of zero-crossing points is an effective method to synchronize with input voltage. In order to focus on the function of the proposed CSC, the phase shifter in this paper is implemented by the simplest way, i.e., looking up table with varying address offest. From the experience of implementation, the resolution of lookup table plays an important role in the performances of phase shifter and the proposed control. Too small resolution would result in instable operation.
In the experiment, the digital resolution of phase signal θ is set to 0.00008π rad. For sinusoidal current waveform in SLCSC, the respective digital resolution of input current magnitude ˆIs
and average input power are about 0.0267 A and 2.075 W, respectively, corresponding to the digital resolution of phase signal θ. All the circuit parameters in the experimental system have been listed in Table II.
The simple PI-type controller is used in the voltage loop. Its proportional gain is 0.0021 rad/V, and the integral gain is 0.067 rad/V·sec−1.
A. Steady-State Response
Fig. 11 shows the experimental waveforms for the proposed SLCSC at the condition V∗= 300 V and Rload= 177.78 Ω.
The phase signal θ shown in the middle plot keeps around 0.021π rad·s in order to stably yield enough input power to regulate the output voltage. It is noted that the phase signal θ≈ 0.021π is so small that it is reasonable to use the approximations sin θ≈ θ and cos θ≈ 1 in the derivation of (15).
The signals vcont,θ, vcont,i, and the average duty signal ¯d are
also plotted together to help understanding the operation of the proposed SLCSC. Since signal vcont,θ is higher than the signal
vcont,i, we can find that average duty signal ¯d is dominated by
signal vcont,θ. It follows that the maximum duty ratio is 100%,
and minimum duty ratio is about 48% equal to the ratio of input voltage magnitude ˆVs = 155 V to the output voltage command
Vd∗= 300 V. Due to the experimental resolution, the measured total current harmonic distortion THDiis about 12.56%.
How-ever, from the top plot of output voltage vdand the bottom plots
of input current isand input voltage vs, we can find that the
pro-posed SLCSC meets the PFC functions, including input current shaping and output voltage regulation.
The experimental waveforms under partial load RLoad =
500 Ω(≈180 W) and RLoad = 300 Ω(≈315 W) are plotted in
Fig. 11. Experimental steady-state waveforms for SLCSC.
Fig. 12. Experimental input current and voltage waveforms under partial load. (a) RL o a d= 500 Ω. (b) RL o a d= 300 Ω.
Fig. 12(a) and (b), respectively. Due to the digital resolution of phase signal θ, the input current returns to zero and keep zero current until the next cycle under light load. Thus, the stagnated current would result in rich harmonic currents and the large
Fig. 13. Experimental variation of (a) THDiand (b) PF with delivered power.
measured total current harmonic distortion THDi. To
under-stand the performance of various load power, the experimen-tal variation of the measured toexperimen-tal current harmonic distortion THDiand power factor (PF) with various delivered power are
plotted in Fig. 13(a) and (b), respectively. It follows that the higher the delivered power, the smaller the THDithe input
cur-rent possesses and the higher PF the input quality. In addition, because in the earlier experiment, the input voltage is the pure sinusoidal voltage, only the fundamental component in input current is able to contribute to generate real power.
In practice, the inductance varies with the inductor current, but the inductance parameter used in control loop is fixed, which implies that parameter mismatch occurs. In simulation, the in-ductance is fixed, which means that no parameter mismatch occurs. For less current distortion found in the simulated wave-forms of Fig. 7, we can find that the inductance mismatch mainly contributes to the current distortion and the expansion of DCM close to the zero-crossing point. In addition, the mismatch of real circuit parameter and the used circuit parameter would lead to two effects. One is the easy entrance into DCM close to the zero-cross points, and the other is the current distortion.
Since the inductance parameter used in control loop is fixed regardless of high and low powers, the parameter mismatch becomes more serious at low power. It contributes to the increase of duration of DCM close to the zero-cross points at low power. Thus, the tendency shown in Fig. 12 is related to the DCM limitations.
B. Transient Response
To verify the dynamic performance of the proposed SLCSC, some experimental results are shown in Fig. 14, where the load resistance is suddenly changed from 200 Ω(≈475 W) to 177.78 Ω(≈530 W). In order to regulate the output voltage, the phase signal θ increases due to the PI-type voltage controller in order to yield sufficient input current and input power. During
Fig. 14. Experimental waveforms with SLCSC during load regulation.
Fig. 15. Experimental input current and voltage waveforms under various load. (a) Ps= 762 W. (b) Ps = 543 W. (c) Ps = 370 W. (d) Ps= 180 W.
Fig. 16. Experimental variation of (a) THDiand (b) PF under distorted input
voltage.
the regulation, the input current keeps in phase with the input voltage. It clearly shows that the proposed single-loop CSC also possesses good regulation ability.
C. Distorted Input Voltage
To further verify the performance of the proposed SLCSC, a distorted input voltage with THDv ≈ 4% is used in the following
experiment. Some experimental waveforms with various yielded powers are shown in Fig. 15. From the input waveforms, the proposed SLCSC is stable and still can yield the PFC functions of current shaping and voltage regulation. The variations of THDiand PF with delivered power are plotted in Fig. 16(a) and
(b), respectively. Obviously, due to the voltage distortion, THDi
in Fig. 16(a) is higher than that in Fig. 13(a).
It is noted that with pure sinusoidal input voltage in Figs. 11– 14, no average power can be yielded from the harmonic currents. But with the distorted voltage, the harmonic current may result in some average power due to the existence of the voltage com-ponent of the same harmonic orders. Therefore, the variation of
PF with distorted voltage shown in Fig. 16(b) is slightly higher than that with pure sinusoidal voltage shown in Fig. 13(b).
VI. CONCLUSION
In this paper, the proposed SLCSC for boost-type SMRs have been analyzed. A prototype of boost-type SMR controlled by a DSP evaluation board was built to verify the proposed SLCSC. From the simulation and experimental results, the proposed SLCSC possesses good performance under not only steady-state condition, but also transient condition, and can meet the desired PFC functions with parameter variation and distorted in-put voltage. In addition, compared with the conventional multi-loop control, the proposed SLCSC is simple and a cost-effective solution for PFC application.
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Hung-Chi Chen was born in Taichung, Taiwan,
in June 1974. He received the B.S. and Ph.D. de-grees from the Department of Electrical Engineering, National Tsing-Hua University (NTHU), Hsinchu, Taiwan, in 1996 and 2001, respectively.
From October 2001, he was a Researcher at the Energy and Resources Laboratory (ERL), Industrial Technology Research Institute (ITRI), Hsinchu. In August 2006, he joined the Department of Electrical and Control (ECE), National Chiao-Tung University (NCTU), Hsinchu, where he is currently an Assistant Professor. His research interests include power electronics, power factor correc-tion, motor and inverter-fed control, and DSP/MCU-based implementation.
