FUZZY-CLUSTERING-BASED ALGORITHM FOR CIRCUIT PARTITIONING IN STANDARD CELL PLACEMENT

Fuzzy-clustering-based algorithm for circuit

partitioning in standard cell placement

Jin-Tai Yan

The technique dcircuit p;irtitiuning has hccii applied to standard ccll placement for m a n y ycars. A fuLry-clustcrinp-b;ised algorithm 1 5 praposcd to obtain a hctter t ~ o - w a y arca-constrained partitioning for a partitionin@-oricntcd standard c r l l placement. Tlic proposed algorithm ha* testrd s c v x i l industrial cjrcuit hcnchmnrks. and ths expcrimcntal rraults have sho%n that the ;ilporithm obtain, 'I hcttcr parlitwninp than the traditional F-M ~leorithm

111~ri~ditc~i~111: I n standard cell layout. the placement phase plays a n important role in the automation of physical design. However. i t is \\ell known that the placement problem has been proved to bc NP-hard [I]. Thus. the technique of circuit partitioning has been extensively proposed to develop a partitioning-oriented placement.

I n general. owing t o the constraint of time complexity. two-way mill-cut partitioning is always conzidered. In particular. the Fiduc- cia-Mattheyses IF-MI algorithm [2] is most often applied in tlie design of a standard cell placement [3. 41. I n Fig. I . two-way cir- cuit partitioning is applied to a partitioning-oriented standard cell placement.

98211

Fig. 1 TII o-1vii!' cimiii pnrfifioiiiiig in (i ~ ~ ~ i r i i i i ~ ~ i ~ i i i , ~ - ~ i ~ i i ~ i i ~ ~ ~ i I .sf~ti~i/iiriI < P / / pl~l~<~lll<~lll

Fu7z?-clustcring algorithms [5] have been extemivcl? proposed for image processing and pattern recognition. Traditionally. based on the measure of geometrical distance, fuzzy-clustering algo- rithms will be applied to classify the image data on an image sur- face. I n this Letter we extend these fuzzy clustering algorithm to

a graph structure and further solve circuit partitioning for stand- ard cell placement.

For circuit partitioning in a partitioning-oricnted standard cell placement. first. a circuit netlist of standard cells will he trans- formed into an edge-weighted graph by a tree net model. Further- more. based on the definition of the clustering distance on a graph structure. furzy graph clustering will be applied to obtain two groups of fuzzy memberships. Finally. according t o these membcr- ships and the information of cell areas. all the standard cells in a circuit netlist will he partitioned into two subcircuit netlists with a given area constraint.

P r o h l m . f o r i ~ i ~ t I ~ i f i o i ~ : In standard cell layout. tlie height of each cell will he the same and the width of each cell inay be diffcrent. Therefore. the area of each cell may be different. In general. based on the area consideration of standard cell layout. full area-bal- anced partitioning is more suitable for partitioning-oriented stand- ard cell placement. Honcver. owing to tlie area irregularity o f standard cells and the assignment of feedthrough cells, area-coii- strained partitioning is more practical for partitioning-oriented standard cell placement. I n t\*o-way area-constrained partitioning. based on the net and area distributions of standard cells. a lower bound a and a11 upper bound

p

of any partitioning area will bc estimated and given. where 0 9

a

9 0.5. 0.5

s p s

I and

a +

p

= I . Hence. if a circuit netlist C is partitioned into two subcircuit netlists and C.. two-way area-constrained partitioning for a standard cell placement will be formulated a s a partition ( c ' , , C,) of C sucli that the cut of the partition IC,. C.) is minimised with

where total-areaIC) is the sum of areas or all the standard cells in c'.

F u ~ ~ ~ - c I i i s f ~ ~ r i i i g - h a s e r l partitiatling d ~ o r f f l i i n : In general. a circuit netlist is mapped as a hypergraph. Thus, circuit partitioning will correspond to hypergraph partitioning. I t is well known that hypergraph partitioning is more difficult than graph partitioning. Hence. circuit partitioning is always solved by first transforming a hypergraph into a graph using a clique net model. that is. foi- any /)-pin hypcredge 1' > I . p ( p 1)'2 complete connections of / I pins will be generated i n tlie mapped g r a p h In general. based on thc connection of 1' pins. only 1.o I ) edges in a tree net modcl arc applied to maintain the connection of a p-pin hyperedge.

For a circuit netlist. we propose a tree net model to trnnsform a multiple-pin net into a tree connection and assume that the cut contribution in a tree representation of a net inus1 be obtained b> a n expected value of I . Thus. for two-uay partitioning of a /'-pin net. the number of distributions of11 pins is (2/' - 21. Assume that any distribution of11 pins is uniform: hence. the probability of an) distribution o f p pins is l/(21'-2). If i of (p ~ I ) connections are bro-

ken to separate 11 pins into two different groups. the number of all

the possible separations will be obtained as 2Cp I . Because the expected cut contribution of ii p-pin net in a tree represcntiition i h

I, it is clcar that

where wP is the edge weight of (11 I I coiinectioiis for a /)-pin net in :I tree net model.

Therefore. according to the previous equation. II.), sill be obtained as = ?.'(p-ll. By transforming all the hypercdgcs. il circuit netlist will he mapped by an edge-weighted graph. Hence. two-way circuit partitioning will he approximately obtained by two-way graph partitioning. I n this Letter. two further phases are applied to obtain a two-way area-constrained partitioning after the graph transformation.

In phase 1. according to the mapped edge-weighted graph G( I,'.

E). a related clustering graph G'l 1,". E') will be defined b? rnodify- ing all the edge weights as c',, = I / C , ~ . where I" = V. €' = € and c ' , ~ is the weight of the edge ( i . j ) . Furthermore. the clustering dis- tance will be defined as follows: for any pair of vertices i a11d.j. the clustering distance

d',,

between vertex i and .j will be further obtained a s

( I ; , = { I : , if { I . J ] is

iiii txilgi, iii C: if { I . I } is not i i i i

(YI:I,

i i i C4 Sliort~P;itli(/.,j)

where Short-Path(.v, f ) represent5 the sum of weights on the short- est path from Vertex s to /. Based on the definition of d',, and fur7y c-means clustering [ 5 ] . as f u z y graph clustering converges on all the fuzzy memberships. trio groups of furzy memberships for all the vertices in G will bc generated.

In phase 2. first. according to one group of fuzzy memberships. all the vertices .xl... .x,,l i n G uill he sorted decrcaainglq into a vertex list. .x*,. i*? ,.... . Y * ~ , . Furthermore. based on tlie areas of all the standard cells and the values of a lower bound a. and an upper bound

p.

two pairs of feasible area-constrained indices ( I , . 11,) and (1:. I I ? ) for two clusters m i l l he obtained by sequentially

searching the vertex list such that I,-l 4(.1r, i

<

l ~ ~ t o t ~ i l ~ ; l r l ~ ~ l [ ~ j )

5

c

.4( l', I md - p l . I . ; i

5

~ ( l ~ l t ~ ~ l . ; i l ( ~ ; i ( ( ' i i

5

.4(.i,

I

t - I 3- I i l l f l , = I ) I and .4(.l,

15

~ l ( t l ) t ; ~ l ~ ; ~ l ( ~ ~ ~ l ( ' ) )

5

2

A(.t,, j i I R I I I I

1

. 4 ( l ' z i

5

~ ( t o t a ~ - t l l ? ; i ( ~ ) j

5

1

.4(.r8 ) / - I / ,:11-1

where A(.x) is the area of the standard cell representing vertex .v. Finally. according to ( I , . i t , ) and (&. a feasible partitioning index ( / , L O = lniax(1,. L } . miii[u,, i i ? ; ) will be generated for two-

way area-constrained partitioning. Hence. a two-\\ay iiiin-cut par-

titioning will be further obtained by searching all the area-con- strained partitioning.

As mentioned above, the fuzzy-clustering-based algorithm for circuit partitioning in a partitioning-oriented standard cell place- ment is as follows:

S t e p I : M a p a circuit netlist C into a hypergraph H( V, Eh) Step 2: Transform H( V, &) into a n edge-weighted graph G( V, @ by a tree net model.

S t e p 3:

( I ) Initial a n arbitrary two-way partitioning and establish a fuzzy matrix U.

( 2 ) Compute all the clustering distance d‘,! in G.

Step 4 :

( I ) Calculate the centres v = (vl. v I ) using U a s follows:

for 1

5

i

5

2 .r3

E

V

where Dist(.x,. v,) is the clustering distance between vertex x, and I’, .

(2) Calculate a new fuzzy matrix U’ using v = ( v I , v?) as foIIows:

If ( . r b # I * ~ AND .I’L

#

v a )

Else

1 if .ck = 1 1 ,

0 if .rk

#

vi. 1

5 i 5

2 . 1

5 k

5

11

=

{

( 3 ) Compare U and U’; if

IU’,~-U~~I

< E, for 1 5 i S 2, 1 2 k 2 n, then stop; otherwise, U = U’+ and go t o ( I ) .

Step 5 :

( I ) Sort the vertex set (I,, x2, ... } and construct an increasing vertex list .stl. .s*? ,..., .s*,,. according t o one group of fuzzy mem- berships U , , . 1 5 i 5 n.

(2) Generate two pairs of feasible area indices. U , ) and (/>, u2) and the feasible partitioning index (!,U).

( 3 ) Find a two-way min-cut partitioning by searching all the feasi- ble area-constrained partitioning according t o the partitioning index (1. U ) and compute the partitioning cut.

€.\perinientul results: The proposed fuzzy-clustering-based algo- rithm has been implemented using standard C language and on a SUN workstation under the Berkeley 4.2 UNIX operating system. In this implementation, the E value in this algorithm is assigned as

0.01. and the proposed algorithm is run on each test benchmark 20 times with different initial partitioning.

For two-way circuit partitioning in a partitioning-oriented standard cell placement with an area constraint

(a,

p),

the total cell area (TCA) is the sum of areas of the standard cells in a cir- cuit netlist, and the area constraint

(a,

p)

for any partitioning part (PA,) is as follows:

TC.4

*

a

5

PA,

5

TCA

*

L j

for 1

5

i

5

2 . 0

5

U

5

0.5. 0.5

5

3

5

1 a i d a

+

,-I = 1 Table I: Comparison af experimental results with (a, b) = (0.4. 0.6)

h”KI PnmGA pnmsc: Test O? Test03 Teat 04 Test 05 SA ( I O runs)

Best Avg.

I

k t Avg.

I

F&M (500 runs) 88.6 59 86.4 1 4 5 3 f i n c u t M i n a 1 Best Avg. 123 119 I15 124.7 I20 119 115 126.7 92 83 79 85.4 59.6 43 44 44 45.5 42 47 42 43.8 62 47 45 52.7

For M C N C benchmarks in circuit partitioning, Table 1 shows the experimental results for two-way min-cut partitioning with

a

= 0.4 and !3 = 0.6. In this Table, the simulated annealing (SA), Fiduccia-Mattheyses (F-M), primal-dual (PD), H G C E P and fuzzy-clustering-based (FCB) algorithms are evaluated. The results of SA, F-M, P D and H G C E P are from [6] and the results of FCB are from 20 runs.

0 IEE 1995

Electronics Letters Online No: I9950121

Jin-Tai Yan (Department

of

Computer and Infornzation Science, National Chiao Tung University, Hsinchu, Taiwan, Republic of China)

17 October 1994

References

I

2 FIDUCCIA, c.M., and MAITHEYSES, R.M.: ‘A linear-time heuristic for improving network parititions’. Proc. ACM/IEEE 19th Design Automation Conf., 1982, pp. 175-181

DUNLOP. A.E., and KERNIGHAN. B.w.: ‘A procedure for placement of standard cell VLSI circuits’, IEEE Trans., 1985. C A D 4 pp. 92-98 CHO, H.G., and KYUNCCM.: ‘A heuristic standard cell placement algorithm using constrained multistage graph model’. IEEE Trans., 1988, CAD-7, pp. 1205-1214

K I M , I., BEZDEK, J.c., and HATHAWAY, R.J.: ‘Optimality tests for fixed points of the fuzzy c-means algorithm’, Pattern Recognit., 1988, 21, pp. 651-663

6 S H I N , H , and K I M . C . : ‘A simple yet effective technique for partitioning’, IEEE Trans. VLSI Syst., 1993, 1, (3), pp. 380-386 3

4

5

Mixed-mode Schmitt trigger equivalent

circuit

S.R. Ramirez Chavez

Inde-ying terms: Comparrrtor.t CMOS interrated circuit.^,

Equirulent circuits, Mi.xed anulogur-di@lal intepzted circuits. Trigger circuits

A circuit implementing the regenerative comparator or Schmitt trigger function is presented. While the traditional Schmitt trigger implements the hysteresis levels by means of positive feedback in an analogue loop, our circuit implements hysteresis by digitally processing the output of two comparators operating in open-loop mode. The threshold levels of the new circuit can be independently set and fine-tuned which is not the case in many traditional Schmitt trigger implementations.

Inlroduction: The regenerative comparator or Schmitt trigger was introduced by Otto Schmitt in the 1930s [I]. Since then, this circuit has been used t o reduce the noise effects in triggering devices [2], analogue t o digital conversion [3] and other applications.

Since its invention, the Schmitt trigger circuit has relied o n changing the voltage or current threshold levels by means of posi- tive feedback in the analogue loop. In their textbook, Millman and Halkias [4] discuss bow this is done by means of a resistive voltage divider. Other voltage mode feedback circuits, which are more suitable for VLSI implementation, are discussed by Steyaert [5] and Dokik [6]. Schmitt trigger circuits with current feedback are discussed by Filanovsky [7] and Wang [SI.

comparator

‘out -high Vout

-

Vref -him+ vout -laN

h n p u t

:

m

I

Fig. 1 Traditional voltage mode Schmitt trigger principle of operation Principle qf operation of traditional Schmitt trigger: The basic prin- ciple for a voltage-mode feedback Schmitt trigger is shown in Fig.