414 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 5, MAY 2010
Impact of Process-Induced Uniaxial Strain on
the Temperature Dependence of Carrier
Mobility in Nanoscale pMOSFETs
William P. N. Chen, Jack J. Y. Kuo, and Pin Su, Member, IEEE
Abstract—This letter provides an experimental assessment of
temperature dependence of mobility for advanced short-channel strained devices. By accurate split C –V mobility extraction under various temperatures, we examine the impact of process-induced uniaxial strain on the temperature dependence of mobility and mobility enhancement in nanoscale pMOSFETs. Our study in-dicates that the strain sensitivity of hole mobility becomes less with increasing temperature, and it is consistent with previous mechanical-bending result. Furthermore, the carrier-scattering mechanism for the pMOSFET under uniaxial compressive strain tends to be more phonon limited at a given vertical electric field, which explains the larger drain current sensitivity to temperature present in the compressively strained PFET.
Index Terms—Mobility, MOSFET, strain silicon, temperature
dependence.
I. INTRODUCTION
U
NIAXIAL strained-Si technology is crucial to transis-tor performance in state-of-the-art CMOS development [1]–[3]. The temperature effect on strain-enhanced mobility is of special importance because it may provide insights for the underlying mechanisms responsible for the performance enhancement. Several studies have investigated the temperature effect on strain-enhanced mobility in the past [4]–[7]. For NMOS, the temperature effect of process-induced biaxial strain [4], [5], uniaxial strain [4], and mechanical uniaxial strain [6] applied on devices has been experimentally studied. The results all indicated less strain sensitivity in carrier mobility with decreasing temperature. For PMOS, the temperature effect of process-induced biaxial strain [5] and mechanical uniaxial strain [7] has also been investigated. The results showed higher strain sensitivity in carrier mobility with decreasing tempera-ture, i.e., an opposite trend with NMOS. However, the tem-perature effect of process-induced uniaxial strain in nanoscale PMOS devices is still not reported and merits investigation.Manuscript received September 17, 2009; revised January 5, 2010 and February 11, 2010. Date of publication April 5, 2010; date of current version April 23, 2010. This work was supported in part by the National Science Council of Taiwan under Contract NSC98-2221-E-009-178 and in part by the Ministry of Education in Taiwan under the ATU Program. The review of this letter was arranged by Editor L. Selmi.
The authors are with the Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30013, Taiwan (e-mail: williamchen.ee93g@nctu.edu.tw; jack.ee93g@nctu.edu.tw; pinsu@faculty.nctu.edu.tw).
Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LED.2010.2044553
In this letter, we conduct an experimental assessment for the impact of the process-induced uniaxial strain on the tempera-ture dependence of carrier mobility in nanoscale pMOSFETs.
II. EXPERIMENTALSETUP
pMOSFETs with channel direction110 with neutral, ten-sile, and compressive uniaxial contact Etch-Stop Layer (CESL) were manufactured based on the state-of-the-art CMOS tech-nology on a 300-mm (100) silicon substrate [8], [9]. Shallow Trench Isolation (STI) was patterned to define the active region. A uniform channel doping was implanted to define the PMOS devices and maintain reasonable threshold voltage. Then an ultrathin nitride oxide was grown on the surface of the wafer. The polygate was implanted with heavily doped P+ species and postannealed to increase the gate activation rates. Then the ultrashallow Highly Doped Drain (HDD) implant, oxide/nitride spacer formation, source and drain implant, postimplantation annealing, and back-end process were implemented sequen-tially. The effective channel doping is around 2× 1018 cm−3 for short-channel devices based on TCAD simulation. The equivalent oxide thickness is about 17 Å. For comparison pur-poses, nitride films with neutral,−2.8-GPa compressive strain, and 1.6-GPa tensile stress were deposited on pMOSFETs at the CESL deposition stage. The details about our TCAD simulation are in [15].
Since the external resistance (Rsd) is crucial to the
short-channel mobility extraction [10], [11], the intrinsic drain cur-rent (ID) was calibrated by considering the series-resistance
effect [8]. The physical polygate length (Lphy) was obtained
using inline SEM measurement. The LDD overlap region under the gate (Lov) was extracted by the split C–V method [14].
The effective channel length (LEFF) can then be derived by
subtracting Lov from Lphy. Finally, the mobility for
short-channel devices can be determined [8]. In this letter, PMOS devices with effective channel length LEFF = 95 nm were
measured with temperature ranging from 100 to 300 K. III. RESULTS ANDDISCUSSION
Fig. 1 shows the drain current (ID) versus gate voltage
char-acteristics at various temperatures for the PMOS devices under test. The drain current shows strong correlation with stressor types and can be explained by the extracted carrier mobility, as shown in Fig. 2. It can be seen from Fig. 2 that the short-channel mobility in PMOS (LEFF= 95 nm) shows significant
dependence on the uniaxial strain. The PMOS mobility prefers
CHEN et al.: IMPACT OF PROCESS-INDUCED UNIAXIAL STRAIN ON TEMPERATURE DEPENDENCE 415
Fig. 1. Drain current versus gate voltage at various temperatures for PFETs with various stressors. The drain bias (VDS) is−5 mV. The temperature dependence of the drain current shows strong correlation with stressor types. The length of diffusion is 0.29 μm.
Fig. 2. Extracted carrier mobility shows significant dependence on the uniax-ial stressor.
compressive stress because of the strain-reduced conductivity effective mass [9].
In addition, Fig. 2 shows that the mobility is degraded when temperature increases in the high vertical-field region, where phonon scattering is important [12], [13]. Moreover, the temperature dependence of mobility shows strong sensitivity to strain. In other words, as the mobility is enhanced by compres-sive strain, its temperature dependence also increases.
Fig. 3 shows the temperature sensitivity (log μ/ log T ) of the hole mobility versus the vertical effective electric field (EEFF).
For a given stressor, it can be seen that the temperature sensitiv-ity increases (i.e., more negative) and then saturates as EEFF
in-creases. More importantly, the log μ/ log T for the PFET under compressive strain is the highest in absolute value among the three stressors. In other words, the scattering mechanism of the PMOS device becomes more phonon limited [12], [13] under compressive strain. This also explains why the temperature sensitivity of drain current for the compressively strained PFET is the largest among the three stressors, as shown in Fig. 1.
Fig. 4 shows the hole-mobility enhancement (Δμ/μ) versus temperature at EEFF= 1.5 MV/cm. It shows that for both
com-pressive and tensile stressors, the magnitude of Δμ/μ decreases as temperature increases. Our result from the process-induced
Fig. 3. Temperature sensitivity of hole mobility versus the vertical field for various uniaxial stressors.
Fig. 4. Hole-mobility enhancement versus temperature at EEFF= 1.5 MV/cm for PMOS devices with various stressors.
uniaxial stressors is consistent with the study in [7], in which an external compressive uniaxial mechanical stress was applied.
Based on the model proposed in [7], it is plausible that as temperature increases, the compressively strained PFET has less holes to populate states near the band edge where the con-ductivity effective mass along the channel direction is smaller. Therefore, the observed mobility enhancement decreases with increasing temperature.
IV. CONCLUSION
We have investigated the temperature dependence of mo-bility for advanced short-channel strained PMOS devices. By accurate split C–V mobility extraction under various temper-atures, we examine the impact of process-induced uniaxial strain on the temperature dependence of mobility and mobility enhancement in nanoscale pMOSFETs. Our study indicates that the strain sensitivity of hole mobility becomes less with in-creasing temperature, and it is consistent with previous uniaxial mechanical-bending result. Furthermore, the carrier-scattering mechanism for the pMOSFET under uniaxial compressive strain tends to be more phonon limited at a given vertical electric field, which explains the larger drain current sensitivity to temperature present in the compressively strained PFET.
416 IEEE ELECTRON DEVICE LETTERS, VOL. 31, NO. 5, MAY 2010
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