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CFO Compensation in Frequency Domain

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(1)

CFO Compensation in Frequency

CFO Compensation in Frequency

Domain

Domain

Presenter: Pin-Hsun Lin

Advisor: Prof. Tzi-Dar Chiueh

Date: Aug. 18

th

2003

(2)

Outline

Outline

• Motivation

• Time-delay in a loop

– What are the impacts of delay in a loop?

– How the error performance degrades with the prolonged settling time?

– Under what condition the conventional method is improper? – Loop filter design for a stable system

• With/without consideration of phase error variance

• Preliminary remedies

– Frequency domain compensation

• Circular convolution, interpolator, rotation

(3)

Motivation

Motivation

• In the 802.11a project the time domain CFO

tracking is said to be unstable since there’s a

large delay (FFT block)

• Find out how the delay affects the burst

communication and how to solve the problem

caused by the effect efficiently.

(4)

Model of delay in a loop

Model of delay in a loop

FFT FFT CFO EstimatorCFO Estimator NCO NCO Up to 2 OFDM symbols delay • Pipeline registers

• Latency of signal processing blocks:

―FFT, CFO estimation, TFO estimation, etc. Some causes of the delay in feedback loop in a

communication system include:

ACC ACC 2 2 1 1 NCO NCO ACC ACC

If symbol based estimator is used

(5)

Impacts of delay in a loop:

Impacts of delay in a loop:

The optimal natural frequency is decreased [1] The optimal natural frequency is decreased [1] The error variance increases [1] The error variance increases [1] Delay in a loop increases Delay in a loop increases Trade-off

The settling time increases [3] [4].

The settling time increases [3] [4].

(6)

Impacts of delay in a loop:

Impacts of delay in a loop:

the model of loop with delay [1][2]

the model of loop with delay [1][2]

LO , R LO , T

φ

φ

-KD KD K0/S K0/S F(s)F(s) VCO , R

φ

)

t

(

n

-∞∞ ∞ ∞ - SPN f - H f df SWN f H f df WN PN 2 2 2 2 2 | ) ( | ) ( | ) ( 1 | ) (        2

)

(

)

(

s

H

s

k

k

s

F

f p LO WN PN S kP f f S  ,  2 2  Close loop transfer function 0 L P f

 is the laser line-width

Delay

τ

Delay

τ

(7)

Impacts of delay in a loop:

Impacts of delay in a loop:

the increased error variance and the

the increased error variance and the

decreased optimal natural frequency [1][2]

decreased optimal natural frequency [1][2]

Bit rate=565Mbps

MHz

1

=

f

δ

Optimal loop design No modification

according to the loop delay

(8)

How the error rate performance degrades

How the error rate performance degrades

with the prolonged settling time?

with the prolonged settling time?

The length of settling time

The length of settling time

Accuracy of coarse synchronization Accuracy of coarse synchronization Length of training sequence Length of training sequence

Error rate performance

Error rate performance

Delay in a loop

(9)

Under what condition the

Under what condition the

conventional method is improper?

conventional method is improper?

If the previous relationship is valid, then

under the following conditions the

conventional methods are improper:

• In burst communication (not such long time

for convergence)

• When training symbol is very short like

802.11a

(10)

Loop filter design for a stable system:

Loop filter design for a stable system:

w/o consideration of phase error variance

w/o consideration of phase error variance

[3]

[3]

0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 3.5 4 Kp K f )] 1 2 /( , 0 [ ) ) 2 / 1 cos(( ) 2 / tan( ) 2 / sin( 4 ) ( ) 2 / tan( ) ) 1 sin(( 2 ) ( 0        M M k M k k f p f         

Analytical method:

The stable region is enclosed by:

M is the samples of delay

M=0 M=1

M=2

(11)

Loop filter design for a stable system:

Loop filter design for a stable system:

w/o consideration of phase error variance

w/o consideration of phase error variance

[4]

[4]

• Replacing z=exp(u+jv)

into the denominator of the loop transfer function.

• scan u>0 and v=0~2*pi • The region doesn’t cover

by the spirals is the stable

region as the right figure 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 kf

Numerical method:

(12)

Loop filter design for a stable system:

Loop filter design for a stable system:

with consideration of phase error variance

with consideration of phase error variance

[5]

[5]

• Given delay want to find an F(s) that minimizes the phase error variance:

1

)

(

)

(

)

(

)

(

)

(

)

(

' `

s

Y

s

M

S

X

s

N

s

M

s

N

e

theorem s Cauchy ion approximat e Pad s

Then F (S) stabilizes the loop iff:

NQ Y MQ X s F    ) (

where Q is any stable proper and rational function. Then find Q by minimizing .

2

(The solution is complicated so isn’t shown here.) 1.

2. 3.

(13)

Preliminary Remedies

(14)

Compensate the error in frequency

Compensate the error in frequency

domain

domain

FFT FFT CFO compensatorCFO compensator CFO EstimatorCFO Estimator

• The latency of the frequency domain compensator must be smaller than the time domain one.

• The additional complexity must be moderate.

(15)

Frequency domain compensation:

Frequency domain compensation:

Circular convolution

Circular convolution

• Time domain rotation is equivalent to

frequency domain circular convolution.

)

n

+

Y

HW

(

E

=

r

n

+

Y

HW

=

r

H

d H

)

n

+

Y

HW

(

AWE

)

n

+

Y

HW

(

E

W

H H 1

-Time domain compensation:

Frequency domain compensation:

H 1 1

W

W

N

1

=

A

W

=

AW

-

-⇒

(16)

Frequency domain compensation:

Frequency domain compensation:

Circular convolution (cont’d)

Circular convolution (cont’d)

Trunca

t ion

(17)

Frequency domain compensation:

Frequency domain compensation:

Circular convolution (cont’d)

Circular convolution (cont’d)

• The length to be truncated can be determined by:

• The computational complexity can be further optimized by the Chinese remainder theory

(CRT) and the latency can be further improved. • Low latency architecture is under researched.

<

σ

,

|

h

h

|

=

(18)

Interpolator [6]

Interpolator [6]

FFT FFT N NP NP interpolator interpolator N CFO Estimator CFO Estimator Zero padding Zero padding P P 1st stage 2nd stage

(19)

Interpolator (cont’d)

Interpolator (cont’d)

• The constant BER degradation between no CFO and the cubic interpolator may be because not enough information is

included to do the compensation. • The sufficient and necessary

conditions for the usage of interpolator is needed be investigated.

~0.001

CFO normalized to the sub-carrier spacing

 

(20)

Rotation [7]

Rotation [7]

• Rotation is the easiest method with the lowest

latency and the worst error performance.

• When CFO is small, the effect of CFO can be considered as a phase rotation.

the residual CFO can be compensated by frequency

domain rotation.

• The ICI can’t be removed by the rotation.

• The resulted SNR degradation is related to how accuracy the coarse synchronization can achieve.

(21)

Rotation (cont’d)

Rotation (cont’d)

0 s 2 N E ) R f Δ N π ( 10 ln 3 10

OFDM

BER

M

log

SER

2

Given BER, we can get SER by the following approximation for M-ary modulation :

Using the SER we can get the corresponding SNR. With the SNR and the following approximation we can get the SNR degradation (SINRnon-ideal-SNRideal in dB).

(22)

Conclusion

Conclusion

• The impacts of delay in a loop were introduced.

• 3 Loop filter design methods for a stabilize a time-delay system were introduce.

• 3 frequency domain compensation methods were introduced • Research the relationship between the error rate

performance degradation and the prolonged settling time.

• Validate the sufficient and necessary conditions for the usage of interpolator.

• Merge the circular convolution and the interpolator and find a low latency architecture.

(23)

Reference

Reference

• [1] M. A. Grant, W. C. Michie and M. J. Fletcher, “The performance of optical

phase-locked loops in the presence of nonnegligible loop propagation delay,”

IEEE Journal of Lightwave Technology, Vol. 5, No.4, April, 1987, pp. 592-597. • [2] S. Norimatsu and K. Iwashita, “PLL propagation Delay-time influence on

linewidth requirements of optical PSK homodyne detection,” IEEE Journal of

Lightwave Technology, Vol. 9, No.10, Oct, 1991, pp. 1367-1375.

• [3] J.W.M. Bergmans, “Effect of loop delay on stability of discrete-time PLL, “Circuits and Systems I: Fundamental Theory and Applications. IEEE

Transactions on, Volume: 42 Issue: 4, April 1995, pp. 229 -231

• [4] A. D. Gloria, D. Grosso and M. Olivieri and G. Restani, “A novel stability

analysis of a PLL for timing recovery in hard disk drives,” Circuits and Systems

I: Fundamental Theory and Applications, IEEE Transactions on , Volume: 46 Issue: 8 , Aug. 1999 pp. 1026 -1031

• [5] O. Yaniv and D. Raphaeli, “Near-optimal PLL design for decision-feedback

carrier and timing Recovery,” IEEE Trans, Commu. Vol. 49, No. 9, Sept 2001, pp.

1669-1678

• [6] M. Luise, M. Marselli and R. Reggiannini, “Low-complexity blind carrier

frequency recovery for OFDM signals over frequency-selective radio channels,”

Communications, IEEE Transactions on, Vol. 50, No. 7, July 2002 pp. 1182 -1188 • [7] T. Pollet, M. V. Bladel and M. Moeneclaey, “BER sensitivity of OFDM systems

to carrier frequency offset and Wiener phase noise,” IEEE Trans, Commu. Vol.

參考文獻

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