A Study of Characterization and Analysis in P-Channel Flash Memory Devices 曾德彰、陳勝利
E-mail: [email protected]
ABSTRACT
Abstract The flash memory is a better choice than others in the nonvolatile memory market, therefore, it will be much valuable for us to investigate its characteristics, and there are lots of researches about it. Recently, the research of flash memory, the focus is always concentrated on the threshold voltage shift due to programming or erasing operation, data retention time, data endurance, programming efficiency, erasing speed, and so on. This benifits higher device reliability, speed, and integrity. The nonvolatile memory devices have the capability to store the informations. The most used programming method is F-N tunneling scheme or channel-hot-electron(CHE) scheme overcoming the floating gate barrier. It is very convenient for N-channel flash memory to program by positive gate bias. So that P-channel flash memory is less attracted to researchers. The data storage is mainly determined by the charges on the floating gate. Such that if the change of charge on the floating gate can be accurate to predict, then the shifting of devices threshold voltage and the data storage or not can be discriminated. Therefore in this thesis, we will investigate the
threshold voltage alteration during the programming and erasing operation of the submicron P-channel flash memory. And, a comparison in both types is also maded. In this submicronmeter P-channel flash memory devices, the programming model, which is called Channel-Hot-Hole-Induced-Hot-Electron Current Model, to simulate the charge injection in the flash memory is used. For erasing operation, a well-known model, Fowler-Nordheim Electron Tunneling Model, will be used during theoretical simulation.
Keywords : Flash Memory ; P-channel ; program ; erase ; threshold voltage ; F-N tunneling ; impact ionization Table of Contents
目 錄 封面內頁 簽名頁 授權書………iii 中文摘要………
………v 英文摘要………vi 誌謝………
…viii 目錄………ix圖目錄………xi 表目錄………xii 第一章 緒論………1 第二章 注入模型的建立………5 2.1 元件操作模式 2.2 幸運熱電子注入模型 2.3 撞擊游離化模型 2.4 福勒-諾德漢電子 穿隧模型 第三章 可靠性與載子效應………18 3.1 可靠性問題對快閃記憶體特性的影響 3.2 閘極擾動
（Gate Disturb）可靠性的影響 3.3 汲極擾動（Drain Disturb）可靠性的影響 3.4 讀取擾動（Read Disturb）可靠性的影響 3.5 過度抹除（Overerase）可靠性的影響 3.6 耐久度（Endurance）可靠性的影響 第四章 元件製程與量測………
………28 4.1 快閃記憶體元件製作 4.2 量測過程 4.3 寫入與抹除 4.4 臨限電壓的量測 第五章 量測結果與討論…………
………38 5.1 量測結果分析 5.2 寫入效率模擬 5.3 臨限電壓量測結果 5.4 結果討論 第六章 結論………
………46 參考文獻………47 附錄 REFERENCES
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