Abstract—Enhanced hot carrier degradation in nMOSFETs with a forward substrate bias is observed. The degradation cannot be explained by conventional channel hot electron effects. Instead, an Auger recombination-assisted hot electron process is proposed. In the process, holes are injected from the forward-biased substrate and provide for Auger recombination with electrons in the channel, thus substantially increasing channel hot electron energy. Measured hot electron gate current and the light emission spectrum provide evidence that the high-energy tail of channel electrons is increased with a positive substrate bias. The drain current degradation is about ten times more serious in forward-biased substrate mode than in standard mode. The Auger-enhanced degradation exhibits positive temperature dependence and may appear to be a severe reliability issue in high temperature operation condition.
Index Terms—Auger recombination, forward substrate bias, hot carrier degradation, positive temperature dependence.
I. INTRODUCTION
T
HE REDUCTION of supply voltage in scaled CMOS de-vices is expected to alleviate hot carrier effects. However, impact ionization caused substrate current is still observable in MOS devices even at a drain bias below the band-gap voltage [1]. Several possible mechanisms are proposed for low-voltage hot carrier effects [2]–[4]. For examples, at a drain voltage below 2.0 V, electron-electron scattering may account for the high-energy tail of the electron energy distribution [2], [3]. The broadening of the electron energy levels due to electron-phonon interactions can also contribute to the high-energy tail [4]. Moreover, Auger recombination has been proposed to provide additional required energy for hot carrier degradation [5], [6]. In Auger process, one electron is recombined with a hole, and the released energy is transferred to another electron. This energy-transferred process is an effective electron energy gain mechanism especially at low drain bias.The Auger-enhanced hot carrier effects can possibly occur in various device structures and operation conditions [6]–[10]. Fig. 1 illustrates different hole creation processes in a nMOSFET. In Fig. 1(a), holes are created due to impact ionization in the drain
Manuscript received September 10, 2002; revised November 18, 2002. This work was supported by the NSC, Taiwan, R.O.C., under Contract NSC 89-2215-E009-034. The review of this paper was arranged by Editor J. Vasi.
The authors are with the Department of Electronics Engineering, National Chiao-Tung University, Hsinchu, Taiwan, R.O.C. (e-mail: [email protected]. edu.tw).
Digital Object Identifier 10.1109/TED.2003.812484
Fig. 1. Auger recombination process in various nMOSFET structures and operation conditions. (a) Impact ionization created holes flowing to the region near the source in a SOI MOSFET. (b)+V induced valence-band electron tunneling in ultrathin MOSFETs and leaving holes in Si substrate. (c) Substrate hole injection to the channel by a positive substrate bias in FBS operation.
depletion region. These holes flow to the region near the source in a SOI structure [7] for Auger recombination with channel electrons. In ultrathin oxide nMOSFETs [Fig. 1(b)], a positive gate bias can cause valence-band electron direct tunneling to the gate and leave a hole behind in the channel for Auger process [8], [9]. In Fig. 1(c), a positive substrate bias is applied and holes are injected from the substrate to the channel [10]. The application of a positive substrate bias in a nMOSFET has many advantages in analog and digital circuits. For example, in analog applications, better transistor matching and enhanced low-power analog performance can be achieved by applying a forward substrate bias [11]. Lower flicker noise is also obtained in such bias condition [12]. With respect to digital circuits, a novel concept of a dynamic threshold voltage nMOSFET (DTMOS) [13], [14] was proposed by applying a positive bias at the substrates. Higher on-state current and lower off-state leakage can be achieved simultaneously in DTMOS operation mode. In addition, a DTMOS with SOI substrate can extend the RF application of Si-based devices to even higher frequencies [15]. For utmost performance improvement, the substrate bias in a nMOSFET can be sometimes as large as 0.7 V [12], [16] or even above [17].
However, the reliability issue of a nMOSFET in forward-bi-ased substrate (FBS) mode is rarely studied. In this paper, a comprehensive study of hot carrier degradation in FBS oper-ation is conducted. We found that hot electron process in this
Fig. 2. Illustration of Auger recombination assisted hot electron energy gain process in FBS mode.
operation mode cannot be simply explained by channel field heating. Rather, Auger recombination-assisted electron energy gain plays an important part in the hot carrier process. In our model, holes are injected from positively biased substrate to the channel, as illustrated in Fig. 2(a). The injected holes provide for recombination with electrons in the inversion region and re-lease the excess energy to other channel electrons. The process is depicted in Fig. 2(b). The energetic electrons arising from the Auger process are then accelerated by lateral electric field, thus resulting in a larger hot electron tail than in standard MOSFET
operation with V.
In this paper, Section II contains a brief description of de-vice characterization. The measured hot electron gate current and photon luminescence spectrum are shown in Section III. These measurements confirm that the increase of the hot elec-tron tail results from the FBS operation. Numerical simulation of the Auger recombination rate in the channel is included. In Section IV, Auger recombination-enhanced device degra-dation in FBS mode is characterized. The temperature and drain bias dependence of the Auger-enhanced degradation is investigated.
II. DEVICECHARACTERIZATION
In this paper, a nMOSFET with a gate width of 100 m and a gate length of 0.25 m is used. The device has a gate oxide thick-ness about 50 Å. Hot carrier luminescence is measured with a Hamamatsu C3230 single photon counting system [18]. The photon number at different wavelengths is counted individually. The measurement result is then corrected for the wavelength de-pendence of the filter transmittance. Fig. 3 shows the -depen-dence of emitted light intensity and substrate current in FBS and standard operation modes. V. Due to a strong correla-tion between light emission and substrate current, maximum stress around is performed in both FBS and stan-dard modes. Drain current in the triode region with V is measured to monitor hot carrier degradation. The operation temperature is from room temperature to 125 C.
Fig. 3. Substrate current and photon light intensity as a function of gate bias with different substrate biases.V = 2:5 V. The bandpass filter is 800 nm.
Fig. 4. Hot electron light emission spectra in a nMOSFET with different substrate biases.I represents the light intensity and I is the drain current.
III. AUGERRECOMBINATION–ENHANCED HOT
ELECTRONDISTRIBUTION
It is well known that hot electron light emission in a MOSFET can be used to probe the electron energy distribution in the channel [19], [20]. Fig. 4 shows the light emission spectra in a nMOSFET with different substrate bias. The integration time is 100 s. The measured light intensity is normalized to the drain current to compensate for the different carrier flux in the channel due to the body effect. A turn-around feature is noticed in Fig. 4 as increases from 0 to 0.8 V. de-creases initially and then inde-creases with . The reduction of at V is a consequence of a smaller drain lat-eral field due to the reduction of threshold voltage. The smaller accelerated field reduces hot electron energy and thus the corre-sponding light emission. As the substrate bias increases to 0.8 V, Auger effect plays a dominant role and the hot electron tail is en-hanced considerably even though the drain acceleration field is smaller.
In addition to hot electron luminescence, the gate injection current is enhanced by a positive substrate bias. The gate current injection at different substrate bias is plotted in Fig. 5. Again, the gate current is normalized by the drain current. Similarly, the gate current first decreases and then increases as changes from 0 to 0.8 V. Fig. 6 shows the hot electron gate current for various drain and substrate biases. In this figure, the hot electron gate current is dependent on both drain and substrate biases. The drain bias determines lateral field heating while the substrate bias gives rise to the Auger effect. The dependence of the gate
Fig. 5. Normalized gate current versus gate voltage in a nMOSFET with different substrate biases. The measurement drain bias is 3.5 V.
Fig. 6. Hot electron gate injection current versus gate voltage with different drain bias.
current on both drain and substrate biases implies that the elec-tron energy gain process in FBS mode is due to combined Auger recombination and drain field acceleration. It should be pointed out that the substrate bias effect becomes more pronounced at a smaller drain bias in Fig. 6. The reason is that channel field ac-celeration itself at a low drain bias is not enough to provide elec-trons with sufficient energy to overcome the gate oxide barrier. In order to evaluate the dependence of the Auger effect on substrate bias, a numerical analysis of Auger recombination rate in the channel is performed. The Auger recombination rate is expressed as follows [6]:
(1) where the Auger coefficient is about 10 cm /s. and denote electron and hole concentrations and vary with posi-tion. The electron and hole distributions at the Si–SiO surface are obtained from a two-dimensional (2-D) device simulation. Fig. 7 shows the calculated Auger recombination rate along the channel. The corresponding lateral electric field is also drawn in the figure. The -axis is the distance from the source junc-tion. Auger recombination occurs for the most part near the source side because substrate hole injection is largest there. Note that the lateral electric field slightly decreases as the substrate voltage increases from 0.5 to 0.8 V, whereas the Auger recom-bination rate increases by orders of magnitude due to the expo-nential dependence of hole injection on substrate bias. The ener-getic electrons created by Auger recombination near the source side are subsequently accelerated by lateral electric field near the drain side, thus, causing a larger hot electron tail.
Fig. 7. Simulated Auger recombination rate and lateral electric field along the channel.V = 2:9 and V = 1:5 V. Open symbol and full symbol represent simulation underV = 0:5 and V = 0:8 V, respectively.
Fig. 8. Linear drain current degradation as a function of stress time. Drain current is measured atV = 2:0 and V = 0:1 V. Stress drain bias is 2.9 V and gate bias is 1.5 V.
IV. ENHANCEDHOTCARRIERDEGRADATION
To demonstrate the Auger effect on device hot carrier reli-ability, the linear drain current degradation versus stress time is shown in Fig. 8 for different substrate bias. The drain cur-rent degradation is increased by one order of magnitude when substrate bias increases from 0 to 0.8 V. In addition, the drain current degradation exhibits a turn-around phenomenon, as no-ticed in hot electron luminescence measurement (Fig. 4). For analog applications, we compare the flicker noise degradation in standard hot carrier stress and in FBS stress. Since hot carrier stress induced noise degradation is larger in the triode region
[21], the flicker noise measured at and V is
shown in Fig. 9. The flicker noise degradation in FBS mode is enhanced by several times. This is because the FBS mode has a larger hot electron tail and thus causes more serious flicker noise degradation.
The temperature effect on the Auger enhanced degradation is also investigated. Fig. 10(a) and (b) compares the temperature dependence of hot electron gate current in standard mode and in FBS mode. is 3.5 V in measurement. As expected, the gate current in standard mode has negative temperature dependence because of increased phonon scattering at higher temperature [22]. However, the gate current in FBS mode shows reversed -temperature dependence. The reason for the positive temper-ature dependence is twofold. First, the substrate hole injection increases with temperature. Second, the Auger coefficient itself
Fig. 9. Drain current noise power spectraS of a nMOSFET in different stress conditions. Flicker noise is measured atV = 2:0 and V = 0:1 V. Stress drain bias is 2.9 V and gate bias is 1.5 V.V is 0 V in standard hot carrier stress and is 0.8 V in the FBS stress.
Fig. 10. Temperature dependence of hot electron gate current at (a)V = 0 V and (b)V = 0:8 V. The drain bias is 3.5 V.
Fig. 11. Temperature dependence of linear drain current degradation. The stress time is 2000 s, and stressV = 1:5 and V = 2:9 V.
exhibits positive temperature dependence [23]. The temperature effect on drain current degradation is shown in Fig. 11. As op-posed to the standard hot carrier stress, temperature accelerated degradation is observed in FBS mode with stress V. The degradation is enhanced by eight times from to 125 C. This point is particularly significant to device relia-bility since today’s high performance components are required to operate in such high temperature range. The substrate bias de-pendence of drain current degradation is shown in Fig. 12. The
Fig. 12. (a) Substrate bias effect on drain current degradation and (b) the corresponding stress drain current, measured at different stress temperatures. The stress time is 2000 s, and the stressV = 1:5 and V = 2:9 V.
Fig. 13. Linear drain current degradation as a function of stress drain bias. The stress time is 2000 s andT = 25 C. The stress V is chosen at max. I stress.
measured result shows opposite temperature dependence in the low region and in the high region. In the low region, Auger effects are negligible and field heating is the dominant electron energy gain process. In the high region, the Auger effect plays a major role in the electron energy gain process. The critical for the onset of the Auger enhanced degrada-tion becomes smaller as temperature increases. For example, the threshold for the Auger induced degradation is around 0.5 V at 125 C. Once the applied substrate bias is above this critical voltage, the device degradation increases exponentially with . In other words, the substrate bias appropriate for FBS operation should be limited to 0.5 V from the viewpoint of de-vice reliability.
To further understand the role of the Auger effect, we evaluate the drain bias dependence of the Auger enhanced degradation. The result is shown in Fig. 13. At a relatively high drain bias (re-gion A), drain field acceleration itself can provide sufficient en-ergy for Si–H bond breaking and interface trap generation. The degradation in FBS mode and in standard mode therefore does not exhibit much difference. At a medium drain bias (region B), electrons by field acceleration only cannot acquire sufficient en-ergy to break Si–H bonds. The combined Auger recombination and channel field heating process is necessary to provide suffi-cient energy. As a result, Auger-enhanced degradation is much larger than standard hot carrier stress in this bias region.
ACKNOWLEDGMENT
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C.-W. Tsai (S’00) was born in Tao-Yuan, Taiwan,
R.O.C. He received the B.S. degree in 1998 in electronics engineering from National Chiao-Tung University (NCTU), Hsinchu, Taiwan. He is currently pursuing the Ph.D. degree in electronics engineering from NCTU.
His research interest includes ultrathin gate dielec-tric reliability of MOSFETs and nonvolatile memory devices such as Flash memories and FeRAMs.
M.-C. Chen (S’02) received the B.S. degree in 1998
and M.S. degree in 2000 in electronics engineering from National Chiao-Tung University (NCTU), Hsinchu, Taiwan, R.O.C. He is currently pursuing the Ph.D. degree at NTCU.
His research interest includes ultrathin gate oxide reliability and flash memory reliability.
S.-H. Ku (S’02) received the B.S. degree from
Chang-Gung University, Taoyuan, Taiwan, R.O.C., in 1999, and the M.S. degree in electronics engi-neering from the National Chiao-Tung University, Hsinchu, Taiwan, R.O.C., in 2001. He is currently pursuing the Ph.D. degree.
His research interest includes nonvolatile memory devices and thin oxide reliability.
Tahui Wang (S’85–M’86–SM’94) was born in
Taoyuan, Taiwan, R.O.C., on May 3, 1958. He received the BSEE degree from National Taiwan University, Taipei, in 1980 and the Ph.D. degree in electrical engineering from the University of Illinois, Urbana-Champaign, in 1985.
From 1985 to 1987, he was with Hewlett-Packard Laboratories, Palo Alto, CA, where he was engaged in the development of GaAs HEMT devices and cir-cuits. Since 1987, he has been with the Department of Electronics Engineering, National Chiao-Tung Uni-versity, Hsinchu, Taiwan, where he is currently a Professor. His research inter-ests include hot carrier phenomena characterization and reliability physics in VLSI devices, RF CMOS devices and nonvolatile semiconductor devices.
Dr. Wang was granted the Best Teacher Award by the Ministry of Education, R.O.C. He has served as technical committee member of many international conferences, among them IEDM, IRPS and VLSI-TSA. His name was listed in Who’s Who in the World.
