Effect of Channel-Width Widening on a
Poly-Si Thin-Film Transistor Structure
in the Linear Region
Kow-Ming Chang, Member, IEEE, and Gin-Ming Lin
Abstract—This is the first paper to discuss the ON-state drain–current of a special thin-film transistor structure with a wide channel width and a narrow source/drain width in the linear region. The experimental results indicate that when the channel width is wider than the source/drain width, the side-channel current effect is generated. This effect increases the ON-state drain–current due to the additional current-flow paths exist-ing in the side-channel regions and low channel resistance. As the side-channel width increases, theON-state drain–current ini-tially increases and then gradually becomes independent of the side-channel width when the side-channel width is larger than the effective side-channel width, which depends on the channel width and is largely independent of the source/drain width. This paper also demonstrates that theON-state drain–current gain is directly proportional to the channel length and the ratio of the channel length to the source/drain width and dependent on the side-channel width.
Index Terms—Drain–current, poly-Si thin-film transistor (TFT), source/drain width, wide channel width.
I. INTRODUCTION
L
OW-TEMPERATURE polycrystalline-silicon thin-film transistors (TFTs) are one of the most promising tech-nologies for the ultimate goal of building large-area electronic systems on glass substrates [1]. In flat-panel liquid-crystal, electroluminescence, and plasma displays, as well as other applications such as high-speed printers and page-width optical scanners, poly-Si TFTs can be utilized to integrate peripheral driver circuits on glass for system integration [2]. To integrate peripheral driving circuits on the same glass substrate, a large current drive and a high drain breakdown voltage are neces-sary for poly-Si TFT devices. Previous studies reported that use of a thin active-channel film is beneficial in obtaining a high current drive [3], [4]. However, the use of a thin active-channel layer typically results in poor source/drain contact and large parasitic series resistance. A thick source/drain region not only reduces the lateral electric field, thus maintaining theManuscript received January 16, 2007; revised May 14, 2007. This work was supported by the National Science Council, Taiwan, R.O.C., under Contract NSC 94-2215-E-009-012. The review of this paper was arranged by Editor H. Jaouen.
K.-M. Chang is with the Department of Electronics Engineering and Semi-conductor Research Center, National Chiao Tung University, Hsinchu 300, Taiwan, R.O.C.
G.-M. Lin is with the Institute of Electronics, National Chiao Tung Univer-sity, Hsinchu 300, Taiwan, R.O.C.
Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TED.2007.902853
breakdown voltage [5], [6], but also reduces the source/drain series resistance [6]. Therefore, an ideal TFT device structure should consist of a thin active-channel region while maintaining a thick source/drain region.
To achieve this ideal TFT structure, we have proposed a novel four-mask step TFT structure with self-aligned raised source/drain (SARSD) [7]. In the SARSD TFT structure, a special structure was formed, which had a wide channel width and a narrow source/drain width. A highON-state drain–current was obtained due to low channel resistance and additional current-flow paths existing in the side-channel regions [7]. Several models have been proposed to explain the behavior of the ON-state drain–currents of poly-Si TFTs and to simulate these ON-state drain–current values [8]–[11]. However, the drain–currents of these models were all derived from the as-sumption that the channel width is identical to the source/drain width. Simulating the ON-state drain–current of an SARSD
TFT structure using these models is unreasonable [8]–[11]. Some studies have discussed the case of a narrow channel width [12]–[14]; however, no study has discussed the variations in the ON-state drain–current when the channel width is larger than the source/drain width. Therefore, before new physical models are proposed to elucidate and simulate the ON-state drain–current of a structure with a wide channel width and a narrow source/drain width, such as an SARSD TFT, the relationship among the ON-state drain–current of a structure with a wide channel width and narrow source/drain width, the channel width, the channel length, and the source/drain width must be defined clearly. This task is the aim of this paper, which examines the wide-channel-width effect in poly-Si TFTs. This paper will help us to further understand the behavior of the carrier transport in the channel region when the channel width is larger than the source/drain width and explain the increase of theON-state current of a wide-channel-width TFT structure such as the SARSD TFT structure.
This paper uses a test structure with a wide channel width and a narrow source/drain width to analyze the influences of the channel width, the channel length, and the source/drain width on ON-state drain–current. Because the kink effect causes an anomalous current increase in the saturation region, this paper only focus on theON-state drain–current in the linear region.
II. DEVICEFABRICATION
The fabrication processes for a tested n-channel poly-Si TFT with a wide channel width and narrow source/drain width were
Fig. 1. Schematic top view of the major fabrication steps for the test TFTs.
as follows. A 50-nm-thick α-Si layer for the active region was deposited by a low-pressure chemical-vapor-deposition (LPCVD) system using SiH4 at 550 ◦C on 500-nm
thermal-oxidized silicon wafers. The active region was patterned by a G-line stepper and formed using reactive-ion etching [Fig. 1(a)]. The deposited α-Si film was then annealed at 600◦C for 24 h to become a poly-Si film. A 50-nm plasma-enhanced CVD (PECVD) gate-oxide layer was deposited at 350 ◦C. A 300-nm LPCVD poly-Si gate was then deposited. Because the
A layer of 600-nm-thick aluminum was then deposited by a thermal-coater system. After metal patterning, Al sintering was carried out at 400◦C for 30 min.
The channel region [Fig. 1(c)] is divided into one main-channel region (region I) and two side-main-channel regions (region II). The channel length and width are represented as Lch and Wch, respectively. The channel width (Wch) is
wider than the source/drain width (Wsd), and this can be
written as
Wch= Wmc+ 2Wsc= Wsd+ 2Wsc (1)
where Wsc is the width of the side-channel region [Fig. 1(c),
region II] in the test structure, and Wmc is the main-channel
width that is equal to the source/drain width (Wsd).
For comparison, the conventional poly-Si TFTs structure, in which the channel width is identical to the source/drain width, is also fabricated. The physical device parameters of the conventional structure are identical to those of the test structure.
III. RESULTS ANDDISCUSSION
A. Simulation Results of the Test Structure(Wch> Wsd) and the Conventional Structure(Wch= Wsd)
To simulate the current flows of the test and the conventional structures, the 2-D numerical simulator MEDICI was used [15]. Fig. 2(a) shows the simulated current-flow lines of the conventional structure in the ON-state. The channel length and the channel width of the simulated conventional structure are 10 and 5 µm, respectively. Based on the simulation results [Fig. 2(a)], the simulated current-flow lines of the conven-tional structure are uniformly distributed in the channel region [Fig. 1(c), region I] and the source/drain region. However, for the test structures with a wide channel width [Fig. 2(b)–(d)], there are additional current-flow paths that differ from those of the conventional sample existing in the side-channel regions [Fig. 1(c), region II] of the test structure in the ON-state. Furthermore, comparing the simulation results of Fig. 2(b) with those of Fig. 2(c), the additional current flow is generated in the side-channel regions (region II), and the distribution width of the current-flow lines in the side-channel regions increases as the channel length increases (Lch= 3 µm to Lch= 10 µm).
This finding implies that the current-flow distribution in the side-channel regions depends on the channel length. Comparing the simulation results of Fig. 2(c) with those of Fig. 2(d), the distribution and the effective distribution width of current-flow
Fig. 2. Current-flow lines simulated by MEDICI in (a) conventional structure with Lch= 10 µm and Wch= Wsd= 5 µm; (b) test structure with Lch= 3 µm, Wsd= 5 µm, and Wch= 30 µm; (c) test structure with Lch= 10 µm, Wsd= 5 µm, and Wch= 30 µm; (d) test structure with Lch= 10 µm, Wsd= 10 µm, and Wch= 30 µm.
lines of Wsd= 10 µm in region II are almost identical to those
of Wsd= 5 µm, even when the source/drain width (Wsd =
5 µm to Wsd= 10 µm) is increased. This finding indicates that
an increase in the source/drain width (or main-channel width) does not significantly alter the distribution of current-flow lines in region II.
B. Equivalent Circuit of the Channel Region of the Test Structure(Wch> Wsd) in the Linear Region
This paper uses an equivalent circuit, as shown in Fig. 3, to further elucidate the additional current-flow paths of the test structure in the side-channel regions. In the side-channel regions (Fig. 3), the resistance of path 2 (Rsc2) is larger than
that of path 1 (Rsc1) because path 2 is longer than path 1.
Consequently, the current flow via path 2 must be less than the current flow via path 1. According to this equivalent circuit,
Fig. 3. Equivalent circuit of the channel region of the test structure (Rm,cis the main-channel resistance; Rs,cis the side-channel resistance).
the total channel resistance (Rtot) of the test structure can be
written as Rtot= 1 1 Rmc + 2 Rsc1+ 2 Rsc2+· · · < Rmc (2) and Rmc= Lch WsdµeffCox(Vgs− Vth) (3) where Rmcis the resistance of the main-channel region in the
linear region, Rmcis the channel resistance of the conventional
structure in the linear region [16], and Cox, µeff, and Vthare the
gate-dielectric-capacitance per unit area, effect mobility, and threshold voltage, respectively. According to (2), the total chan-nel resistance (Rtot) of the test structure is smaller than that of
the main-channel region (Rmc). In other words, the Rtotof the
test structure is smaller than that of the conventional structure. Therefore, in the linear region, theON-state drain–current of the test structure is higher than that of the conventional structure. As discussed, when the distance of current path is sufficiently long, the resistance of current path would be too large for the current flow. Thus, we suggest that in the linear region, the distribution of most current-flow paths should be restricted within a certain effective width in the side-channel region (Wsc,eff), and theON-state drain–current will become gradually
independent of Wsc as Wsc increases. In other words, the
ON-state drain–current of the test structure is saturated at a certain value when Wscis sufficiently large.
C. Electrical Characteristics of the Test Structure
(Wch> Wsd) and the Conventional Structure
(Wch= Wsd) in the Linear Region
Figs. 4–6 present the experimental data for the test structure. In Fig. 4(a), the Ids–Vgs transfer characteristics of the test
structure with different side-channel widths are compared with those of the conventional sample. TheON-state drain–currents of the test structures are all higher than those of the conventional structure for different side-channel widths. Additionally, the
ON-state drain–current of the test structure initially increases
Fig. 4. (a) Ids–Vgstransfer characteristics; (b) Ids–Vdsoutput characteristics of the test structure with Lch/Wsd= 10 µm/5 µm with different side-channel widths (Wsc) compared with the conventional structure.
gradually independent of Wsc after reaching a certain Wsc
value, even when the Wsd/Lch ratio of the test structure
de-creases from 10 µm/5 µm to 5 µm/15 µm [Fig. 5(a)]. These experimental results are consistent with the observations and suggestions in Section III-B. Figs. 4(b) and 5(b) show the output characteristics of the test structure with different side-channel widths. The ON-state drain–currents of the test struc-ture are larger than those of the conventional strucstruc-ture in both linear and saturation regions. Additionally, according to the output characteristics [Figs. 4(b) and 5(b)] in the linear region, the channel resistance reduces as Wsc increases. Therefore,
according to the experimental results (Figs. 4 and 5) and (2), we conclude that the main reason for a highON-state drain–current of the test structure is low channel resistance.
Fig. 6 shows that theON-state drain–current distributions of the test structure varied with the side-channel width for differ-ent channel lengths and the source/drain widths. There were 20 test TFTs measured for each condition. Based on the experi-mental results [Fig. 6(a) and (b)], theON-state drain–current of
the test structure initially increases as Wscincreases and then
Fig. 5. (a) Ids–Vgstransfer characteristics; (b) Ids–Vdsoutput characteristics of the test structure of Lch/Wsd= 5 µm/15 µm with different side-channel widths (Wsc) compared with the conventional structure.
gradually becomes saturated when Wsc exceeds a threshold
value. This special side-channel width is called the effec-tive side-channel width (Wsc,eff), and most current-flow lines
are included within its corresponding effective channel width (Wch,eff), as obtained from (1). The effect in which a high
ON-state drain–current is obtained when the channel width is larger than that of the source/drain is called the side-channel current effect (SCCE). Moreover, the value of the effective side-channel width (Wsc,eff) decreases as the channel length
increases, even when the source/drain width increases from 5 to 10 µm. This experimental finding is consistent with the simulation results (Fig. 2).
To analyze the increased ratio of theON-state drain–current caused by the SCCE, the average values of the ON-state drain–current gain (Ai) versus the side-channel width are
plot-ted [Fig. 7(a) and (b)]. TheON-state drain–current gain (Ai) is
defined as
Ai≡
Ids,t− Ids,c Ids,c
Fig. 6. Distributions of the ON-state drain–currents of the test structure with (a) Wsd= 5 µm; (b) Wsd= 10 µm as a function of the side-channel width Wsc.
where Ids,c is the ON-state drain–current of the conventional
structure, Ids,tis theON-state drain–current of the test structure
with different side-channel widths, and (Ids,t− Ids,c) is the net
value of theON-state drain–current flow through region II. Based on the experimental results [Fig. 7(a) and (b)], the averageON-state drain–current gain (Ai) of the test structure
increases as the channel length increases. Additionally, for the same channel length (such as Lch= 15 µm), the effective
side-channel widths (Wsc,eff) of Wsd= 5 µm and Wsd= 10 µm are
approximately the same. These experimental results are consis-tent with the simulation results [Fig. 2(b)–(d)]. In other words, the increase in the source/drain width (or main-channel width) does not significantly increase the distributions of current-flow lines in region II. However, the reduction of the Wsd from
10 to 5 µm increases the average value of Ai. Therefore,
we conclude that the effective side-channel width (Wsc,eff)
is dependent on the channel length (Lch) and independent
of the source/drain width (Wsd), and the SCCE is
depen-Fig. 7. Average values for the ON-state drain–current gain Ai of the test structure with (a) Wsd= 5 µm and (b) Wsd= 10 µm as a function of the side-channel width Wsc.
dent on the side-channel width, the channel length, and the source/drain width.
D. Relationship Among theON-State Drain–Current or the
ON-State Drain–Current Gain and the Channel Length, the Side-Channel Width, and the Source/Drain Width in the Linear Region
To investigate the relationship among the ON-state drain–current gain (Ai), the channel length, the side-channel
width, and the source/drain width, this paper analyzes the distributions of the ON-state drain–current gain (Ai) against
Lch and the Lch/Wsd ratio with different channel widths and
the side-channel widths (Figs. 8 and 9), respectively. The
ON-state current gains Ai is directly proportional to Lch for
both Wsd = 5 and 10 µm [Fig. 8(a) and (b)]. Moreover,
the ON-state current gains Ai is directly proportional to the
Fig. 8. Distributions of theON-state drain–current gain Aiof the test structure with (a) Wsc= 6 µm and (b) Wsc= 14 µm, as compared with channel length Lch.
Therefore, we conclude that the ON-state current gain is directly proportional to Lch and the Lch/Wsd ratio and
depends on Wsc.
According to the experimental results (Figs. 8 and 9), the simple relationship among the ON-state drain–current gain (Ai), the channel length Lch, and the source/drain width Wsd
can be written as
Ai∼= B
Lch+ C Wsd
(5) where B and C are constants.
In the case of Wsc≥ Wsc.eff, B is approximately 0.48 based
on the slopes of the auxiliary straight lines [Fig. 9(a) and (b)], and C is roughly −1.55 according to the intercepts of the auxiliary straight lines [Fig. 8(a) and (b)].
By combining (4) and (5), the maximum ON-state
drain–current gain (Ai,max) caused by the SCCE is obtained
Fig. 9. Distributions of theON-state drain–current gain Aiof the test structure with (a) Wsc= 6 µm; (b) Wsc= 14 µm compared with the ratio of the channel length to the source/drain width Lch/Wsd.
as follows: Ai,max≡ Ids,t,max− Ids,c Ids,c ∼ = 0.48 Lch− 1.55 Wsd . (6)
In the case of Wsc≥ Wsc.eff, if the channel length and the
source/drain width are determined, the saturated or maximum
ON-state drain–current of the test structure (Ids,t,max) can be
written as Ids,t,max∼= 1 + 0.48 Lch− 1.55 Wsd Ids,c. (7)
Fig. 10 presents the experimental data and the calculated data. The calculated data roughly agrees with the experimental data for different source/drain widths and different applied drain biases (Vds= 5 V or 10 V) (Fig. 10).
Fig. 10. Experimental and calculated maximum ON-state drain current for the test structure with different source/drain widths and different applied drain biases compared with the channel length Lch, in which solid symbols represent the experimental data and empty symbols represent the calculated data obtained from (7).
However, for Lch= 15 µm [Figs. 8(a) and 9(a)], the
exper-imental data diverge from the auxiliary straight line because the side-channel width (Wsc) of the test structure of Lch=
15 µm, which is 6 µm, is smaller than the effective side-channel width (Wsc,eff) of the test structure of Lch= 15 µm,
which is approximately 10 µm (Fig. 7). Therefore, theON-state drain–current gain (Ai) is limited by the side-channel width
(Wsc), and the experimental data of Lch= 15 µm cannot be
fitted to the auxiliary straight line. However, for the case of
Lch/Wsd= 15 µm/5 µm [Figs. 8(b) and 9(b)], the
experi-mental data are not fitted to the auxiliary straight line, even though Wsc(= 14 µm) is larger than Wsc,eff(∼10 µm). It has
been reported that the channel resistance is directly proportional to the Lch/Wsd ratio [16]. A large Lch/Wsd ratio indicates
substantial channel resistance. Therefore, the main reason that the experimental data of Lch/Wsd= 15 µm/5 µm are not fitted
to the auxiliary straight line [Figs. 8(b) and 9(b)] is that a large channel resistance dominates.
Therefore, when the channel width is larger than the source/drain width, the SCCE is generated, and this effect will cause an increase in the ON-state drain–current due to the additional current-flow paths existing in the side-channel re-gions and low channel resistance. As the side-channel width in-creases, theON-state drain–current initially increases and then gradually becomes independent of the side-channel width when the side-channel width is larger than the effective side-channel width, which depends on the channel width and is independent of the source/drain width. This paper also demonstrates that theON-state drain–current gain (Ai) is directly proportional to
the channel length (Lch) and the ratio of the channel length
to the source/drain width (Lch/Wsd) and dependent on the
side-channel width. Moreover, when the ratio of the side-channel length to the source/drain width is excessively large, high channel resistance caused by a large ratio of the channel length to the source/drain width will suppress the SCCE and limit the increase in theON-state drain–current gain.
IV. CONCLUSION
This paper focuses on theON-state drain–current of a special structure with a wide channel width and a narrow source/drain width in the linear region. In the linear region, the ON-state drain–current of this special structure is larger than that of the conventional structure, in which the channel width is identi-cal to the source/drain width, which is due to the additional current-flow paths and low channel resistance. The ON-state drain–current of this special structure is dependent on the channel length, the source/drain width, and the side-channel width. Moreover, a simple relationship among the ON-state
drain–current, the source/drain width, and the channel length is identified. These experimental results will prove helpful to further understand the carrier-transport mechanisms in theON -state when the channel width is larger than the source/drain width. These experimental results will also prove useful in the development of completeON-state current modeling.
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a Visiting Professor in the Electrical Engineering Department, University of California, Los Angeles, working on the system design of electron cy-clotron resonance chemical vapor deposition (ECR-CVD) for developing the low-temperature processing technology. He was in charge of a 500-keV ion implanter, selective-tungsten low-pressure CVD system, and two ultrahigh-vacuum-ECR-CVD systems installed in the National Nano Device Laboratory, National Chiao Tung University. He has served as a Reviewer of interna-tional journals such as the Journal of the Electrochemical Society and has published over 200 articles. His current research interests are the physics, technologies, and modeling of heterojunction and optoelectronic devices, ultra large-scale integration key technologies, nano-CMOS, thin-film transistor, and microelectromechanical-system devices and technologies.
Dr. Chang has served as a Reviewer of the IEEE ELECTRON DEVICE
LETTERS. He is a member of Phi Tau Phi, AIChE, and the Electrochemical Society.
