VLSI Digital Signal Processing Architecture Design
by
Dr. Steve Tu Rm SF726C
E-mail : [email protected]
Department of Electronic Engineering Fu Jen Catholic University
Spring 2008
(p1)
Outline –
1. Introduction to Digital Signal Processing Systems.
2. Digital Signal Processing Review.
3. Iteration Bound.
4. Pipelining and Parallel Processing.
5. Retiming.
6. Unfolding.
7. Folding.
8. Bit-level Arithmetic Architecture 9. Synchronous and wave pipelines 10. Low-Power Design.
(p2)
Recommended Books -
K. K. Parhi, “VLSI Digital Signal Processing Systems : Design and Implementation”, 1999 John Wiley & Sons.
Principal textbook for this course.
S. Y. Kung, “VLSI Array Processors”, 1988 Prentice-Hall.
Concentrates on high-performance processors, but also gives VLSI design concepts.
Grading Policy–
1. Midterm exam. ( 20% ) 2. Final exam. ( 20% ) 3. Homework. ( 40% )
4. Misc.( interaction with the lecturer. ) ( 20% )
(p3)
