3.3 系統描述(Ⅲ)
3.3.2 範例說明(Ⅲ)
考慮下述時間延遲控制系統：
) 2 ( ) ( 3 ) ( )
( + ′ + = −
′′ t y t y t u t
y （3.54）
比較（3.38）與（3.54）可得轉移函數為
3 ) 1
( 2
+
= + s s s
G ， （3.55）
及延遲時間
τ
=2。吾人的目標擬設計一控制器促使整個閉迴路時間延遲系統滿足下列六項規格：
（G1） 當輸入訊號為任意常數時，則此系統穩態誤差為 0；
（G2） 閉迴路控制系統的尖峰時間小於或等於 3 ；
（G3） 閉迴路控制系統的頻寬小於或等於 3 (rad/sec)；
（G4） 當輸入為單位步階函數時，閉迴路時間延遲系統的 ISE 小於或等於 4；
（G5） 當輸入為單位步階函數時，閉迴路時間延遲系統的 ITADE 小於或等於 5；
（G6） 當輸入為單位步階函數時，閉迴路時間延遲系統 DREA 小於或等於 2。
0 2 4 6 8 10 12 14 16 18 20
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5
time
y(t)
圖 3-4.1 系統（3.54）之單位步階原始響應圖
茲比較 (G1) - (G6) 與 (i) - (vi)，可得
由（3.39）-（3.44）式中，則可得到下列參數
.
0 1 2 3 4 5 6 7 8 9 10 0
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
time
y(t)
圖 3-4.2 系統（3.54）之單位步階(加入補償器後)響應圖
第四章 結論以及未來研究方向
4.1 結論
本篇論文中，首先針對一類時間延遲控制系統提出一項嶄新的性能指標，定名為 DREA。
在3.1 節至 3.3 節中吾人針對一類時間延遲控制系統，利用時域分析法，設計一些 簡單且容易硬體製作的回授型控制器，促使整個閉迴路控制系統之暫態響應、穩態響 應、時域響應及頻域響應之多項性能指標均可分別達到某特定範圍內。最後，經由嚴密 的証明並輔以電腦模擬來說明本篇論文主要定理的正確性。由模擬結果顯示，本論文中 所設計之簡易型控制器，的確可以保證整個閉迴路控制系統之響應，達到預期的範圍內。
4.2 未來研究方向
目前吾人乃針對一類時間延遲控制系統，針對不同的新型性能指標，設計一些簡易 型的回授控制器，促使整個閉迴路控制系統之時域響應與頻域響應的性能指標均可分別 維持在所規定之範圍內。在未來的研究，吾人將分別以兩個方向來做探討：
一、 吾人將針對一類時間延遲控制系統，制定其他新型或更多類型的性能指標
來加以研究，並探討其控制器的設計。
二、 吾人將針對一類時間延遲控制系統，加入未知的擾動項，從而設計一控制
器，促使整個閉迴路控制系統在時域響應與頻域響應上，均可維持在所規 定的範圍內。
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