結論

本篇論文探討 LDPC Codes 設計並適用於低編碼長度之應用，所建構的位元 檢查矩陣採用 Block-LDPC[17]的形式有利於硬體上實現，主要針對兩方面做演 算法改良，一方面改良式演算法比傳統式演算法節省大量運算及複雜度，另一方 面在不同的擴展倍數均能有效打斷迴圈的連結以增進解碼效能。

改良式演算法以每個元素 1 的迴圈總數決定優先順序，從最高優先權開始 消除迴圈動作，充分利用每次打斷迴圈的機會故減低了演算法遞迴次數，尤其在 前幾次遞迴動作時有效減少大量迴圈，所以在消去相同迴圈總數時，運算量相較 傳統演算法減低約 70~80%，以 Matlab 為模擬平台之模擬時間減少約 90%，均可 證明改良式演算法能節省大量運算及複雜度。

在移動通訊或無線通訊的應用中[35]，若使用 LDPC 當作編、解碼的媒介而 採用的矩陣大多為短編碼長度的矩陣，因為長編碼矩陣除了帶來大量運算，也需 要更多次數的遞迴解碼使效能收斂，應用上更為耗電。因此我們著重在產生一個 好的 LDPC 矩陣，再加上優先權為基礎之特性，在前幾次遞迴運算時就能打斷大 量迴圈，能越早消除大量迴圈則在低擴展倍數時越有利，因為遞迴次數的增加讓 位移值的選擇越來越少。所以模擬編碼長度在 4000 位元以下的矩陣作為解碼矩 陣，解碼的效能上均比其它兩種相同架構的演算法要來得優異，尤其在低錯誤率 時效能增進更明顯，突顯出低編碼長度時能夠有效率消除迴圈，適用於省電或低 運算量等通訊系統。

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