• 沒有找到結果。

3-2 Effects of MSB Process Parameters

3-2-1 Activation Temperature

Temperature is the most important process parameters to form ultra shallow SDE and to activate dopant. Since there are few researches about behaviors of

phosphorus and boron in Ni-silicide, a heavy dose of 5x1015cm-2 is used to study the effect of activation temperature in order to avoid the influence of insufficient dopants.

The transfer characteristics of MSB pTFTs and nTFTs experienced different activation temperatures are shown in Fig.3-3(a) and (b), respectively. The extracted parameters of MSB pTFTs and MSB nTFTs are presented in Table 3-3 and Table 3-4, respectively.

It is observed that RTA at 600℃ and 650℃ result in the best device performance for both pTFTs and nTFTs. The slight deviation of Vth, S.S., mobility, as well as on/off current ratio may come from the process deviation. By increasing the RTA temperature to higher than 700℃, device performance degrades dramatically. Increase of absolute value of Vth, increase of S.S., and decrease of mobility are clearly observed. However, the off-state current (Ioff) slightly decreases with the increase of RTA temperature.

It is known that the Ioff of MSB devices is determined by the quality of the MSB junction. The continuous reduction of Ioff implies that the higher activation temperature results in deeper and higher concentration SDE. Since the S/D integrity is maintained, the device degradation mechanism must be related to the gate electrode.

The first speculation about the degradation mechanism of S.S. and mobility is the degradation of surface state quality of channel. It was reported that thermal stress of gate electrode may generate oxide charge and interface state defects [40~41].

However, no matter positive charges or negative charges were generated by thermal stress, the Vth of MSB pTFTs and MSB nTFTs should shift toward the same direction.

According to the measured results, the absolute value of Vth increases with the increase of activation temperature. That is the Vth of MSB pTFTs and MSB nTFTs shift toward opposite direction. Therefore, the thermal stress induced degradation is ruled out.

It is known that the thermal stability of Ni-silicide is not as good as Ti-silicide or

Co-silicide [42]. Annealing at temperatures higher than 700℃ usually results in agglomeration of Ni-silicide [43~44]. It is postulated that he agglomeration of silicide at gate electrode may degrade device performance.

Fig.3-4 shows the surface morphology of MSB TFTs inspected by scanning electron microscope (SEM) after annealing at different temperatures. The agglomeration of silicide at gate region occurs when the activation temperature is above 700℃; while the silicide at S/D region keeps continuous at 750℃. The un-agglomeration of silicide at S/D region is consistent with the non-degradation of Ioff. Since the Si gate was not doped before silicide formation, once the silicide at gate region agglomerated, gate voltage can not be applied to the gate region without silicide. Therefore, higher gate voltage is required to form inverted channel at he active layer above where the silicide film is broken. That’s why the absolute value of Vth increases for both pTFTs and nTFTs with the increase of activation temperature.

The degradation of S.S. and mobility can also explained by the same mechanism.

There are two possible reasons can explain the different thermal stability at gate region and S/D region. The first one is thermal stress [45~46]. The vertical structures at gate region and S/D region are different. At gate region, Ni-silicide is stacked on un-reacted a-Si layer, TEOS gate oxide, Si active layer, and buried oxide, while the Ni-silicide at S/D region is stacked on buried oxide only. The thermal stress is quite different at high temperature. It is also reported that the NiSi film is easier to be agglomerated than the NiSi2 [47~48]. Anyway, it is quite possible that the thermal stress at gate region is higher than that at S/D region, therefore, thermal stress induced agglomeration may occur at gate region earlier.

Another possible reason is more complex. We use the schematic cross-sectional structure of Fig.3-5 to explain it [49]. The agglomeration of silicide on Si substrate proceeds with three steps : (a) metal-Si bonds break due to thermal energy, (b) metal diffuse along grain boundary and silicide/Si interface, (c) new metal-Si bonds form at

suitable position until energy balance between grain boundary and interface energy.

At gate region, there are un-reacted Si layer under Ni-silicide. Similar procedure can occur as shown in Fig.3-5(a). Upon high temperature process, Ni-Si bonds break and Ni atoms diffuse along grain boundaries until the energy balance between the grain boundary energy and both surface and a-Si layer interface energies is achieved.

Therefore, groove morphology proceeds and enlarges NiSi grain until NiSi island forms. However, at S/D region, there is no silicide/Si interface and no excess Si atoms to react with un-bonded Ni atoms as shown in Fig.3-5(b). Therefore, agglomeration is suppressed. Certainly, it is possible that both reasons exist in our case. To identify which one is the root cause needs more works.

We can have a short summary now. A 600℃ or 650℃ RTA is sufficient to form excellent MSB pTFTs and nTFTs simultaneously. The fully silicided S/D region can sustain thermal annealing up to 750℃. If gate electrode is also fully silicided, the sustainable process temperature is expected to be 750℃ at least. For the application of LTPS TFTs, 600℃ is chosen to be the process temperature of MSB process.

3-2-2 Activation Time

Fig.3-6 (a) and (b) show the transfer characteristics of p-channel and n-channel MSB TFTs with different activation times, respectively. Extracted parameters are listed in Table 3-5 and Table 3-6. For MSB pTFTs, a 30 sec activation is sufficient to achieve superior performance and the on/off current ratio can be higher than 107. However, it seems that device performance degrades with the increase of activation time. One of the possible causes is dopant deactivation [50]. In poly-Si, grain boundaries act as sinks for impurity atom segregation and also trap carriers at defects caused by incomplete atomic bonding. The thermal equilibrium concentration for dopants increases with temperature and the major driving force for deactivation is dopant supersaturation. In the ITS process, dopants were implanted into silicide and

then diffused out of silicide and piled-up at the silicide/Si interface. It is possible that some of the piled-up dopants distribute in the poly-Si grains and some of the piled-up dopants fill grain boundaries in the short activation period. With the longer activation time, more dopants were trapped by defects or grain boundaries. These trapped dopants are electrically deactive so that the device performance degrades.

For n-channel MSB TFTs, similar to p-channel MSB TFTs, ultra shallow SDE forms after a short activation time of 30 seconds. Unlike boron, phosphorus has slower diffusion rate. A 30 sec activation may be not sufficient to form intact SDE. By increasing activation time, dopant diffuse out of silicide and all of the Ni-silicide grains are surrounded by SDE. Therefore, some device characteristics such as S.S.

and Ioff are improved. For the reduction of mobility and on-state current (Ion), dopant deactivation is still a possible reason. Although Ion slightly reduces, the on/off current ratio increases with the increase of activation time. This is due to the obvious reduction of Ioff.

According to the above discussion, 30 seconds RTA is a suitable activation time for MSB TFTs.

3-2-3 ITS Dosage

In order to form effective SDE, high dose implantation is necessary. Similarly, high concentration SDE is also necessary to modify Schottky Barrier. In this thesis, ITS dosages of 1x1015cm-2 and 5x1015cm-2 are considered. The activation temperature is 600℃ and the activation time is 30 sec. The transfer characteristics of MSB pTFTs and MSB nTFTs are shown in Fig.3-7(a) and (b), respectively. The corresponded parameters are listed in Table 3-7 and Table 3-8. In general, device characteristics of devices with different dosages are very similar. The major difference is the Ioff at low Vds. Lower implantation dose results in slightly higher Ioff due to lower SDE concentration. However, at high Vds, energy band bending of the MSB formed with

different implantation doses are similar, there is no difference in device performance between these two implantation doses.

The low implantation dose also results in lower mobility of n-channel MSB TFTs due to the slow diffusion rate of phosphorus and thus the low concentration SDE with a 30 seconds RTA.

3-2-4 Geometric Effect

In this subsection, the effects of Wg and Lg on threshold voltage are discussed.

Fig.3-8 shows threshold voltage as a function of Wg. Slight Vth decrease is observed as Wg decreases. It is known that the potential barrier in the channel determines Vth of poly-Si TFTs [51]. Therefore, the narrower Wg has fewer grain boundaries and trap states so that Vth decreases slightly.

On the contrary, Vth increases as channel length decreases as shown in Fig.3-9.

Unlike short channel effect of conventional MOSFETs, strong reverse short channel effect appears. This phenomenon may be explained by the metal-induced crystallization (MIC)/metal-induced lateral crystallization (MILC) interfacial grain boundaries (MMGB’s) effect [52]. In the silicidation process of MSB TFTs, MIC, instead of MILC, which proceeds under spacer, occurs in the S/D region. The continuous MMGB’s are formed and are self-aligned to the edges of gate electrode.

After ITS process and the following activation process, because of the overlap of MMGB’s and the channel, charge carriers fills MMGB’s trap states. Therefore, MMGB energy barrier is higher than barriers in the channel and the higher Vgs is required to inverse the channel. When Lg is reduced, a larger fraction of the channel comes under the influence of MMGB’s energy barrier. The Reverse short channel effect appears. Since reverse short channel effect is due to trap of carriers from ITS process exists in the MMGB’s, plasma treatment may passivate trap states and relax this effect.

3-3 Summary

In this chapter, device performance of MSB TFTs has been represented. Some advanced electrical characteristics of MSB TFTs are also discussed. After ITS process, MSB TFTs with the suitable activation process shows the superior I-V characteristics compared to CN TFTs and SB TFTs. An activation temperature between 600℃ to 650℃ at RTA results in the best device performance for both MSB pTFTs and MSB nTFTs. While MSB TFTs are activated at the temperature higher than 700℃, Ni-silicide agglomerates at gate electrode and device performance degrades. Thermal stress and surface energy unbalance are the two possible mechanisms. At suitable activation temperature, 30 seconds RTA is a suitable activation time for MSB TFTs, It is possible that dopant deactivation occurs at longer activation time and decreases device performance. Besides these, higher implantation dose can provide more dopants to enhance device performance. Considering the device geometries, narrower channel width has few grain boundaries and trap states; therefore, threshold voltage slightly decreases. On the other hand, strong reverse short channel effect appears due to traps states of MMGB’s. In summary, MSB process can achieve excellent device performance and be applied to LTPS TFTs due to its low thermal budget feature.

Table 3-1 The important parameters of CN, SB, and MSB pTFTs. Channel length=5um and Channel width=5um. MSB pTFTs of implant dose=5×

1015cm-2 was activated with the temperature of 600℃, 30 sec in RTA. The signal “X” shows the unreasonable value gotten from the I-V characteristic.

Vth(V) SS

MSB TFT -6.74 950.86 33.62 2.89E7 1.52E7

Table 3-2 The important parameters of CN, SB, and MSB nTFTs. Channel length=5um and Channel width=5um. MSB nTFTs of implant dose=5×

1015cm-2 was activated with the temperature of 600℃, 30 sec in RTA.

Vth(V) SS

CN TFT 10.97 473.81 19.95 1.78E5 4.14E6

SB TFT 12.39 964.67 43.02 3.09E6 1.88E6

MSB TFT 7.18 1598.54 70.59 7.13E6 1.77E6

Table 3-3 The parameters of MSB pTFTs in the different doping activation temperature. The implant dose=5×1015cm-2, activation time=30 sec in RTA.

Channel length=5um and Channel width= 5um.

Vth(V) SS

600℃ -6.74 950.86 33.62 2.89E7 1.52E7

650℃ -8.51 1028.08 34.94 1.93E8 6.83E6

700℃ -15.26 1960.79 9.71 1.96E6 8.61E5

750℃ -19.54 2783.31 2.87 3.97E5 1.13E5

Table 3-4 The parameters of MSB nTFTs in the different doping activation temperature. The implant dose=5×1015cm-2, activation time=30 sec in RTA.

Channel length=5um and Channel width= 5um. The sign “╳” represents the value out of the measurement range.

Vth(V) SS

600℃ 7.18 1598.54 70.59 7.13E6 1.77E6

650℃ 4.7 1411.47 49.92 1.17E7 2.13E6

700℃ 16.96 1886.72 7.25 3.31E6 5.41E5

750℃ ╳ 2183.82 0.41 6.57E5 1.66E4

Table 3-5 The parameters of MSB pTFTs in the different doping activation time. The implant dose=5×1015cm-2, activation temperature=600℃ in RTA. Channel length=5um and Channel width=5um.

Vth(V) SS

(mV/dec)

mobility

(cm2/V•s)

Ratio

Vd=0.1V

Ratio

Vd=5V

30 sec -6.74 950.86 33.62 2.89E7 1.52E7

90 sec -7.07 1038.62 40.1 6.32E7 1.17E7

150 sec -10.61 1268.7 20.7 4.01E6 5.24E6

Table 3-6 The parameters of MSB nTFTs in the different doping activation time. The implant dose=5×1015cm-2, activation temperature=600℃ in RTA. Channel length=5um and Channel width=5um.

Vth(V) SS

(mV/dec)

mobility

(cm2/V•s)

Ratio

Vd=0.1V

Ratio

Vd=5V

30 sec 7.18 1598.54 70.59 7.13E6 1.77E6

90 sec 6.23 1539.79 57.56 6.87E6 3.02E6

150 sec 8.33 1188.82 33.88 3.26E7 1.04E7

Table 3-7 The parameters of MSB pTFTs with different doping concentration. The activation temperature=600℃, activation time=30 sec in RTA. Channel length=5um and Channel width=5um.

Vth(V) SS

(mV/dec)

mobility

(cm2/V•s)

Ratio

Vd=0.1V

Ratio

Vd=5V

1×1015 cm-2 -6.51 901.43 34.11 4.89E7 1.34E7

5×1015 cm-2 -6.74 950.86 33.62 2.89E7 1.52E7

Table 3-8 The parameters of MSB nTFTs with different doping concentration. The activation temperature=600℃, activation time=30 sec in RTA. Channel length=5um and Channel width=5um.

Vth(V) SS

(mV/dec)

mobility

(cm2/V•s)

Ratio

Vd=0.1V

Ratio

Vd=5V

1×1015 cm-2 6.48 1587.3 45.53 3.24E6 1.52E6

5×1015 cm-2 7.18 1598.54 70.59 7.13E6 1.77E6

(a)

Fig. 3-1 (a) The output characteristics of MSB pTFTs, (b) the output characteristics of MSB nTFTs. The implant dose=5×1015cm-2. The activation temperature is 600℃ and the activation time is 30 sec in RTA. Channel length=5um and Channel width=5um.

(a) curve of N-type CN TFTs, SB TFTs, and MSB nTFTs. The implant dose=5×

1015cm-2. The activation temperature is 600℃ and the activation time is 30 sec in RTA. Channel length=5um and Channel width=5um.

(a)

Fig. 3-3 (a)~(b) The transfer characteristics of (a) P-type, and (b) N-type MSB TFTs with different activation temperature. The implant dose=5×1015cm-2, activation time=30 sec in RTA. Channel length=5um and Channel width=5um.

(a) (b)

(c) (d)

Fig. 3-4 (a)~(d) The Plane-View SEM micrographs of Source/Drain and Gate electrode of MSB nTFTs in the different activation temperature with implant Source: P+, the implant dose=5×1015cm-2, doping activation time: 30 sec in RTA.

(a) 600℃ activation temperature.

(b) 650℃ activation temperature (c) 700℃ activation temperature.

(d) 750℃ activation temperature.

(a) (b)

a-Si

NiSi

a-Si

Oxide

NiSi2 NiSi2 NiSi2 NiSi2 NiSi2

a-Si

NiSi NiSi NiSi NiSi NiSi

Oxide

Oxide

Oxide a-Si

NiSi

Fig. 3-5 Schematic cross-view of agglomeration process over (a) a-Si layer, (b) buried oxide at high temperature

(a)

Fig.3-6 (a)~(b) The transfer characteristics of (a) MSB pTFTs, and (b) MSB pTFTs with different doping activation time. The implant dose=5 × 1015cm-2, activation temperature=600℃ in RTA. Channel length=5um and Channel width=5um.

(a) Id-Vg@P+,RTA-600oC-30 sec

L=W=5um

Id(Amp.)

Vg(V)

Fig.3-7 (a)~(b) The transfer characteristics of (a) MSB pTFTs, and (b) MSB nTFTs with different doping concentration. The activation temperature=600℃ , activation time=30 sec in RTA. Channel length=5um and Channel width=5um.

0 1 2 3 4 5 6 7 8 9 10

Fig. 3-8 Threshold voltage roll off vs. channel width. The implant dose=5×1015cm-2. The channel length is 5um and Vtho is defined as threshold voltage of MSB pTFTs and MSB nTFTs with Channel length=5um and Channel width=10um.

Vth roll off extractrd at V

d=0.1V

Fig. 3-9 Threshold voltage roll off vs. channel length. The implant dose=5×1015cm-2. The channel width is 5um and Vtho is defined as threshold voltage of MSB pTFTs and MSB nTFTs with Channel length=10um and Channel

Chapter 4

相關文件