In our design, the threshold for dynamic sampling is given by user. In the future, it may be determined by the auto adjusting method. Due to the dynamic technique for
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our design can apply both with dynamic sampling value and without dynamic sampling value. We can do the calibration regularly and calculate the PRD to adjust the threshold. The calibration technique may cost additional power, but for the same patient in the similar statue, the characteristic of ECG signal may not have large variation. The calibration does not need be too often. The other is the PVT calibration for our ADC. In our thesis, we do not implement the PVT calibration. It can be done in future work. The PVT calibration can be implemented as the lookup table for digital output mapping. We can build the table based on the simulation result. For the calibration state, we apply two determined voltage inputs to the ADC and the slope of the output can be got. Based on the slope we can know which PVT is the chip face and the relation between with variation output and without variation output can be modeled as the polynomial equation. In the measurement mode, we can base on this equation to map the digital output to the proper value.
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