[6.1] K. Kim, H. Lee, S. Jung, and C. Kim, “A 366kS/s 400µW 0.0013mm2 frequency-to-digital converter based CMOS temperature sensor utilizing multiphase clock,” in IEEE Custom Integrated Circuits Conf., Sep. 2009, pp. 203–206.
[6.2] Y.-S. Lin, D. Sylvester, and D. Blaauw, “An ultra low power 1V, 220nW temperature sensor for passive wireless applications,” in IEEE Custom Integrated Circuits Conf., Sep.
2008, pp. 507–510.
[6.3] M.-H. Chang, J.-Y. Wu, W.-C. Hsieh, S.-Y. Lin, Y.-W. Liang, and W. Hwang, “High efficiency power management system for solar energy harvesting applications,” in IEEE Asia-Pacific Conf. on Circuits and Systems, Dec. 2010, pp. 879–882.
[6.4] W.-C. Hsieh and W. Hwang, “Low quiescent current variable output digital controlled voltage regulator,” in IEEE Int. Symp. Circuits Syst. (ISCAS), May 2010, pp. 609–612.
Vita
PERSONAL INFORMATION Birth Date: May 10, 1978
Birth Place: Tainan, Taiwan, R.O.C.
Address: Department of Electronics Engineering National Chiao Tung University
B.S. [2000] Department of Electronics Engineering, National Chiao-Tung University.
M.S. [2001] Institute of Electronics, National Chiao-Tung University.
M.E. [2004] Department of Electrical Engineering, Texas A&M University, U.S.A.
WORK/RESEARCH/PROJECT EXPERIENCES
MIRC, EE NCTU, Ministry of Economic Affairs, Research Engineer uPHI: Wireless Body Area Network Core Technology
MIRC, EE NCTU, National Science Council, Research Engineer
Multi-System Merging and Green Computing Techniques for Wireless Video Entertainment - Low Power On-Demand Memory System for Multi-Core Design MIRC, EE NCTU, Industrial Technology Research Institute, Research Engineer
Micro-Watt DSP Processor for Multi-Core Applications MIRC, EE NCTU, Ministry of Economic Affairs, Research Engineer
Advanced System Designs for High-Performance and Low-Power Dual-Core Processors
HONORS
1997 Fall NCTU EE Excellence Studentship Award
2000 First Rank entering Institute of Electronics, National Chiao-Tung University
149 EXTRACURRICULAR ACTIVITIES
1998 Vice President, Student Association of Electronics Engineering, NCTU 1997 President of Freshman Welcome Camp, Electronics Engineering, NCTU
Publications
JOURNAL PUBLICATIONS
[1] Ming-Hung Chang, Yi-Te Chiu, and Wei Hwang, “Design and iso-area Vmin analysis of 9T subthreshold SRAM with bit-interleaving scheme in 65nm CMOS,” IEEE Transaction on Circuits and Systems II: Express Briefs, vol. 59, no. 7, Jul. 2012, accepted for publication.
[2] Ming-Hung Chang, Shang-Yuan Lin, and Wei Hwang, “A 0.4V 520nW 990μm2 fully integrated frequency-domain smart temperature sensor in 65nm CMOS,” ASP Journal of Low Power Electronics, vol. 8, no.1 Feb. 2012, pp. 63-72.
[3] Ming-Hung Chang, Yi-Te Chiu, and Wei Hwang, “An asynchronous subthreshold 8T-SRAM-based FIFO memory for WBANs in 65nm CMOS,” submitted to IEEE Transactions on Circuits and Systems I: Regular Papers.
[4] Ming-Hung Chang, Wei-Hung Du, and Wei Hwang, “A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs,” to be submitted to IEEE Transactions on Circuits and Systems I: Regular Papers.
CONFERENCE PUBLICATIONS
[1] Wei-Hung Du, Po-Tsang Huang, Ming-Hung Chang, and Wei Hwang, “A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs,”
in IEEE International Symposium on VLSI Design, Automation, and Test, Apr. 2012.
[2] Wei-Hung Du, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions,” in IEEE System-on-Chip Conference, Sep. 2011, pp. 19-23.
[3] Ming-Hung Chang, Chung-Ying Hsieh, Mei-Wei Chen, and Wei Hwang,
“Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation,” in Int’l Symp. on Low Power Electronics and Design, Aug. 2011, pp.
15-20.
[4] Ming-Hung Chang, Yi-Te Chiu, Shu-Lin Lai, and Wei Hwang, “A 1kb 9T subthreshold SRAM with bit-interleaving scheme in 65nm CMOS,” in Int’l Symp. on Low Power Electronics and Design, Aug. 2011, pp. 291-296.
[5] Ming-Hung Chang, Chung-Ying Hsieh, Mei-Wei Chen, and Wei Hwang, “Logical effort models with voltage and temperature extension in super-/near-/sub-threshold regions,” in
IEEE International Symposium on VLSI Design, Automation, and Test, Apr. 2011, pp.
213-216.
[6] Ming-Hung Chang, Jung-Yi Wu, Wei-Chih Hsieh, Shang-Yuan Lin, You-Wei Liang, and Wei Hwang, “High efficiency power management system for solar energy harvesting applications,” in IEEE Asia Pacific Conf. on Circuits and Systems, Dec. 2010, pp.
879-882.
[7] Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “Fully on-chip temperature, process, and voltage sensors,” in IEEE Symp. Circuits and Systems, May 2010, pp. 897-900.
[8] Yi-Te Chiu, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “Subthreshold
asynchronous FIFO memory for wireless body area networks (WBANs),” in Int’l Symp.
on Medical Information and Communication Technology, Mar. 2010.
[9] Yi-Ming Chang, Ming-Huang Chang, and Wei Hwang., “A 2.1-µW 0.3V-1.0V
Wide-Locking Range Multiphase DLL Using Self-Estimated SAR Algorithm”, in IEEE System-on-Chip Conference, Sep. 2009, pp. 115-118.
[10] Ming-Hung Chang, Li-Pu Chuang, Yi-Ming Chang, and Wei Hwang, “A 300-mV 36-µW Multiphase Dual Digital Clock Output Generator with Self-Calibration,” in IEEE
System-on-Chip Conference, Sep. 2008, pp. 97-100.
[11] Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, and Wei Hwang, “A 5.2mW All-Digital Fast-Lock Self-Calibrated Multiphase Delay-Locked Loop,” in IEEE International Symposium on Circuits and Systems, May 2008, pp. 3342-3345.
[12] Hao-I Yang, Ming-Hung Chang, Tay-Jyi Lin, Shih-Hao Ou, Siang-Sen Deng, Chih-Wei Liu, and Wei Hwang, “A Controllable Low-Power Dual-Port Embedded SRAM for DSP Processor,” in IEEE Intl. Workshop Memory Technology, Design, and Testing, Dec. 2007, pp. 27-30.
[13] Chang-Hsuan Chang, Ming-Hung Chang, and Wei Hwang, “A Flexible Two-Layer External Memory Management for H.264/AVC Decoder,” in IEEE System-on-Chip Conference, Sep. 2007, pp. 219-222.
[14] Ming-Hung Chang, Zong-Xi Yang, and Wei Hwang, “A 1.9mW Portable ADPLL-Based Frequency Synthesizer for High Speed Clock Generation,” in IEEE Int’l Symp. on Circuits and Systems, May 2007, pp.1137-1140.
[15] Hao-I Yang, Ming-Hung Chang, Ssu-Yun Lai, Hsiang-Fei Wang, and, Wei Hwang, “A Low-Power Low-Swing Single-Ended Multi-Port SRAM,” in IEEE Int’l Symp. on VLSI Design, Automation, and Test, Apr. 2007, pp. 28-31.
[16] Ching-Yun Cheng, Ming-Hung Chang, and Wei Hwang, “Power-Gating Sense Amplifier of Low Power Pseudo SRAM,” in IEEE Int’l Symp. on VLSI Design, Automation, and Test, Apr. 2007, pp.260-263.
[17] Chia-Sheng Peng, Ming-Hung Chang, and Kuei-Ann Wen, “Early-Late Gate Receiving for Bluetooth Packet,” in IEEE Int’l Symp. on VLSI Technology, Systems, and
151 Applications, Mar. 2001, pp. 57-60.
PATENTS
[1] Po-Tsang Huang, Shu-Wei Chang, Ming-Hung Chang, and Wei Hwang, “內儲存無關項 之階層式搜尋線,” TW Patent I321793, Mar. 2010.
[2] Po-Tsang Huang, Shu-Wei Chang, Ming-Hung Chang, and Wei Hwang, “Stored Don’t-Care Based Hierachical Search Line,” US Patent 7,525,827, Apr. 2009.
[3] Yi-Te Chiu, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “Dual-port subthreshold SRAM cell,” US Application Pending(13/243,690), Sep. 2011.
[4] Yi-Te Chiu, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “雙埠次臨界靜態隨機存 取記憶體單元,” TW Application Pending(100119160), Jun. 2011.
[5] Chung-Ying Hsieh, Ming-Hung Chang, and Wei Hwang, “A Programmable Clock Generator for Sub- and Near-Threshold DVFS System,” US Application Pending(13/155,523), Jun. 2011.
[6] Chung-Ying Hsieh, Ming-Hung Chang, and Wei Hwang, “ Thermally Robust Buffered Clock Tree Using Logical Effort Compensation,” US Application Pending(13/067,232), May 2011.
[7] Yi-Te Chiu, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “Subthreshold SRAM cell,” US Application Pending(13/096,796), Apr. 2011.
[8] Chung-Ying Hsieh, Ming-Hung Chang, and Wei Hwang, “用於次臨界/近臨界動態電壓 與頻率調節系統之可程式化時脈產生器,” TW Application Pending(100107526), Mar.
2011.
[9] Yi-Te Chiu, Ming-Hung Chang, Hao-Yi Yang, and Wei Hwang, “次臨界靜態隨機存取記 憶體單元,” TW Application Pending(100107824), Mar. 2011.
[10] Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “Fully on-chip all digital process invariant temperature sensor,” TW Application Pending, Jan. 2011.
[11] Chung-Ying Hsieh, Ming-Hung Chang, and Wei Hwang, “使用邏輯努力補償之溫度強 健緩衝時脈樹,” TW Application Pending(099146856), Dec. 2010.
[12] Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “Fully on-chip temperature, process, and voltage sensors,” US Application Pending(12/910,199), Oct.
2010.
[13] Shi-Wen Chen, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “全晶上寬工作電 壓溫度製程電壓感測器,” TW Application Pending(099129470), Sep. 2010.
[14] Jung-Yi Wu, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “Fully on-chip fast pumping up t o high voltage charge pump,” US Application Pending(12/827,111), Jun.
2010.
[15] Jung-Yi Wu, Ming-Hung Chang, Wei-Chih Hsieh, and Wei Hwang, “可全部整合至晶片 中的快速充電電荷幫浦,” TW Application Pending(099106829), Mar. 2010.
[16] Li-Pu Chuang, Ming-Hung Chang, and Wei Hwang, “全數位快速鎖定自我校正相位延 遲鎖定電路,” TW Patent Pending (097136541), Sep. 2008.