Chapter 5 Conclusion
The low-power UWB LNA has been demonstrated in 0.18-µm CMOS 1P6M process.
Low-power consumption is achieved by using a forward bulk-source bias (or called the forward body bias, FBB). And the forward bulk-source voltage in our design is obtained by means of the proposed ultra-low power self-bias that we don’t need an additional bias circuit to supply the bulk terminal of MOSFET. However, the self forward body bias technique will give rise to some noise figure degradation. Therefore, we proposed the second LNA (LNA 2), to improve the noise figure of the preceding LNA (LNA 1). The measurement result shows that the LNA 1 has a gain of 12.5–15.5 dB from 2.6 to 6.6 GHz with a good input/output matching S11<-10 dB and S22<-17 dB and average noise figure of 3.2 dB while consuming power of 6.3 mW from 1.06 V voltage supply. The chip area is 0.96 mm × 0.64 mm. And the proposed noise-improved LNA 2 to improve the noise figure degraded lightly by the self-bias loop. The measurement result of the LNA 2 shows that it has a gain of 13.5–16.2 dB from 2.0 to 6.6 GHz with a good input/output matching S11<-10 dB and S22<-16 dB and average noise figure of 2.6 dB while consuming power of 4.5 mW from 1.06 V voltage supply. The chip area is 0.98 mm × 0.47 mm.
Reference
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