2.1 Procedures of Fabrication of LTPS TFTs
LTPS TFTs used in the experiment were the conventional top-gate structure and fabricated on glass substrates. The cross-section views of N-channel and P-channel LTPS TFTs are shown in Fig 2-1 and Fig. 2-2 respectively. The basic process flow is described as follows. Firstly, the buffer oxide and a-Si:H films were deposited on glass substrates by the PECVD system. Then, XeCl excimer laser was used to crystallize a-Si:H film followed with poly-Si active area definition. Subsequently, gate insulator was deposited by PECVD. The thickness of gate oxide is 650Å. Next, the metal gate formation and source/drain doping were performed. Dopant activation and hydrogenation was carried out after interlayer dielectric deposition. Finally, contact holes formation and metallization were performed to complete fabrication work. The lightly doped drain (LDD) structure was used in the N-channel TFTs to enhance hot carrier endurance while not used in P-type devices. The width/length of the TFT was 20μm/5μm. The TFTs of the same dimension will be used for reliability testing in the chapter 3 and chapter 4.
n+ n+
Glass substrate buffer oxide
interlayer metal
Gate
n- insulator
n-Fig. 2-1 The cross-section views of N-channel LTPS TFTs with LDD structure
Glass substrate buffer oxide
Gate
p+ p+
metal
interlayer insulator
Fig. 2-2 The cross-section views of P-channel LTPS TFTs
2.2 AC Stress Conditions
The Agilent 4156A semiconductor parameter analyzer with pulse generator was used to measure the I-V curve and stress the device with different conditions. The basic parameters of AC signal consists of frequency (F), signal high level (Vgh), signal low level (Vgl), high-level time (Vgh), low-level time (Vgl), rising time (Tr), and falling time (Tf). Fig. 2-3 shows the waveform of the AC signal. In AC signal, the definition of individual parameter is given as follow:
T = Tr + T_vgh + Tf + T_vgl (2.1) F = 1/T (2.2) Duty ratio = ( T_vgh+1/2 Tr+1/2 Tf )/T (2.3) where T is the signal period.
Fig. 2-3 Waveform and definition of the AC signal
Under AC stress, pulse voltage was applied to the gate electrode and source and drain were grounded, which is shown in Fig. 2-4. The standard stress condition in the experiment is the gate voltage swing of -15 V to 15 V, F = 500 kHz, Tr and Tf are both 100ns, and duty ratio is 50%. These parameters can be adjusted and then various stress conditions on the gate electrode are performed to examine the reliability of LTPS TFTs. To investigate which parameter of the stress parameters dominates the degradation of the N-channel and P-channel TFTs transfer characteristics, Tr and Tf from 100ns to 700ns are changed for gate swing range of -15 V to 15 V. Secondly, the effects at Tr and Tf for the gate swing in the depletion region are studied. The experimental conditions is shown in table 2-1.
TFT
Stress Stress
G
D Ｓ
Glass substrate buffer oxide
Gate
p+ p+
metal
interlayer insulator
Fig. 2-4 TFT under AC stress with source and drain grounded
Table 2-1 The experiment condition forms of the N-type and P-type.
Number of Repetition is the same.
T_vgh
In order to compare the different stress conditions and attain the faithful stressed behavior, a large amount of devices should be stressed and compared. However, the existence of grain boundaries in the channel might make the degradation behavior more complicated, and it may be therefore be more difficult to find the dominant parameters of AC stress. In prior study [22], the diverse degradation behaviors occur due to different sources of LTPS TFTs and variation of the initial value of extracted parameter. In this work, crosstie devices were adopted for the consistency of the initial device behaviors.
2.3 Parameter Extraction Method
For most of the researches on TFT, the constant current method is widely-used to determine the threshold voltage (Vth). The threshold voltage in the thesis is determined from this method, which extracts Vth from the gate voltage at the normalized drain current
N D eff eff
I =I /(W -L )=10nA for VD=0.1V.
The transfer characteristics of poly-Si TFTs are similar to those of conventional MOSFETs. The MOSFETs can be applied to the poly-Si TFTs, so the first order I-V relation in the bulk Si. The field effect mobility (Mu, µFE) is derived from the maximum value of the transconductance gm, which can be expressed as:
1 2
Cox is the gate capacitance per unit area, W is channel width,
L is channel length,
Vth is the threshold voltage.
If the drain voltage VD is much smaller as compared with(VG −Vth) (i.e. VD << VG - Vth), then the drain current can be approximated as:
D And the transconductance is defined as:
D
Therefore, the field effect mobility can be expressed as:
g
mIn other words, the field-effect mobility can be extracted by taking the maximum value of the gm into (2-6) when VD = 0.1V
2.4 C-V Measurements
The C-V curves of the gate-to-drain capacitance (CGD) before and after stress at different frequencies were measured with the Agilent 4284Aprecision LCR meter.
Since it is difficult to observe the defect position in TFTs with the I-V characteristic, the C-V measurement is used to examine the information about position and type of degradation in the device after stress [23]. For instance, if carriers are trapped by defects, C-V curve stretch out slightly, or if states are generated additionally, C-V curve increase somewhat in the depletion region. Besides, the C-V curves are helpful to identify whether the dominant mechanism of degradation is the increase of fixed charges or trap states. In this work, since the degradation should be symmetric for the gate-to-source and gate-to-drain case, the C-V curves are obtained only for the Cgd curves measured between the drain and the gate.