Experimental Procedures

The experimental procedures listed below:

Figure 3-1 Schematic illustration of experimental procedures.

3.1.1 ZnO deposited by APP jet on Si wafer

In our Literature Reviews, the fabrication and properties of bottom gate type thin film transistors using an intrinsic ZnO film as active layers will be described. We chose bottom gate structure to be the fabrication of TFTs on n+type silicon wafer as substrate. We usually adopt bottom gate structure in advanced TFTs fabrication for better quality of semiconductor active layer than top gate structure because the active layer is deposited after gate dielectric layer and drain or source electrode. Using this structure avoids plasma bombarding or thermal treatment injuring active layer .Silicon wafer was TFTs gate electrode, and we chose n+type silicon wafer for lower gate electrode resistance and bias voltage in gate electrode than n-type Si wafer.

After RCA clean procedure, silicon wafer was put in furnace for oxidation process. Silicon dioxide was chosen as the gate insulator. And the thickness of gate insulator was 1000Å. Temperature of thermal oxidation was 1000℃ with 90minutes. We chose this slightly thick thickness because we did not want the gate leakage current to influence device I-V properties.

And then ZnO thin film was deposited by APP jet as active layer with the deposition conditions including hot plate temperature, ZnO thickness, different kinds of main gas and carrier gas, different ratios of oxygen in main gas.

We needed to find out the suitable deposition conditions for promoting the quality of zinc oxide deposited by APP jet. To fabricate ZnO TFTs with good electric properties and high transparence was our goal. So the

procedure of ZnO deposited by APP jet was the most important step in TFT fabrication.

The zinc oxide thin films were deposited by APP jet as shown in figure 3-2 (the sketch of diagram isn’t proportioned to the real size of equipment). N+ silicon wafers were placed on hot plate with suitable process temperature. Zn(NO₃)₂ water solution was used as the precursors to deposit ZnO thin film. The concentration of Zn(NO₃)2 water solution was 0.2M . We chose a suitable gap distance as 5mm to deposit ZnO thin film with good quality. The carrier gas carried mists of Zn(NO₃)2 water solution to the plasma region. The carrier gas and mists of Zn(NO₃)2 water solution were mixed with main gas, and these gases would become plasma by arcing mechanism because of high pulsed voltage. Zn(NO₃)2 , H₂O, carrier gas, and main gas would participate with some reactions in plasma region. And then main gas would carry these plasmas to substrate and reduce the plasmas temperature. We could use a computer to control scanning path including starting point and terminal point. The scanning path was shown in figure 3-3.

The main gas carried plasmas to substrate and the zinc oxide films were deposited by chemical vapor deposition.

Chemical vapor deposition (CVD) is the process of depositing a solid film on the wafer surface through one or more volatile precursors, which react or decompose on the substrate surface to produce the desired deposit.

Frequently, volatile by-products are also produced, which are removed by gas flow through the reaction chamber. The sample surface or its vicinity is heated in order to provide additional energy to the system to drive the

reactions. The plasma and radicals would cause reactions and nucleation on samples, and then zinc oxide films would grow from island shape to continuous films.

The experimental parameters of APP jet are shown in table 3-1. The thickness of active layer(scan times), hot plate temperature, carrier gas, and main gas are experimental parameter which we would change in order to discuss the influences to devices and to find out the best parameters for electrical properties. We would use these parameters to fabricate devices on glass substrate. Other experimental parameters are suitable for high quality films so we would not change them during each experiment like gap distance, gas flow rate, and nozzle speed.

3.1.2 Patterning

After ZnO deposited, the next step was to define each TFT’s active layer region. This procedure was carried out in lithography area by photo resist completely, the next step was to define drain and source electrodes . At the first we though the procedures of defining drain and source electrodes were depositing aluminum and etching it by lithography and wet etching. But the active layer was under drain and source electrodes. It is very difficult to

choose suitable acid solution which kept good etching selectivity between aluminum and zinc oxide. Zinc oxide would be etched very quickly by all acid solution which would etch aluminum. So we used a special technique to replace etching process to define drain and source electrodes on active layer.

This special technique was lift-off. The procedures of TFTs fabricated on n+

silicon before lift-off process as shown in figure 3-5. These procedures contained thermal oxidation, ZnO thin films deposited by APP jet, and defining active layer region by lithography technique.

3.1.3 Lift-off

Lift-off process contains several steps as shown in figure 3-6. First we put photo resist as a cover over zinc oxide region which we did not want aluminum deposited. And then we used E-Gun to deposit aluminum about 1000Å on Si wafer. At last, we put Si wafer in acetone with ultrasonic shaking to lift off all photo resist and aluminum on it. So a part of aluminum would stay on active layer as drain and source electrodes. And the device as shown in figure 3-7 would be measured electrical properties and the results would be discussed in next chapter.